Home
last modified time | relevance | path

Searched refs:mtval (Results 1 – 6 of 6) sorted by relevance

/openbmc/qemu/tests/tcg/riscv64/
H A Dissue1060.S23 csrr t1, mtval
/openbmc/linux/arch/riscv/kernel/
H A Dtraps_misaligned.c243 unsigned long addr = csr_read(mtval); in handle_misaligned_load()
326 unsigned long addr = csr_read(mtval); in handle_misaligned_store()
/openbmc/qemu/target/riscv/
H A Dmachine.c398 VMSTATE_UINTTL(env.mtval, RISCVCPU),
H A Dcpu.h238 target_ulong mtval; /* since: priv-1.10.0 */ member
H A Dcpu_helper.c1813 env->mtval = tval; in riscv_cpu_do_interrupt()
H A Dcsr.c2014 *val = env->mtval; in read_mtval()
2021 env->mtval = val; in write_mtval()