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Searched refs:mtk_pll_set_rate_regs (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/clk/mediatek/
H A Dclk-pll.c93 static void mtk_pll_set_rate_regs(struct mtk_clk_pll *pll, u32 pcw, in mtk_pll_set_rate_regs() function
182 mtk_pll_set_rate_regs(pll, pcw, postdiv); in mtk_pll_set_rate()
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mtk.c112 static void mtk_pll_set_rate_regs(struct clk *clk, u32 pcw, int postdiv) in mtk_pll_set_rate_regs() function
179 mtk_pll_set_rate_regs(clk, pcw, postdiv); in mtk_apmixedsys_set_rate()