Searched refs:mst_cfg (Results 1 – 3 of 3) sorted by relevance
| /openbmc/u-boot/arch/arm/mach-sunxi/ |
| H A D | gtbus_sun9i.c | 36 writel(GP_MST_CFG_DEFAULT, >bus->mst_cfg[GT_PORT_FE0]); in gtbus_init()
37 writel(GP_MST_CFG_DEFAULT, >bus->mst_cfg[GT_PORT_FE0]); in gtbus_init()
38 writel(GP_MST_CFG_DEFAULT, >bus->mst_cfg[GT_PORT_BE1]); in gtbus_init()
39 writel(GP_MST_CFG_DEFAULT, >bus->mst_cfg[GT_PORT_BE2]); in gtbus_init()
40 writel(GP_MST_CFG_DEFAULT, >bus->mst_cfg[GT_PORT_IEP0]); in gtbus_init()
41 writel(GP_MST_CFG_DEFAULT, >bus->mst_cfg[GT_PORT_FE1]); in gtbus_init()
42 writel(GP_MST_CFG_DEFAULT, >bus->mst_cfg[GT_PORT_BE0]); in gtbus_init()
43 writel(GP_MST_CFG_DEFAULT, >bus->mst_cfg[GT_PORT_FE2]); in gtbus_init()
44 writel(GP_MST_CFG_DEFAULT, >bus->mst_cfg[GT_PORT_IEP1]); in gtbus_init()
|
| /openbmc/linux/drivers/phy/freescale/ |
| H A D | phy-fsl-imx8qm-lvds-phy.c | 188 struct phy_configure_opts_lvds *mst_cfg = &mst->cfg; in mixel_lvds_phy_check_slave() local
191 if (mst_cfg->bits_per_lane_and_dclk_cycle != in mixel_lvds_phy_check_slave()
194 mst_cfg->bits_per_lane_and_dclk_cycle, in mixel_lvds_phy_check_slave()
199 if (mst_cfg->differential_clk_rate != in mixel_lvds_phy_check_slave()
202 mst_cfg->differential_clk_rate, in mixel_lvds_phy_check_slave()
207 if (mst_cfg->lanes != slv_cfg->lanes) { in mixel_lvds_phy_check_slave()
209 mst_cfg->lanes, slv_cfg->lanes); in mixel_lvds_phy_check_slave()
213 if (mst_cfg->is_slave == slv_cfg->is_slave) { in mixel_lvds_phy_check_slave()
|
| /openbmc/u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | gtbus_sun9i.h | 15 u32 mst_cfg[36]; /* 0x000 */ member
|