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Searched refs:mscc_qs_offset (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/net/mscc_eswitch/
H A Dmscc_xfer.c33 regs + mscc_qs_offset[MSCC_QS_INJ_CTRL]); in mscc_send()
36 writel(ifh[i], regs + mscc_qs_offset[MSCC_QS_INJ_WR]); in mscc_send()
39 writel(buff[i], regs + mscc_qs_offset[MSCC_QS_INJ_WR]); in mscc_send()
43 writel(0, regs + mscc_qs_offset[MSCC_QS_INJ_WR]); in mscc_send()
53 writel(0, regs + mscc_qs_offset[MSCC_QS_INJ_WR]); in mscc_send()
71 readl(regs + mscc_qs_offset[MSCC_QS_XTR_RD]); in mscc_recv()
74 u32 val = readl(regs + mscc_qs_offset[MSCC_QS_XTR_RD]); in mscc_recv()
85 *rxbuf = readl(regs + mscc_qs_offset[MSCC_QS_XTR_RD]); in mscc_recv()
95 *rxbuf = readl(regs + mscc_qs_offset[MSCC_QS_XTR_RD]); in mscc_recv()
130 setbits_le32(regs + mscc_qs_offset[MSCC_QS_XTR_FLUSH], in mscc_flush()
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H A Dmscc_xfer.h16 int mscc_send(void __iomem *regs, const unsigned long *mscc_qs_offset,
18 int mscc_recv(void __iomem *regs, const unsigned long *mscc_qs_offset,
20 void mscc_flush(void __iomem *regs, const unsigned long *mscc_qs_offset);