Searched refs:mpll_reg (Results 1 – 2 of 2) sorted by relevance
65 u32 mpll_reg = readl(&scu->m_pll_param); in ast2400_get_mpll_rate() local67 if (mpll_reg & AST2400_MPLL_OFF) in ast2400_get_mpll_rate()70 if (mpll_reg & AST2400_MPLL_BYPASS_EN) in ast2400_get_mpll_rate()73 u32 od = (mpll_reg >> 4) & 0x1; in ast2400_get_mpll_rate()74 u32 n = (mpll_reg >> 5) & 0x3f; in ast2400_get_mpll_rate()75 u32 d = mpll_reg & 0xf; in ast2400_get_mpll_rate()358 u32 mpll_reg; in ast2400_configure_ddr() local367 mpll_reg = readl(&scu->m_pll_param); in ast2400_configure_ddr()368 mpll_reg &= ~(SCU_MPLL_POST_MASK | SCU_MPLL_NUM_MASK in ast2400_configure_ddr()370 mpll_reg |= (div_cfg.post_div << SCU_MPLL_POST_SHIFT) in ast2400_configure_ddr()[all …]
65 u32 mpll_reg = readl(&scu->m_pll_param); in ast2500_get_mpll_rate() local67 const ulong num = (mpll_reg & SCU_MPLL_NUM_MASK) >> SCU_MPLL_NUM_SHIFT; in ast2500_get_mpll_rate()68 const ulong denum = (mpll_reg & SCU_MPLL_DENUM_MASK) in ast2500_get_mpll_rate()70 const ulong post_div = (mpll_reg & SCU_MPLL_POST_MASK) in ast2500_get_mpll_rate()332 u32 mpll_reg; in ast2500_configure_ddr() local341 mpll_reg = readl(&scu->m_pll_param); in ast2500_configure_ddr()342 mpll_reg &= ~(SCU_MPLL_POST_MASK | SCU_MPLL_NUM_MASK in ast2500_configure_ddr()344 mpll_reg |= (div_cfg.post_div << SCU_MPLL_POST_SHIFT) in ast2500_configure_ddr()348 writel(mpll_reg, &scu->m_pll_param); in ast2500_configure_ddr()