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Searched refs:mop (Results 1 – 15 of 15) sorted by relevance

/openbmc/qemu/target/loongarch/tcg/insn_trans/
H A Dtrans_fmemory.c.inc6 static void maybe_nanbox_load(TCGv freg, MemOp mop)
8 if ((mop & MO_SIZE) == MO_32) {
13 static bool gen_fload_i(DisasContext *ctx, arg_fr_i *a, MemOp mop)
22 tcg_gen_qemu_ld_tl(dest, addr, ctx->mem_idx, mop);
23 maybe_nanbox_load(dest, mop);
29 static bool gen_fstore_i(DisasContext *ctx, arg_fr_i *a, MemOp mop)
38 tcg_gen_qemu_st_tl(src, addr, ctx->mem_idx, mop);
43 static bool gen_floadx(DisasContext *ctx, arg_frr *a, MemOp mop)
53 tcg_gen_qemu_ld_tl(dest, addr, ctx->mem_idx, mop);
54 maybe_nanbox_load(dest, mop);
[all …]
H A Dtrans_memory.c.inc6 static bool gen_load(DisasContext *ctx, arg_rr_i *a, MemOp mop)
13 tcg_gen_qemu_ld_tl(dest, addr, ctx->mem_idx, mop);
18 static bool gen_store(DisasContext *ctx, arg_rr_i *a, MemOp mop)
25 tcg_gen_qemu_st_tl(data, addr, ctx->mem_idx, mop);
29 static bool gen_loadx(DisasContext *ctx, arg_rrr *a, MemOp mop)
36 tcg_gen_qemu_ld_tl(dest, addr, ctx->mem_idx, mop);
42 static bool gen_storex(DisasContext *ctx, arg_rrr *a, MemOp mop)
49 tcg_gen_qemu_st_tl(data, addr, ctx->mem_idx, mop);
54 static bool gen_load_gt(DisasContext *ctx, arg_rrr *a, MemOp mop)
62 tcg_gen_qemu_ld_tl(dest, src1, ctx->mem_idx, mop);
[all …]
H A Dtrans_atomic.c.inc6 static bool gen_ll(DisasContext *ctx, arg_rr_i *a, MemOp mop)
12 tcg_gen_qemu_ld_i64(t1, t0, ctx->mem_idx, mop);
20 static bool gen_sc(DisasContext *ctx, arg_rr_i *a, MemOp mop)
40 val, ctx->mem_idx, mop);
50 MemOp mop)
66 func(dest, addr, val, ctx->mem_idx, mop);
H A Dtrans_vec.c.inc228 uint32_t oprsz, MemOp mop,
240 func(mop, vd_ofs, vj_ofs, vk_ofs, oprsz, ctx->vl / 8);
244 static bool gvec_vvv(DisasContext *ctx, arg_vvv *a, MemOp mop,
248 return gvec_vvv_vl(ctx, a, 16, mop, func);
251 static bool gvec_xxx(DisasContext *ctx, arg_vvv *a, MemOp mop,
255 return gvec_vvv_vl(ctx, a, 32, mop, func);
259 uint32_t oprsz, MemOp mop,
270 func(mop, vd_ofs, vj_ofs, oprsz, ctx->vl / 8);
275 static bool gvec_vv(DisasContext *ctx, arg_vv *a, MemOp mop,
279 return gvec_vv_vl(ctx, a, 16, mop, func);
[all …]
/openbmc/qemu/target/mips/tcg/
H A Docteon_translate.c178 static bool trans_lx(DisasContext *ctx, arg_lx *a, MemOp mop) in trans_lx() argument
180 gen_lx(ctx, a->rd, a->base, a->index, mop); in trans_lx()
H A Dtranslate.h172 void gen_lx(DisasContext *ctx, int rd, int base, int index, MemOp mop);
H A Dmxu_translate.c1628 static void gen_mxu_lxx(DisasContext *ctx, uint32_t strd2, MemOp mop) in gen_mxu_lxx() argument
1645 tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx, mop | ctx->default_tcg_memop_mask); in gen_mxu_lxx()
/openbmc/qemu/target/sparc/
H A Dldst_helper.c1159 MemOp mop = get_memop(oi); in helper_ld_code() local
1163 switch (mop & MO_SIZE) { in helper_ld_code()
1166 if (mop & MO_SIGN) { in helper_ld_code()
1172 if ((mop & MO_BSWAP) != MO_TE) { in helper_ld_code()
1175 if (mop & MO_SIGN) { in helper_ld_code()
1181 if ((mop & MO_BSWAP) != MO_TE) { in helper_ld_code()
1184 if (mop & MO_SIGN) { in helper_ld_code()
1190 if ((mop & MO_BSWAP) != MO_TE) { in helper_ld_code()
/openbmc/qemu/target/ppc/translate/
H A Dfixedpoint-impl.c.inc25 bool store, MemOp mop)
36 mop ^= ctx->default_tcg_memop_mask;
38 tcg_gen_qemu_st_tl(cpu_gpr[rt], ea, ctx->mem_idx, mop);
40 tcg_gen_qemu_ld_tl(cpu_gpr[rt], ea, ctx->mem_idx, mop);
49 MemOp mop)
51 return do_ldst(ctx, a->rt, a->ra, tcg_constant_tl(a->si), update, store, mop);
55 bool store, MemOp mop)
61 return do_ldst_D(ctx, &d, update, store, mop);
65 bool store, MemOp mop)
67 return do_ldst(ctx, a->rt, a->ra, cpu_gpr[a->rb], update, store, mop);
H A Dvsx-impl.c.inc1446 #define GEN_VSX_HELPER_VSX_MADD(name, op1, aop, mop, inval, type) \
2183 MemOp mop;
2188 mop = DEF_MEMOP(MO_128 | MO_ATOM_IFALIGN_PAIR);
2203 tcg_gen_qemu_st_i128(data, ea, ctx->mem_idx, mop);
2207 tcg_gen_qemu_st_i128(data, ea, ctx->mem_idx, mop);
2210 tcg_gen_qemu_ld_i128(data, ea, ctx->mem_idx, mop);
2214 tcg_gen_qemu_ld_i128(data, ea, ctx->mem_idx, mop);
2260 MemOp mop;
2269 mop = DEF_MEMOP(MO_UQ);
2276 tcg_gen_qemu_st_i64(xt, ea, ctx->mem_idx, mop);
[all …]
/openbmc/qemu/target/i386/tcg/
H A Dtranslate.c2405 MemOp mop = MO_128 | MO_LE | atom | (align ? MO_ALIGN_16 : 0); in gen_ldo_env_A0() local
2409 tcg_gen_qemu_ld_i128(t, s->A0, mem_index, mop); in gen_ldo_env_A0()
2417 MemOp mop = MO_128 | MO_LE | atom | (align ? MO_ALIGN_16 : 0); in gen_sto_env_A0() local
2422 tcg_gen_qemu_st_i128(t, s->A0, mem_index, mop); in gen_sto_env_A0()
2427 MemOp mop = MO_128 | MO_LE | MO_ATOM_IFALIGN_PAIR; in gen_ldy_env_A0() local
2433 tcg_gen_qemu_ld_i128(t0, s->A0, mem_index, mop | (align ? MO_ALIGN_32 : 0)); in gen_ldy_env_A0()
2435 tcg_gen_qemu_ld_i128(t1, a0_hi, mem_index, mop); in gen_ldy_env_A0()
2443 MemOp mop = MO_128 | MO_LE | MO_ATOM_IFALIGN_PAIR; in gen_sty_env_A0() local
2449 tcg_gen_qemu_st_i128(t, s->A0, mem_index, mop | (align ? MO_ALIGN_32 : 0)); in gen_sty_env_A0()
2452 tcg_gen_qemu_st_i128(t, a0_hi, mem_index, mop); in gen_sty_env_A0()
H A Demit.c.inc1806 MemOp mop = MO_LE | MO_128 | MO_ALIGN;
1817 tcg_gen_atomic_cmpxchg_i128(val, s->A0, cmp, val, s->mem_index, mop);
1819 tcg_gen_nonatomic_cmpxchg_i128(val, s->A0, cmp, val, s->mem_index, mop);
/openbmc/qemu/disas/
H A Dsparc.c1357 #define fmovrs(mop, mask, flags) /* v9 */ \ argument
1358 …fmrrs(mop, F3(2, 0x35, 0)|OPF_LOW5(5)|RCOND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~5)|RCOND(~(mask)), (…
1359 #define fmovrd(mop, mask, flags) /* v9 */ \ argument
1360 …fmrrd(mop, F3(2, 0x35, 0)|OPF_LOW5(6)|RCOND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~6)|RCOND(~(mask)), (…
1361 #define fmovrq(mop, mask, flags) /* v9 */ \ argument
1362 …fmrrq(mop, F3(2, 0x35, 0)|OPF_LOW5(7)|RCOND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~7)|RCOND(~(mask)), (…
/openbmc/qemu/target/riscv/
H A Dinsn32.decode1031 # zicfiss instructions carved out of mop.r
1040 # zicfiss instruction carved out of mop.rr
/openbmc/qemu/tcg/
H A Doptimize.c2371 MemOp mop = get_memop(oi); in fold_qemu_ld_1reg() local
2372 int width = 8 * memop_size(mop); in fold_qemu_ld_1reg()
2376 if (mop & MO_SIGN) { in fold_qemu_ld_1reg()