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Searched refs:mode0 (Results 1 – 19 of 19) sorted by relevance

/openbmc/linux/drivers/pwm/
H A Dpwm-sunplus.c60 u32 dd_freq, duty, mode0, mode1; in sunplus_pwm_apply() local
68 mode0 = readl(priv->base + SP7021_PWM_MODE0); in sunplus_pwm_apply()
69 mode0 &= ~SP7021_PWM_MODE0_PWMEN(pwm->hwpwm); in sunplus_pwm_apply()
70 writel(mode0, priv->base + SP7021_PWM_MODE0); in sunplus_pwm_apply()
104 mode0 = readl(priv->base + SP7021_PWM_MODE0); in sunplus_pwm_apply()
105 mode0 |= SP7021_PWM_MODE0_PWMEN(pwm->hwpwm); in sunplus_pwm_apply()
110 mode0 |= SP7021_PWM_MODE0_BYPASS(pwm->hwpwm); in sunplus_pwm_apply()
123 writel(mode0, priv->base + SP7021_PWM_MODE0); in sunplus_pwm_apply()
132 u32 mode0, dd_freq, duty; in sunplus_pwm_get_state() local
135 mode0 = readl(priv->base + SP7021_PWM_MODE0); in sunplus_pwm_get_state()
[all …]
/openbmc/u-boot/board/samsung/universal_c210/
H A Duniversal.c101 int hwrev, mode0, mode1; in get_hw_revision() local
105 mode0 = get_adc_value(1); /* HWREV_MODE0 */ in get_hw_revision()
115 if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200)) in get_hw_revision()
117 if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200)) in get_hw_revision()
119 if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200)) in get_hw_revision()
121 if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200)) in get_hw_revision()
125 debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev); in get_hw_revision()
/openbmc/linux/arch/mips/cavium-octeon/executive/
H A Dcvmx-helper-util.c221 pko_mode.s.mode0 = 4; in __cvmx_helper_setup_gmx()
223 pko_mode.s.mode0 = 3; in __cvmx_helper_setup_gmx()
225 pko_mode.s.mode0 = 2; in __cvmx_helper_setup_gmx()
227 pko_mode.s.mode0 = 1; in __cvmx_helper_setup_gmx()
229 pko_mode.s.mode0 = 0; in __cvmx_helper_setup_gmx()
/openbmc/openbmc/meta-ampere/meta-jefferson/recipes-ampere/platform/ampere-platform-init/
H A Dampere_platform_init.sh79 gpioset $(gpiofind uart1-mode0)=0 # Set UART Mux to BMC
80 gpioset $(gpiofind uart2-mode0)=0
/openbmc/linux/drivers/gpu/drm/radeon/
H A Drs690.c463 struct drm_display_mode *mode0, in rs690_compute_mode_priority() argument
474 if (mode0 && mode1) { in rs690_compute_mode_priority()
527 } else if (mode0) { in rs690_compute_mode_priority()
586 struct drm_display_mode *mode0 = NULL; in rs690_bandwidth_update() local
600 mode0 = &rdev->mode_info.crtcs[0]->base.mode; in rs690_bandwidth_update()
613 if (mode0) in rs690_bandwidth_update()
619 rs690_line_buffer_adjust(rdev, mode0, mode1); in rs690_bandwidth_update()
638 mode0, mode1, in rs690_bandwidth_update()
642 mode0, mode1, in rs690_bandwidth_update()
H A Drv515.c1082 struct drm_display_mode *mode0, in rv515_compute_mode_priority() argument
1093 if (mode0 && mode1) { in rv515_compute_mode_priority()
1146 } else if (mode0) { in rv515_compute_mode_priority()
1205 struct drm_display_mode *mode0 = NULL; in rv515_bandwidth_avivo_update() local
1214 mode0 = &rdev->mode_info.crtcs[0]->base.mode; in rv515_bandwidth_avivo_update()
1217 rs690_line_buffer_adjust(rdev, mode0, mode1); in rv515_bandwidth_avivo_update()
1231 mode0, mode1, in rv515_bandwidth_avivo_update()
1235 mode0, mode1, in rv515_bandwidth_avivo_update()
1247 struct drm_display_mode *mode0 = NULL; in rv515_bandwidth_update() local
1256 mode0 = &rdev->mode_info.crtcs[0]->base.mode; in rv515_bandwidth_update()
[all …]
H A Drs600.c902 struct drm_display_mode *mode0 = NULL; in rs600_bandwidth_update() local
913 mode0 = &rdev->mode_info.crtcs[0]->base.mode; in rs600_bandwidth_update()
917 rs690_line_buffer_adjust(rdev, mode0, mode1); in rs600_bandwidth_update()
H A Devergreen.c2325 struct drm_display_mode *mode0 = NULL; in evergreen_bandwidth_update() local
2340 mode0 = &rdev->mode_info.crtcs[i]->base.mode; in evergreen_bandwidth_update()
2342 lb_size = evergreen_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode0, mode1); in evergreen_bandwidth_update()
2344 lb_size = evergreen_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i+1], mode1, mode0); in evergreen_bandwidth_update()
H A Dsi.c2461 struct drm_display_mode *mode0 = NULL; in dce6_bandwidth_update() local
2476 mode0 = &rdev->mode_info.crtcs[i]->base.mode; in dce6_bandwidth_update()
2478 lb_size = dce6_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode0, mode1); in dce6_bandwidth_update()
2480 lb_size = dce6_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i+1], mode1, mode0); in dce6_bandwidth_update()
/openbmc/linux/drivers/rtc/
H A Drtc-pcf85063.c269 s8 mode0, mode1, reg; in pcf85063_set_offset() local
277 mode0 = DIV_ROUND_CLOSEST(offset, PCF85063_OFFSET_STEP0); in pcf85063_set_offset()
280 error0 = abs(offset - (mode0 * PCF85063_OFFSET_STEP0)); in pcf85063_set_offset()
283 reg = mode0 & ~PCF85063_OFFSET_MODE; in pcf85063_set_offset()
/openbmc/linux/drivers/block/
H A Dswim.c229 swim_write(base, mode0, 0xf8); in set_swim_mode()
312 swim_write(base, mode0, EXTERNAL_DRIVE); /* clear drive 1 bit */ in swim_drive()
315 swim_write(base, mode0, INTERNAL_DRIVE); /* clear drive 0 bit */ in swim_drive()
471 swim_write(base, mode0, side); in swim_read_sector()
485 swim_write(base, mode0, MOTON); in swim_read_sector()
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-bus-soundwire-master23 clock-stop-mode0 and clock-stop-mode1 properties.
/openbmc/linux/arch/arm/boot/dts/nxp/ls/
H A Dls1021a-iot.dts91 timing0: mode0 {
/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-ampere-mtmitchell.dts1057 /*18C0-18C7*/ "uart1-mode0","uart1-mode1","uart2-mode0","uart2-mode1",
1058 "uart3-mode0","uart3-mode1","uart4-mode0","uart4-mode1",
H A Daspeed-bmc-ampere-mtjefferson.dts618 /*18C0-18C7*/ "uart1-mode0","uart1-mode1","uart2-mode0","uart2-mode1",
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v6_0.c1062 struct drm_display_mode *mode0 = NULL; in dce_v6_0_bandwidth_update() local
1077 mode0 = &adev->mode_info.crtcs[i]->base.mode; in dce_v6_0_bandwidth_update()
1079 lb_size = dce_v6_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i], mode0, mode1); in dce_v6_0_bandwidth_update()
1081 lb_size = dce_v6_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i+1], mode1, mode0); in dce_v6_0_bandwidth_update()
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-am65-iot2050-common.dtsi405 "wkup_gpio0-base", "", "", "", "UART0-mode1", "UART0-mode0",
/openbmc/linux/arch/mips/include/asm/octeon/
H A Dcvmx-pko-defs.h1945 uint64_t mode0:3; member
1947 uint64_t mode0:3;
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Dmotorola-mapphone-common.dtsi453 /* mode0/bpwake 0x4a10014e sdmmc5_dat1.gpio_148 af4 */