| /openbmc/qemu/tests/tcg/mips/include/ |
| H A D | wrappers_mips64r6.h | 28 #define DO_MIPS64R6__RD__RS(suffix, mnemonic) \ argument
34 #mnemonic " $t0, $t1\n\t" \
51 #define DO_MIPS64R6__RD__RS_RT(suffix, mnemonic) \ argument
59 #mnemonic " $t0, $t1, $t2\n\t" \
84 #define DO_MIPS64R6__RT__RS_RT(suffix, mnemonic) \ argument
89 if (strncmp(#mnemonic, "crc32", 5) == 0) \
97 #mnemonic " $t2, $t1, $t2\n\t" \
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| H A D | wrappers_msa.h | 74 #define DO_MSA__WD__WS(suffix, mnemonic) \ argument
81 #mnemonic " $w10, $w11\n\t" \
90 #define DO_MSA__WD__WD(suffix, mnemonic) \ argument
97 #mnemonic " $w10, $w10\n\t" \
107 #define DO_MSA__WD__WS_WT(suffix, mnemonic) \ argument
117 #mnemonic " $w10, $w11, $w12\n\t" \
126 #define DO_MSA__WD__WD_WT(suffix, mnemonic) \ argument
136 #mnemonic " $w10, $w10, $w12\n\t" \
145 #define DO_MSA__WD__WS_WD(suffix, mnemonic) \ argument
155 #mnemonic " $w10, $w11, $w10\n\t" \
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| /openbmc/qemu/target/loongarch/ |
| H A D | disas.c | 160 static void output_r_i(DisasContext *ctx, arg_r_i *a, const char *mnemonic) in output_r_i() argument
162 output(ctx, mnemonic, "r%d, %d", a->rd, a->imm); in output_r_i()
165 static void output_rrr(DisasContext *ctx, arg_rrr *a, const char *mnemonic) in output_rrr() argument
167 output(ctx, mnemonic, "r%d, r%d, r%d", a->rd, a->rj, a->rk); in output_rrr()
170 static void output_rr_i(DisasContext *ctx, arg_rr_i *a, const char *mnemonic) in output_rr_i() argument
172 output(ctx, mnemonic, "r%d, r%d, %d", a->rd, a->rj, a->imm); in output_rr_i()
176 const char *mnemonic) in output_rrr_sa() argument
178 output(ctx, mnemonic, "r%d, r%d, r%d, %d", a->rd, a->rj, a->rk, a->sa); in output_rrr_sa()
181 static void output_rr(DisasContext *ctx, arg_rr *a, const char *mnemonic) in output_rr() argument
183 output(ctx, mnemonic, "r%d, r%d", a->rd, a->rj); in output_rr()
[all …]
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| /openbmc/openbmc/poky/meta/recipes-devtools/binutils/binutils/ |
| H A D | 0007-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch | 4 Subject: [PATCH] fix the incorrect assembling for ppc wait mnemonic
6 The wait mnemonic for ppc targets is incorrectly assembled into 0x7c00003c due
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| /openbmc/qemu/target/avr/ |
| H A D | disas.c | 65 #define output(mnemonic, format, ...) \ argument
67 mnemonic, ##__VA_ARGS__))
110 #define INSN_MNEMONIC(opcode, mnemonic, format, ...) \ argument
113 output(mnemonic, format, ##__VA_ARGS__); \
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| /openbmc/qemu/disas/ |
| H A D | capstone.c | 48 .mnemonic = ".byte",
167 print(stream, " %-8s %s\n", insn->mnemonic, insn->op_str); in cap_dump_insn()
334 cap_insn->mnemonic, cap_insn->op_str); in cap_disas_plugin()
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| /openbmc/openbmc/poky/meta/recipes-devtools/binutils/ |
| H A D | binutils-2.44.inc | 30 file://0007-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch \
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| /openbmc/qemu/target/openrisc/ |
| H A D | disas.c | 30 #define output(mnemonic, format, ...) \ argument
32 mnemonic, ##__VA_ARGS__))
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| /openbmc/qemu/target/ppc/translate/ |
| H A D | misc-impl.c.inc | 31 * BookE uses the msync mnemonic. This means hwsync, except in the
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| /openbmc/openbmc/meta-openembedded/meta-oe/recipes-extended/figlet/figlet/ |
| H A D | 0001-build-add-autotools-support-to-allow-easy-cross-comp.patch | 184 + fonts/mnemonic.flf \
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| /openbmc/u-boot/scripts/ |
| H A D | spelling.txt | 742 mmnemonic||mnemonic
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| /openbmc/qemu/tests/tcg/i386/ |
| H A D | x86.csv | 14 # 1. The Intel manual instruction mnemonic. For example, "SHR r/m32, imm8".
16 # 2. The Go assembler instruction mnemonic. For example, "SHRL imm8, r/m32".
18 # 3. The GNU binutils instruction mnemonic. For example, "shrl imm8, r/m32".
31 # the Intel mnemonic. For example, "rw,r" to denote that "SHR r/m32, imm8"
34 # 10. Whether the opcode used in the Intel mnemonic has encoding forms
51 # Perhaps most significantly, the argument syntaxes used in the mnemonic indicate
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