Searched refs:mmte (Results 1 – 5 of 5) sorted by relevance
3943 *val = env->mmte & MMTE_MASK; in read_mmte()3975 *val = env->mmte & SMTE_MASK; in read_smte()3995 wpri_val |= (env->mmte & ~SMTE_MASK); in write_smte()4003 *val = env->mmte & UMTE_MASK; in read_umte()4022 wpri_val |= (env->mmte & ~UMTE_MASK); in write_umte()4043 env->mmte |= EXT_STATUS_DIRTY; in write_mpmmask()4074 env->mmte |= EXT_STATUS_DIRTY; in write_spmmask()4105 env->mmte |= EXT_STATUS_DIRTY; in write_upmmask()4129 env->mmte |= EXT_STATUS_DIRTY; in write_mpmbase()4160 env->mmte |= EXT_STATUS_DIRTY; in write_spmbase()[all …]
162 if (env->mmte & M_PM_ENABLE) { in riscv_cpu_update_mask()168 if (env->mmte & S_PM_ENABLE) { in riscv_cpu_update_mask()174 if (env->mmte & U_PM_ENABLE) { in riscv_cpu_update_mask()
167 VMSTATE_UINTTL(env.mmte, RISCVCPU),
380 target_ulong mmte; member
895 env->mmte |= (EXT_STATUS_INITIAL | MMTE_M_PM_CURRENT); in riscv_cpu_reset_hold()