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Searched refs:mm_boot_level_value (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dvegam_smumgr.c333 uint32_t mm_boot_level_offset, mm_boot_level_value; in vegam_update_uvd_smc_table() local
345 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in vegam_update_uvd_smc_table()
347 mm_boot_level_value &= 0x00FFFFFF; in vegam_update_uvd_smc_table()
348 mm_boot_level_value |= smu_data->smc_state_table.UvdBootLevel << 24; in vegam_update_uvd_smc_table()
350 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value); in vegam_update_uvd_smc_table()
366 uint32_t mm_boot_level_offset, mm_boot_level_value; in vegam_update_vce_smc_table() local
381 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in vegam_update_vce_smc_table()
383 mm_boot_level_value &= 0xFF00FFFF; in vegam_update_vce_smc_table()
384 mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16; in vegam_update_vce_smc_table()
386 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value); in vegam_update_vce_smc_table()
H A Dfiji_smumgr.c2368 uint32_t mm_boot_level_offset, mm_boot_level_value; in fiji_update_uvd_smc_table() local
2380 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in fiji_update_uvd_smc_table()
2382 mm_boot_level_value &= 0x00FFFFFF; in fiji_update_uvd_smc_table()
2383 mm_boot_level_value |= smu_data->smc_state_table.UvdBootLevel << 24; in fiji_update_uvd_smc_table()
2385 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value); in fiji_update_uvd_smc_table()
2401 uint32_t mm_boot_level_offset, mm_boot_level_value; in fiji_update_vce_smc_table() local
2416 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in fiji_update_vce_smc_table()
2418 mm_boot_level_value &= 0xFF00FFFF; in fiji_update_vce_smc_table()
2419 mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16; in fiji_update_vce_smc_table()
2421 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value); in fiji_update_vce_smc_table()
H A Dpolaris10_smumgr.c2284 uint32_t mm_boot_level_offset, mm_boot_level_value; in polaris10_update_uvd_smc_table() local
2296 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in polaris10_update_uvd_smc_table()
2298 mm_boot_level_value &= 0x00FFFFFF; in polaris10_update_uvd_smc_table()
2299 mm_boot_level_value |= smu_data->smc_state_table.UvdBootLevel << 24; in polaris10_update_uvd_smc_table()
2301 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value); in polaris10_update_uvd_smc_table()
2317 uint32_t mm_boot_level_offset, mm_boot_level_value; in polaris10_update_vce_smc_table() local
2332 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in polaris10_update_vce_smc_table()
2334 mm_boot_level_value &= 0xFF00FFFF; in polaris10_update_vce_smc_table()
2335 mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16; in polaris10_update_vce_smc_table()
2337 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value); in polaris10_update_vce_smc_table()
H A Dtonga_smumgr.c2679 uint32_t mm_boot_level_offset, mm_boot_level_value; in tonga_update_uvd_smc_table() local
2691 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in tonga_update_uvd_smc_table()
2693 mm_boot_level_value &= 0x00FFFFFF; in tonga_update_uvd_smc_table()
2694 mm_boot_level_value |= smu_data->smc_state_table.UvdBootLevel << 24; in tonga_update_uvd_smc_table()
2697 mm_boot_level_offset, mm_boot_level_value); in tonga_update_uvd_smc_table()
2714 uint32_t mm_boot_level_offset, mm_boot_level_value; in tonga_update_vce_smc_table() local
2726 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in tonga_update_vce_smc_table()
2728 mm_boot_level_value &= 0xFF00FFFF; in tonga_update_vce_smc_table()
2729 mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16; in tonga_update_vce_smc_table()
2731 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value); in tonga_update_vce_smc_table()