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Searched refs:mmXDMA_MSTR_PIPE5_XDMA_MSTR_CACHE_BASE_ADDR (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_d.h7287 #define mmXDMA_MSTR_PIPE5_XDMA_MSTR_CACHE_BASE_ADDR 0x458 macro
H A Ddce_11_0_d.h7587 #define mmXDMA_MSTR_PIPE5_XDMA_MSTR_CACHE_BASE_ADDR 0x458 macro
H A Ddce_11_2_d.h8980 #define mmXDMA_MSTR_PIPE5_XDMA_MSTR_CACHE_BASE_ADDR 0x458 macro