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Searched refs:mmWBIF0_SMU_WM_CONTROL (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h1570 #define mmWBIF0_SMU_WM_CONTROL … macro
H A Ddcn_2_1_0_offset.h1180 #define mmWBIF0_SMU_WM_CONTROL … macro
H A Ddcn_2_0_0_offset.h1218 #define mmWBIF0_SMU_WM_CONTROL … macro