Home
last modified time | relevance | path

Searched refs:mmVTG1_CONTROL_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h398 #define mmVTG1_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_3_offset.h1552 #define mmVTG1_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h1769 #define mmVTG1_CONTROL_BASE_IDX … macro
H A Ddcn_1_0_offset.h2263 #define mmVTG1_CONTROL_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h1819 #define mmVTG1_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h1749 #define mmVTG1_CONTROL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h1871 #define mmVTG1_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h1771 #define mmVTG1_CONTROL_BASE_IDX … macro