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Searched refs:mmVTG0_CONTROL (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h395 #define mmVTG0_CONTROL … macro
H A Ddcn_3_0_3_offset.h1549 #define mmVTG0_CONTROL … macro
H A Ddcn_3_0_1_offset.h1766 #define mmVTG0_CONTROL … macro
H A Ddcn_1_0_offset.h2260 #define mmVTG0_CONTROL … macro
H A Ddcn_2_1_0_offset.h1816 #define mmVTG0_CONTROL … macro
H A Ddcn_3_0_2_offset.h1746 #define mmVTG0_CONTROL … macro
H A Ddcn_2_0_0_offset.h1868 #define mmVTG0_CONTROL … macro
H A Ddcn_3_0_0_offset.h1768 #define mmVTG0_CONTROL … macro