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Searched refs:mmVPG1_VPG_MEM_PWR (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h5118 #define mmVPG1_VPG_MEM_PWR … macro
H A Ddcn_3_0_1_offset.h8088 #define mmVPG1_VPG_MEM_PWR … macro
H A Ddcn_3_0_2_offset.h9700 #define mmVPG1_VPG_MEM_PWR … macro
H A Ddcn_3_0_0_offset.h10836 #define mmVPG1_VPG_MEM_PWR … macro