Searched refs:mmUVD_REG_XX_MASK_1_0 (Results 1 – 1 of 1) sorted by relevance
45 #define mmUVD_REG_XX_MASK_1_0 0x05ac macro849 WREG32_SOC15(UVD, 0, mmUVD_REG_XX_MASK_1_0, 0x10); in vcn_v1_0_start_spg_mode()