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Searched refs:mmUMCCH0_0_GeccErrCntSel (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/umc/
H A Dumc_8_7_0_offset.h24 #define mmUMCCH0_0_GeccErrCntSel 0x0328 macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dumc_v8_7.c187 SOC15_REG_OFFSET(UMC, 0, mmUMCCH0_0_GeccErrCntSel); in umc_v8_7_clear_error_count_per_channel()
245 SOC15_REG_OFFSET(UMC, 0, mmUMCCH0_0_GeccErrCntSel); in umc_v8_7_query_correctable_error_count()
397 SOC15_REG_OFFSET(UMC, 0, mmUMCCH0_0_GeccErrCntSel); in umc_v8_7_err_cnt_init_per_channel()