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Searched refs:mmSRBM_SOFT_RESET (Results 1 – 25 of 27) sorted by relevance

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/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dcik_ih.c392 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_ih_soft_reset()
395 WREG32(mmSRBM_SOFT_RESET, tmp); in cik_ih_soft_reset()
396 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_ih_soft_reset()
401 WREG32(mmSRBM_SOFT_RESET, tmp); in cik_ih_soft_reset()
402 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_ih_soft_reset()
H A Diceland_ih.c382 tmp = RREG32(mmSRBM_SOFT_RESET); in iceland_ih_soft_reset()
385 WREG32(mmSRBM_SOFT_RESET, tmp); in iceland_ih_soft_reset()
386 tmp = RREG32(mmSRBM_SOFT_RESET); in iceland_ih_soft_reset()
391 WREG32(mmSRBM_SOFT_RESET, tmp); in iceland_ih_soft_reset()
392 tmp = RREG32(mmSRBM_SOFT_RESET); in iceland_ih_soft_reset()
H A Dcz_ih.c388 tmp = RREG32(mmSRBM_SOFT_RESET); in cz_ih_soft_reset()
391 WREG32(mmSRBM_SOFT_RESET, tmp); in cz_ih_soft_reset()
392 tmp = RREG32(mmSRBM_SOFT_RESET); in cz_ih_soft_reset()
397 WREG32(mmSRBM_SOFT_RESET, tmp); in cz_ih_soft_reset()
398 tmp = RREG32(mmSRBM_SOFT_RESET); in cz_ih_soft_reset()
H A Dtonga_ih.c440 tmp = RREG32(mmSRBM_SOFT_RESET); in tonga_ih_soft_reset()
443 WREG32(mmSRBM_SOFT_RESET, tmp); in tonga_ih_soft_reset()
444 tmp = RREG32(mmSRBM_SOFT_RESET); in tonga_ih_soft_reset()
449 WREG32(mmSRBM_SOFT_RESET, tmp); in tonga_ih_soft_reset()
450 tmp = RREG32(mmSRBM_SOFT_RESET); in tonga_ih_soft_reset()
H A Dgmc_v6_0.c1002 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v6_0_soft_reset()
1005 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v6_0_soft_reset()
1006 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v6_0_soft_reset()
1011 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v6_0_soft_reset()
1012 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v6_0_soft_reset()
H A Dvce_v3_0.c685 tmp = RREG32(mmSRBM_SOFT_RESET); in vce_v3_0_soft_reset()
688 WREG32(mmSRBM_SOFT_RESET, tmp); in vce_v3_0_soft_reset()
689 tmp = RREG32(mmSRBM_SOFT_RESET); in vce_v3_0_soft_reset()
694 WREG32(mmSRBM_SOFT_RESET, tmp); in vce_v3_0_soft_reset()
695 tmp = RREG32(mmSRBM_SOFT_RESET); in vce_v3_0_soft_reset()
H A Dsdma_v2_4.c976 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v2_4_soft_reset()
979 WREG32(mmSRBM_SOFT_RESET, tmp); in sdma_v2_4_soft_reset()
980 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v2_4_soft_reset()
985 WREG32(mmSRBM_SOFT_RESET, tmp); in sdma_v2_4_soft_reset()
986 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v2_4_soft_reset()
H A Dgmc_v7_0.c1198 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v7_0_soft_reset()
1201 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v7_0_soft_reset()
1202 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v7_0_soft_reset()
1207 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v7_0_soft_reset()
1208 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v7_0_soft_reset()
H A Dcik_sdma.c1083 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_sdma_soft_reset()
1086 WREG32(mmSRBM_SOFT_RESET, tmp); in cik_sdma_soft_reset()
1087 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_sdma_soft_reset()
1092 WREG32(mmSRBM_SOFT_RESET, tmp); in cik_sdma_soft_reset()
1093 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_sdma_soft_reset()
H A Dvce_v4_0.c782 tmp = RREG32(mmSRBM_SOFT_RESET);
785 WREG32(mmSRBM_SOFT_RESET, tmp);
786 tmp = RREG32(mmSRBM_SOFT_RESET);
791 WREG32(mmSRBM_SOFT_RESET, tmp);
792 tmp = RREG32(mmSRBM_SOFT_RESET);
H A Dsdma_v3_0.c1310 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v3_0_soft_reset()
1313 WREG32(mmSRBM_SOFT_RESET, tmp); in sdma_v3_0_soft_reset()
1314 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v3_0_soft_reset()
1319 WREG32(mmSRBM_SOFT_RESET, tmp); in sdma_v3_0_soft_reset()
1320 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v3_0_soft_reset()
H A Duvd_v6_0.c1205 tmp = RREG32(mmSRBM_SOFT_RESET); in uvd_v6_0_soft_reset()
1208 WREG32(mmSRBM_SOFT_RESET, tmp); in uvd_v6_0_soft_reset()
1209 tmp = RREG32(mmSRBM_SOFT_RESET); in uvd_v6_0_soft_reset()
1214 WREG32(mmSRBM_SOFT_RESET, tmp); in uvd_v6_0_soft_reset()
1215 tmp = RREG32(mmSRBM_SOFT_RESET); in uvd_v6_0_soft_reset()
H A Dgmc_v8_0.c1351 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v8_0_soft_reset()
1354 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v8_0_soft_reset()
1355 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v8_0_soft_reset()
1360 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v8_0_soft_reset()
1361 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v8_0_soft_reset()
H A Duvd_v4_2.c295 WREG32_P(mmSRBM_SOFT_RESET, 0, ~SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK); in uvd_v4_2_start()
682 WREG32_P(mmSRBM_SOFT_RESET, SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK, in uvd_v4_2_soft_reset()
H A Duvd_v3_1.c337 WREG32_P(mmSRBM_SOFT_RESET, 0, ~SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK); in uvd_v3_1_start()
782 WREG32_P(mmSRBM_SOFT_RESET, SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK, in uvd_v3_1_soft_reset()
H A Duvd_v5_0.c348 WREG32_P(mmSRBM_SOFT_RESET, 0, ~SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK); in uvd_v5_0_start()
604 WREG32_P(mmSRBM_SOFT_RESET, SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK, in uvd_v5_0_soft_reset()
H A Duvd_v7_0.c1529 tmp = RREG32(mmSRBM_SOFT_RESET);
1532 WREG32(mmSRBM_SOFT_RESET, tmp);
1533 tmp = RREG32(mmSRBM_SOFT_RESET);
1538 WREG32(mmSRBM_SOFT_RESET, tmp);
1539 tmp = RREG32(mmSRBM_SOFT_RESET);
H A Ddce_v8_0.c2864 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v8_0_soft_reset()
2867 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v8_0_soft_reset()
2868 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v8_0_soft_reset()
2873 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v8_0_soft_reset()
2874 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v8_0_soft_reset()
H A Ddce_v10_0.c2967 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v10_0_soft_reset()
2970 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v10_0_soft_reset()
2971 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v10_0_soft_reset()
2976 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v10_0_soft_reset()
2977 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v10_0_soft_reset()
H A Ddce_v11_0.c3098 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v11_0_soft_reset()
3101 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v11_0_soft_reset()
3102 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v11_0_soft_reset()
3107 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v11_0_soft_reset()
3108 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v11_0_soft_reset()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_1_0_d.h262 #define mmSRBM_SOFT_RESET 0x0398 macro
H A Doss_2_4_d.h83 #define mmSRBM_SOFT_RESET 0x398 macro
H A Doss_3_0_1_d.h81 #define mmSRBM_SOFT_RESET 0x398 macro
H A Doss_3_0_d.h93 #define mmSRBM_SOFT_RESET 0x398 macro
H A Doss_2_0_d.h77 #define mmSRBM_SOFT_RESET 0x398 macro

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