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Searched refs:mmSQ_EDC_SEC_CNT_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_1_offset.h163 #define mmSQ_EDC_SEC_CNT_BASE_IDX … macro
H A Dgc_9_0_offset.h564 #define mmSQ_EDC_SEC_CNT_BASE_IDX … macro
H A Dgc_9_1_offset.h558 #define mmSQ_EDC_SEC_CNT_BASE_IDX … macro