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Searched refs:mmSPI_PS_INPUT_CNTL_31 (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1245 #define mmSPI_PS_INPUT_CNTL_31 0xA1B0 macro
H A Dgfx_7_2_d.h1409 #define mmSPI_PS_INPUT_CNTL_31 0xa1b0 macro
H A Dgfx_7_0_d.h1392 #define mmSPI_PS_INPUT_CNTL_31 0xa1b0 macro
H A Dgfx_8_0_d.h1588 #define mmSPI_PS_INPUT_CNTL_31 0xa1b0 macro
H A Dgfx_8_1_d.h1556 #define mmSPI_PS_INPUT_CNTL_31 0xa1b0 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h3923 #define mmSPI_PS_INPUT_CNTL_31 … macro
H A Dgc_9_2_1_offset.h4105 #define mmSPI_PS_INPUT_CNTL_31 … macro
H A Dgc_9_1_offset.h4153 #define mmSPI_PS_INPUT_CNTL_31 … macro
H A Dgc_10_1_0_offset.h6323 #define mmSPI_PS_INPUT_CNTL_31 … macro
H A Dgc_10_3_0_offset.h5952 #define mmSPI_PS_INPUT_CNTL_31 … macro