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Searched refs:mmSPI_PS_INPUT_CNTL_0 (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1220 #define mmSPI_PS_INPUT_CNTL_0 0xA191 macro
H A Dgfx_7_2_d.h1378 #define mmSPI_PS_INPUT_CNTL_0 0xa191 macro
H A Dgfx_7_0_d.h1361 #define mmSPI_PS_INPUT_CNTL_0 0xa191 macro
H A Dgfx_8_0_d.h1557 #define mmSPI_PS_INPUT_CNTL_0 0xa191 macro
H A Dgfx_8_1_d.h1525 #define mmSPI_PS_INPUT_CNTL_0 0xa191 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h3861 #define mmSPI_PS_INPUT_CNTL_0 macro
H A Dgc_9_2_1_offset.h4043 #define mmSPI_PS_INPUT_CNTL_0 macro
H A Dgc_9_1_offset.h4091 #define mmSPI_PS_INPUT_CNTL_0 macro
H A Dgc_10_1_0_offset.h6261 #define mmSPI_PS_INPUT_CNTL_0 macro
H A Dgc_10_3_0_offset.h5890 #define mmSPI_PS_INPUT_CNTL_0 macro