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Searched refs:mmSMC_IND_ACCESS_CNTL (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/smu/
H A Dsmu_6_0_d.h130 #define mmSMC_IND_ACCESS_CNTL 0x008A macro
H A Dsmu_7_0_0_d.h89 #define mmSMC_IND_ACCESS_CNTL 0x90 macro
H A Dsmu_7_1_1_d.h90 #define mmSMC_IND_ACCESS_CNTL 0x92 macro
H A Dsmu_7_1_3_d.h96 #define mmSMC_IND_ACCESS_CNTL 0x92 macro
H A Dsmu_7_1_2_d.h93 #define mmSMC_IND_ACCESS_CNTL 0x92 macro
H A Dsmu_7_0_1_d.h91 #define mmSMC_IND_ACCESS_CNTL 0x90 macro
H A Dsmu_7_1_0_d.h90 #define mmSMC_IND_ACCESS_CNTL 0x90 macro
/openbmc/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dkv_smc.c86 WREG32_P(mmSMC_IND_ACCESS_CNTL, 0, in kv_set_smc_sram_address()