1 /* 2 * Copyright (C) 2019 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 18 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 20 */ 21 22 #ifndef _gc_10_3_0_DEFAULT_HEADER 23 #define _gc_10_3_0_DEFAULT_HEADER 24 25 26 // addressBlock: gc_sdma0_sdma0dec 27 #define mmSDMA0_DEC_START_DEFAULT 0x00000000 28 #define mmSDMA0_GLOBAL_TIMESTAMP_LO_DEFAULT 0x00000000 29 #define mmSDMA0_GLOBAL_TIMESTAMP_HI_DEFAULT 0x00000000 30 #define mmSDMA0_PG_CNTL_DEFAULT 0x00000000 31 #define mmSDMA0_PG_CTX_LO_DEFAULT 0x00000000 32 #define mmSDMA0_PG_CTX_HI_DEFAULT 0x00000000 33 #define mmSDMA0_PG_CTX_CNTL_DEFAULT 0x00000000 34 #define mmSDMA0_POWER_CNTL_DEFAULT 0x40000050 35 #define mmSDMA0_CLK_CTRL_DEFAULT 0x00000100 36 #define mmSDMA0_CNTL_DEFAULT 0x000000c2 37 #define mmSDMA0_CHICKEN_BITS_DEFAULT 0x03ef0107 38 #define mmSDMA0_GB_ADDR_CONFIG_DEFAULT 0x00000444 39 #define mmSDMA0_GB_ADDR_CONFIG_READ_DEFAULT 0x00000444 40 #define mmSDMA0_RB_RPTR_FETCH_HI_DEFAULT 0x00000000 41 #define mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL_DEFAULT 0x00000000 42 #define mmSDMA0_RB_RPTR_FETCH_DEFAULT 0x00000000 43 #define mmSDMA0_IB_OFFSET_FETCH_DEFAULT 0x00000000 44 #define mmSDMA0_PROGRAM_DEFAULT 0x00000000 45 #define mmSDMA0_STATUS_REG_DEFAULT 0x46dee557 46 #define mmSDMA0_STATUS1_REG_DEFAULT 0x000003ff 47 #define mmSDMA0_RD_BURST_CNTL_DEFAULT 0x00000002 48 #define mmSDMA0_HBM_PAGE_CONFIG_DEFAULT 0x00000000 49 #define mmSDMA0_UCODE_CHECKSUM_DEFAULT 0x00000000 50 #define mmSDMA0_F32_CNTL_DEFAULT 0x00000001 51 #define mmSDMA0_FREEZE_DEFAULT 0x00000000 52 #define mmSDMA0_PHASE0_QUANTUM_DEFAULT 0x00010002 53 #define mmSDMA0_PHASE1_QUANTUM_DEFAULT 0x00010002 54 #define mmSDMA0_EDC_CONFIG_DEFAULT 0x00000002 55 #define mmSDMA0_BA_THRESHOLD_DEFAULT 0x03ff03ff 56 #define mmSDMA0_ID_DEFAULT 0x00000001 57 #define mmSDMA0_VERSION_DEFAULT 0x00000500 58 #define mmSDMA0_EDC_COUNTER_DEFAULT 0x00000000 59 #define mmSDMA0_EDC_COUNTER_CLEAR_DEFAULT 0x00000000 60 #define mmSDMA0_STATUS2_REG_DEFAULT 0x00000000 61 #define mmSDMA0_ATOMIC_CNTL_DEFAULT 0x00000200 62 #define mmSDMA0_ATOMIC_PREOP_LO_DEFAULT 0x00000000 63 #define mmSDMA0_ATOMIC_PREOP_HI_DEFAULT 0x00000000 64 #define mmSDMA0_UTCL1_CNTL_DEFAULT 0xd0000191 65 #define mmSDMA0_UTCL1_WATERMK_DEFAULT 0xfffbd9fb 66 #define mmSDMA0_UTCL1_RD_STATUS_DEFAULT 0x01011555 67 #define mmSDMA0_UTCL1_WR_STATUS_DEFAULT 0x51011555 68 #define mmSDMA0_UTCL1_INV0_DEFAULT 0x00000800 69 #define mmSDMA0_UTCL1_INV1_DEFAULT 0x00000000 70 #define mmSDMA0_UTCL1_INV2_DEFAULT 0x00000000 71 #define mmSDMA0_UTCL1_RD_XNACK0_DEFAULT 0x00000000 72 #define mmSDMA0_UTCL1_RD_XNACK1_DEFAULT 0x00000000 73 #define mmSDMA0_UTCL1_WR_XNACK0_DEFAULT 0x00000000 74 #define mmSDMA0_UTCL1_WR_XNACK1_DEFAULT 0x00000000 75 #define mmSDMA0_UTCL1_TIMEOUT_DEFAULT 0x00000000 76 #define mmSDMA0_UTCL1_PAGE_DEFAULT 0x010cec00 77 #define mmSDMA0_RELAX_ORDERING_LUT_DEFAULT 0xc0000006 78 #define mmSDMA0_CHICKEN_BITS_2_DEFAULT 0x00100007 79 #define mmSDMA0_STATUS3_REG_DEFAULT 0x03f00000 80 #define mmSDMA0_PHYSICAL_ADDR_LO_DEFAULT 0x00000000 81 #define mmSDMA0_PHYSICAL_ADDR_HI_DEFAULT 0x00000000 82 #define mmSDMA0_PHASE2_QUANTUM_DEFAULT 0x00010002 83 #define mmSDMA0_ERROR_LOG_DEFAULT 0x0000000f 84 #define mmSDMA0_PUB_DUMMY_REG0_DEFAULT 0x00000000 85 #define mmSDMA0_PUB_DUMMY_REG1_DEFAULT 0x00000000 86 #define mmSDMA0_PUB_DUMMY_REG2_DEFAULT 0x00000000 87 #define mmSDMA0_PUB_DUMMY_REG3_DEFAULT 0x00000000 88 #define mmSDMA0_F32_COUNTER_DEFAULT 0x00000000 89 #define mmSDMA0_CRD_CNTL_DEFAULT 0x1850c640 90 #define mmSDMA0_AQL_STATUS_DEFAULT 0x00000003 91 #define mmSDMA0_EA_DBIT_ADDR_DATA_DEFAULT 0x00000000 92 #define mmSDMA0_EA_DBIT_ADDR_INDEX_DEFAULT 0x00000000 93 #define mmSDMA0_TLBI_GCR_CNTL_DEFAULT 0x40180454 94 #define mmSDMA0_TILING_CONFIG_DEFAULT 0x00000000 95 #define mmSDMA0_INT_STATUS_DEFAULT 0x00000000 96 #define mmSDMA0_HOLE_ADDR_LO_DEFAULT 0x00000000 97 #define mmSDMA0_HOLE_ADDR_HI_DEFAULT 0x00000000 98 #define mmSDMA0_CLOCK_GATING_REG_DEFAULT 0x00000000 99 #define mmSDMA0_STATUS4_REG_DEFAULT 0x00000001 100 #define mmSDMA0_SCRATCH_RAM_DATA_DEFAULT 0x00000000 101 #define mmSDMA0_SCRATCH_RAM_ADDR_DEFAULT 0x00000000 102 #define mmSDMA0_TIMESTAMP_CNTL_DEFAULT 0x00000000 103 #define mmSDMA0_STATUS5_REG_DEFAULT 0x00000000 104 #define mmSDMA0_QUEUE_RESET_REQ_DEFAULT 0x00000000 105 #define mmSDMA0_GFX_RB_CNTL_DEFAULT 0x80840000 106 #define mmSDMA0_GFX_RB_BASE_DEFAULT 0x00000000 107 #define mmSDMA0_GFX_RB_BASE_HI_DEFAULT 0x00000000 108 #define mmSDMA0_GFX_RB_RPTR_DEFAULT 0x00000000 109 #define mmSDMA0_GFX_RB_RPTR_HI_DEFAULT 0x00000000 110 #define mmSDMA0_GFX_RB_WPTR_DEFAULT 0x00000000 111 #define mmSDMA0_GFX_RB_WPTR_HI_DEFAULT 0x00000000 112 #define mmSDMA0_GFX_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 113 #define mmSDMA0_GFX_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 114 #define mmSDMA0_GFX_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 115 #define mmSDMA0_GFX_IB_CNTL_DEFAULT 0x00000100 116 #define mmSDMA0_GFX_IB_RPTR_DEFAULT 0x00000000 117 #define mmSDMA0_GFX_IB_OFFSET_DEFAULT 0x00000000 118 #define mmSDMA0_GFX_IB_BASE_LO_DEFAULT 0x00000000 119 #define mmSDMA0_GFX_IB_BASE_HI_DEFAULT 0x00000000 120 #define mmSDMA0_GFX_IB_SIZE_DEFAULT 0x00000000 121 #define mmSDMA0_GFX_SKIP_CNTL_DEFAULT 0x00000000 122 #define mmSDMA0_GFX_CONTEXT_STATUS_DEFAULT 0x00000005 123 #define mmSDMA0_GFX_DOORBELL_DEFAULT 0x00000000 124 #define mmSDMA0_GFX_CONTEXT_CNTL_DEFAULT 0x00000000 125 #define mmSDMA0_GFX_STATUS_DEFAULT 0x00000000 126 #define mmSDMA0_GFX_DOORBELL_LOG_DEFAULT 0x00000000 127 #define mmSDMA0_GFX_WATERMARK_DEFAULT 0x00000000 128 #define mmSDMA0_GFX_DOORBELL_OFFSET_DEFAULT 0x00000000 129 #define mmSDMA0_GFX_CSA_ADDR_LO_DEFAULT 0x00000000 130 #define mmSDMA0_GFX_CSA_ADDR_HI_DEFAULT 0x00000000 131 #define mmSDMA0_GFX_IB_SUB_REMAIN_DEFAULT 0x00000000 132 #define mmSDMA0_GFX_PREEMPT_DEFAULT 0x00000000 133 #define mmSDMA0_GFX_DUMMY_REG_DEFAULT 0x0000000f 134 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 135 #define mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 136 #define mmSDMA0_GFX_RB_AQL_CNTL_DEFAULT 0x00004000 137 #define mmSDMA0_GFX_MINOR_PTR_UPDATE_DEFAULT 0x00000000 138 #define mmSDMA0_GFX_MIDCMD_DATA0_DEFAULT 0x00000000 139 #define mmSDMA0_GFX_MIDCMD_DATA1_DEFAULT 0x00000000 140 #define mmSDMA0_GFX_MIDCMD_DATA2_DEFAULT 0x00000000 141 #define mmSDMA0_GFX_MIDCMD_DATA3_DEFAULT 0x00000000 142 #define mmSDMA0_GFX_MIDCMD_DATA4_DEFAULT 0x00000000 143 #define mmSDMA0_GFX_MIDCMD_DATA5_DEFAULT 0x00000000 144 #define mmSDMA0_GFX_MIDCMD_DATA6_DEFAULT 0x00000000 145 #define mmSDMA0_GFX_MIDCMD_DATA7_DEFAULT 0x00000000 146 #define mmSDMA0_GFX_MIDCMD_DATA8_DEFAULT 0x00000000 147 #define mmSDMA0_GFX_MIDCMD_DATA9_DEFAULT 0x00000000 148 #define mmSDMA0_GFX_MIDCMD_DATA10_DEFAULT 0x00000000 149 #define mmSDMA0_GFX_MIDCMD_CNTL_DEFAULT 0x00000000 150 #define mmSDMA0_PAGE_RB_CNTL_DEFAULT 0x80840000 151 #define mmSDMA0_PAGE_RB_BASE_DEFAULT 0x00000000 152 #define mmSDMA0_PAGE_RB_BASE_HI_DEFAULT 0x00000000 153 #define mmSDMA0_PAGE_RB_RPTR_DEFAULT 0x00000000 154 #define mmSDMA0_PAGE_RB_RPTR_HI_DEFAULT 0x00000000 155 #define mmSDMA0_PAGE_RB_WPTR_DEFAULT 0x00000000 156 #define mmSDMA0_PAGE_RB_WPTR_HI_DEFAULT 0x00000000 157 #define mmSDMA0_PAGE_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 158 #define mmSDMA0_PAGE_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 159 #define mmSDMA0_PAGE_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 160 #define mmSDMA0_PAGE_IB_CNTL_DEFAULT 0x00000100 161 #define mmSDMA0_PAGE_IB_RPTR_DEFAULT 0x00000000 162 #define mmSDMA0_PAGE_IB_OFFSET_DEFAULT 0x00000000 163 #define mmSDMA0_PAGE_IB_BASE_LO_DEFAULT 0x00000000 164 #define mmSDMA0_PAGE_IB_BASE_HI_DEFAULT 0x00000000 165 #define mmSDMA0_PAGE_IB_SIZE_DEFAULT 0x00000000 166 #define mmSDMA0_PAGE_SKIP_CNTL_DEFAULT 0x00000000 167 #define mmSDMA0_PAGE_CONTEXT_STATUS_DEFAULT 0x00000004 168 #define mmSDMA0_PAGE_DOORBELL_DEFAULT 0x00000000 169 #define mmSDMA0_PAGE_STATUS_DEFAULT 0x00000000 170 #define mmSDMA0_PAGE_DOORBELL_LOG_DEFAULT 0x00000000 171 #define mmSDMA0_PAGE_WATERMARK_DEFAULT 0x00000000 172 #define mmSDMA0_PAGE_DOORBELL_OFFSET_DEFAULT 0x00000000 173 #define mmSDMA0_PAGE_CSA_ADDR_LO_DEFAULT 0x00000000 174 #define mmSDMA0_PAGE_CSA_ADDR_HI_DEFAULT 0x00000000 175 #define mmSDMA0_PAGE_IB_SUB_REMAIN_DEFAULT 0x00000000 176 #define mmSDMA0_PAGE_PREEMPT_DEFAULT 0x00000000 177 #define mmSDMA0_PAGE_DUMMY_REG_DEFAULT 0x0000000f 178 #define mmSDMA0_PAGE_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 179 #define mmSDMA0_PAGE_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 180 #define mmSDMA0_PAGE_RB_AQL_CNTL_DEFAULT 0x00004000 181 #define mmSDMA0_PAGE_MINOR_PTR_UPDATE_DEFAULT 0x00000000 182 #define mmSDMA0_PAGE_MIDCMD_DATA0_DEFAULT 0x00000000 183 #define mmSDMA0_PAGE_MIDCMD_DATA1_DEFAULT 0x00000000 184 #define mmSDMA0_PAGE_MIDCMD_DATA2_DEFAULT 0x00000000 185 #define mmSDMA0_PAGE_MIDCMD_DATA3_DEFAULT 0x00000000 186 #define mmSDMA0_PAGE_MIDCMD_DATA4_DEFAULT 0x00000000 187 #define mmSDMA0_PAGE_MIDCMD_DATA5_DEFAULT 0x00000000 188 #define mmSDMA0_PAGE_MIDCMD_DATA6_DEFAULT 0x00000000 189 #define mmSDMA0_PAGE_MIDCMD_DATA7_DEFAULT 0x00000000 190 #define mmSDMA0_PAGE_MIDCMD_DATA8_DEFAULT 0x00000000 191 #define mmSDMA0_PAGE_MIDCMD_DATA9_DEFAULT 0x00000000 192 #define mmSDMA0_PAGE_MIDCMD_DATA10_DEFAULT 0x00000000 193 #define mmSDMA0_PAGE_MIDCMD_CNTL_DEFAULT 0x00000000 194 #define mmSDMA0_RLC0_RB_CNTL_DEFAULT 0x80040000 195 #define mmSDMA0_RLC0_RB_BASE_DEFAULT 0x00000000 196 #define mmSDMA0_RLC0_RB_BASE_HI_DEFAULT 0x00000000 197 #define mmSDMA0_RLC0_RB_RPTR_DEFAULT 0x00000000 198 #define mmSDMA0_RLC0_RB_RPTR_HI_DEFAULT 0x00000000 199 #define mmSDMA0_RLC0_RB_WPTR_DEFAULT 0x00000000 200 #define mmSDMA0_RLC0_RB_WPTR_HI_DEFAULT 0x00000000 201 #define mmSDMA0_RLC0_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 202 #define mmSDMA0_RLC0_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 203 #define mmSDMA0_RLC0_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 204 #define mmSDMA0_RLC0_IB_CNTL_DEFAULT 0x00000100 205 #define mmSDMA0_RLC0_IB_RPTR_DEFAULT 0x00000000 206 #define mmSDMA0_RLC0_IB_OFFSET_DEFAULT 0x00000000 207 #define mmSDMA0_RLC0_IB_BASE_LO_DEFAULT 0x00000000 208 #define mmSDMA0_RLC0_IB_BASE_HI_DEFAULT 0x00000000 209 #define mmSDMA0_RLC0_IB_SIZE_DEFAULT 0x00000000 210 #define mmSDMA0_RLC0_SKIP_CNTL_DEFAULT 0x00000000 211 #define mmSDMA0_RLC0_CONTEXT_STATUS_DEFAULT 0x00000004 212 #define mmSDMA0_RLC0_DOORBELL_DEFAULT 0x00000000 213 #define mmSDMA0_RLC0_STATUS_DEFAULT 0x00000000 214 #define mmSDMA0_RLC0_DOORBELL_LOG_DEFAULT 0x00000000 215 #define mmSDMA0_RLC0_WATERMARK_DEFAULT 0x00000000 216 #define mmSDMA0_RLC0_DOORBELL_OFFSET_DEFAULT 0x00000000 217 #define mmSDMA0_RLC0_CSA_ADDR_LO_DEFAULT 0x00000000 218 #define mmSDMA0_RLC0_CSA_ADDR_HI_DEFAULT 0x00000000 219 #define mmSDMA0_RLC0_IB_SUB_REMAIN_DEFAULT 0x00000000 220 #define mmSDMA0_RLC0_PREEMPT_DEFAULT 0x00000000 221 #define mmSDMA0_RLC0_DUMMY_REG_DEFAULT 0x0000000f 222 #define mmSDMA0_RLC0_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 223 #define mmSDMA0_RLC0_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 224 #define mmSDMA0_RLC0_RB_AQL_CNTL_DEFAULT 0x00004000 225 #define mmSDMA0_RLC0_MINOR_PTR_UPDATE_DEFAULT 0x00000000 226 #define mmSDMA0_RLC0_MIDCMD_DATA0_DEFAULT 0x00000000 227 #define mmSDMA0_RLC0_MIDCMD_DATA1_DEFAULT 0x00000000 228 #define mmSDMA0_RLC0_MIDCMD_DATA2_DEFAULT 0x00000000 229 #define mmSDMA0_RLC0_MIDCMD_DATA3_DEFAULT 0x00000000 230 #define mmSDMA0_RLC0_MIDCMD_DATA4_DEFAULT 0x00000000 231 #define mmSDMA0_RLC0_MIDCMD_DATA5_DEFAULT 0x00000000 232 #define mmSDMA0_RLC0_MIDCMD_DATA6_DEFAULT 0x00000000 233 #define mmSDMA0_RLC0_MIDCMD_DATA7_DEFAULT 0x00000000 234 #define mmSDMA0_RLC0_MIDCMD_DATA8_DEFAULT 0x00000000 235 #define mmSDMA0_RLC0_MIDCMD_DATA9_DEFAULT 0x00000000 236 #define mmSDMA0_RLC0_MIDCMD_DATA10_DEFAULT 0x00000000 237 #define mmSDMA0_RLC0_MIDCMD_CNTL_DEFAULT 0x00000000 238 #define mmSDMA0_RLC1_RB_CNTL_DEFAULT 0x80040000 239 #define mmSDMA0_RLC1_RB_BASE_DEFAULT 0x00000000 240 #define mmSDMA0_RLC1_RB_BASE_HI_DEFAULT 0x00000000 241 #define mmSDMA0_RLC1_RB_RPTR_DEFAULT 0x00000000 242 #define mmSDMA0_RLC1_RB_RPTR_HI_DEFAULT 0x00000000 243 #define mmSDMA0_RLC1_RB_WPTR_DEFAULT 0x00000000 244 #define mmSDMA0_RLC1_RB_WPTR_HI_DEFAULT 0x00000000 245 #define mmSDMA0_RLC1_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 246 #define mmSDMA0_RLC1_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 247 #define mmSDMA0_RLC1_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 248 #define mmSDMA0_RLC1_IB_CNTL_DEFAULT 0x00000100 249 #define mmSDMA0_RLC1_IB_RPTR_DEFAULT 0x00000000 250 #define mmSDMA0_RLC1_IB_OFFSET_DEFAULT 0x00000000 251 #define mmSDMA0_RLC1_IB_BASE_LO_DEFAULT 0x00000000 252 #define mmSDMA0_RLC1_IB_BASE_HI_DEFAULT 0x00000000 253 #define mmSDMA0_RLC1_IB_SIZE_DEFAULT 0x00000000 254 #define mmSDMA0_RLC1_SKIP_CNTL_DEFAULT 0x00000000 255 #define mmSDMA0_RLC1_CONTEXT_STATUS_DEFAULT 0x00000004 256 #define mmSDMA0_RLC1_DOORBELL_DEFAULT 0x00000000 257 #define mmSDMA0_RLC1_STATUS_DEFAULT 0x00000000 258 #define mmSDMA0_RLC1_DOORBELL_LOG_DEFAULT 0x00000000 259 #define mmSDMA0_RLC1_WATERMARK_DEFAULT 0x00000000 260 #define mmSDMA0_RLC1_DOORBELL_OFFSET_DEFAULT 0x00000000 261 #define mmSDMA0_RLC1_CSA_ADDR_LO_DEFAULT 0x00000000 262 #define mmSDMA0_RLC1_CSA_ADDR_HI_DEFAULT 0x00000000 263 #define mmSDMA0_RLC1_IB_SUB_REMAIN_DEFAULT 0x00000000 264 #define mmSDMA0_RLC1_PREEMPT_DEFAULT 0x00000000 265 #define mmSDMA0_RLC1_DUMMY_REG_DEFAULT 0x0000000f 266 #define mmSDMA0_RLC1_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 267 #define mmSDMA0_RLC1_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 268 #define mmSDMA0_RLC1_RB_AQL_CNTL_DEFAULT 0x00004000 269 #define mmSDMA0_RLC1_MINOR_PTR_UPDATE_DEFAULT 0x00000000 270 #define mmSDMA0_RLC1_MIDCMD_DATA0_DEFAULT 0x00000000 271 #define mmSDMA0_RLC1_MIDCMD_DATA1_DEFAULT 0x00000000 272 #define mmSDMA0_RLC1_MIDCMD_DATA2_DEFAULT 0x00000000 273 #define mmSDMA0_RLC1_MIDCMD_DATA3_DEFAULT 0x00000000 274 #define mmSDMA0_RLC1_MIDCMD_DATA4_DEFAULT 0x00000000 275 #define mmSDMA0_RLC1_MIDCMD_DATA5_DEFAULT 0x00000000 276 #define mmSDMA0_RLC1_MIDCMD_DATA6_DEFAULT 0x00000000 277 #define mmSDMA0_RLC1_MIDCMD_DATA7_DEFAULT 0x00000000 278 #define mmSDMA0_RLC1_MIDCMD_DATA8_DEFAULT 0x00000000 279 #define mmSDMA0_RLC1_MIDCMD_DATA9_DEFAULT 0x00000000 280 #define mmSDMA0_RLC1_MIDCMD_DATA10_DEFAULT 0x00000000 281 #define mmSDMA0_RLC1_MIDCMD_CNTL_DEFAULT 0x00000000 282 #define mmSDMA0_RLC2_RB_CNTL_DEFAULT 0x80040000 283 #define mmSDMA0_RLC2_RB_BASE_DEFAULT 0x00000000 284 #define mmSDMA0_RLC2_RB_BASE_HI_DEFAULT 0x00000000 285 #define mmSDMA0_RLC2_RB_RPTR_DEFAULT 0x00000000 286 #define mmSDMA0_RLC2_RB_RPTR_HI_DEFAULT 0x00000000 287 #define mmSDMA0_RLC2_RB_WPTR_DEFAULT 0x00000000 288 #define mmSDMA0_RLC2_RB_WPTR_HI_DEFAULT 0x00000000 289 #define mmSDMA0_RLC2_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 290 #define mmSDMA0_RLC2_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 291 #define mmSDMA0_RLC2_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 292 #define mmSDMA0_RLC2_IB_CNTL_DEFAULT 0x00000100 293 #define mmSDMA0_RLC2_IB_RPTR_DEFAULT 0x00000000 294 #define mmSDMA0_RLC2_IB_OFFSET_DEFAULT 0x00000000 295 #define mmSDMA0_RLC2_IB_BASE_LO_DEFAULT 0x00000000 296 #define mmSDMA0_RLC2_IB_BASE_HI_DEFAULT 0x00000000 297 #define mmSDMA0_RLC2_IB_SIZE_DEFAULT 0x00000000 298 #define mmSDMA0_RLC2_SKIP_CNTL_DEFAULT 0x00000000 299 #define mmSDMA0_RLC2_CONTEXT_STATUS_DEFAULT 0x00000004 300 #define mmSDMA0_RLC2_DOORBELL_DEFAULT 0x00000000 301 #define mmSDMA0_RLC2_STATUS_DEFAULT 0x00000000 302 #define mmSDMA0_RLC2_DOORBELL_LOG_DEFAULT 0x00000000 303 #define mmSDMA0_RLC2_WATERMARK_DEFAULT 0x00000000 304 #define mmSDMA0_RLC2_DOORBELL_OFFSET_DEFAULT 0x00000000 305 #define mmSDMA0_RLC2_CSA_ADDR_LO_DEFAULT 0x00000000 306 #define mmSDMA0_RLC2_CSA_ADDR_HI_DEFAULT 0x00000000 307 #define mmSDMA0_RLC2_IB_SUB_REMAIN_DEFAULT 0x00000000 308 #define mmSDMA0_RLC2_PREEMPT_DEFAULT 0x00000000 309 #define mmSDMA0_RLC2_DUMMY_REG_DEFAULT 0x0000000f 310 #define mmSDMA0_RLC2_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 311 #define mmSDMA0_RLC2_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 312 #define mmSDMA0_RLC2_RB_AQL_CNTL_DEFAULT 0x00004000 313 #define mmSDMA0_RLC2_MINOR_PTR_UPDATE_DEFAULT 0x00000000 314 #define mmSDMA0_RLC2_MIDCMD_DATA0_DEFAULT 0x00000000 315 #define mmSDMA0_RLC2_MIDCMD_DATA1_DEFAULT 0x00000000 316 #define mmSDMA0_RLC2_MIDCMD_DATA2_DEFAULT 0x00000000 317 #define mmSDMA0_RLC2_MIDCMD_DATA3_DEFAULT 0x00000000 318 #define mmSDMA0_RLC2_MIDCMD_DATA4_DEFAULT 0x00000000 319 #define mmSDMA0_RLC2_MIDCMD_DATA5_DEFAULT 0x00000000 320 #define mmSDMA0_RLC2_MIDCMD_DATA6_DEFAULT 0x00000000 321 #define mmSDMA0_RLC2_MIDCMD_DATA7_DEFAULT 0x00000000 322 #define mmSDMA0_RLC2_MIDCMD_DATA8_DEFAULT 0x00000000 323 #define mmSDMA0_RLC2_MIDCMD_DATA9_DEFAULT 0x00000000 324 #define mmSDMA0_RLC2_MIDCMD_DATA10_DEFAULT 0x00000000 325 #define mmSDMA0_RLC2_MIDCMD_CNTL_DEFAULT 0x00000000 326 #define mmSDMA0_RLC3_RB_CNTL_DEFAULT 0x80040000 327 #define mmSDMA0_RLC3_RB_BASE_DEFAULT 0x00000000 328 #define mmSDMA0_RLC3_RB_BASE_HI_DEFAULT 0x00000000 329 #define mmSDMA0_RLC3_RB_RPTR_DEFAULT 0x00000000 330 #define mmSDMA0_RLC3_RB_RPTR_HI_DEFAULT 0x00000000 331 #define mmSDMA0_RLC3_RB_WPTR_DEFAULT 0x00000000 332 #define mmSDMA0_RLC3_RB_WPTR_HI_DEFAULT 0x00000000 333 #define mmSDMA0_RLC3_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 334 #define mmSDMA0_RLC3_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 335 #define mmSDMA0_RLC3_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 336 #define mmSDMA0_RLC3_IB_CNTL_DEFAULT 0x00000100 337 #define mmSDMA0_RLC3_IB_RPTR_DEFAULT 0x00000000 338 #define mmSDMA0_RLC3_IB_OFFSET_DEFAULT 0x00000000 339 #define mmSDMA0_RLC3_IB_BASE_LO_DEFAULT 0x00000000 340 #define mmSDMA0_RLC3_IB_BASE_HI_DEFAULT 0x00000000 341 #define mmSDMA0_RLC3_IB_SIZE_DEFAULT 0x00000000 342 #define mmSDMA0_RLC3_SKIP_CNTL_DEFAULT 0x00000000 343 #define mmSDMA0_RLC3_CONTEXT_STATUS_DEFAULT 0x00000004 344 #define mmSDMA0_RLC3_DOORBELL_DEFAULT 0x00000000 345 #define mmSDMA0_RLC3_STATUS_DEFAULT 0x00000000 346 #define mmSDMA0_RLC3_DOORBELL_LOG_DEFAULT 0x00000000 347 #define mmSDMA0_RLC3_WATERMARK_DEFAULT 0x00000000 348 #define mmSDMA0_RLC3_DOORBELL_OFFSET_DEFAULT 0x00000000 349 #define mmSDMA0_RLC3_CSA_ADDR_LO_DEFAULT 0x00000000 350 #define mmSDMA0_RLC3_CSA_ADDR_HI_DEFAULT 0x00000000 351 #define mmSDMA0_RLC3_IB_SUB_REMAIN_DEFAULT 0x00000000 352 #define mmSDMA0_RLC3_PREEMPT_DEFAULT 0x00000000 353 #define mmSDMA0_RLC3_DUMMY_REG_DEFAULT 0x0000000f 354 #define mmSDMA0_RLC3_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 355 #define mmSDMA0_RLC3_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 356 #define mmSDMA0_RLC3_RB_AQL_CNTL_DEFAULT 0x00004000 357 #define mmSDMA0_RLC3_MINOR_PTR_UPDATE_DEFAULT 0x00000000 358 #define mmSDMA0_RLC3_MIDCMD_DATA0_DEFAULT 0x00000000 359 #define mmSDMA0_RLC3_MIDCMD_DATA1_DEFAULT 0x00000000 360 #define mmSDMA0_RLC3_MIDCMD_DATA2_DEFAULT 0x00000000 361 #define mmSDMA0_RLC3_MIDCMD_DATA3_DEFAULT 0x00000000 362 #define mmSDMA0_RLC3_MIDCMD_DATA4_DEFAULT 0x00000000 363 #define mmSDMA0_RLC3_MIDCMD_DATA5_DEFAULT 0x00000000 364 #define mmSDMA0_RLC3_MIDCMD_DATA6_DEFAULT 0x00000000 365 #define mmSDMA0_RLC3_MIDCMD_DATA7_DEFAULT 0x00000000 366 #define mmSDMA0_RLC3_MIDCMD_DATA8_DEFAULT 0x00000000 367 #define mmSDMA0_RLC3_MIDCMD_DATA9_DEFAULT 0x00000000 368 #define mmSDMA0_RLC3_MIDCMD_DATA10_DEFAULT 0x00000000 369 #define mmSDMA0_RLC3_MIDCMD_CNTL_DEFAULT 0x00000000 370 #define mmSDMA0_RLC4_RB_CNTL_DEFAULT 0x80040000 371 #define mmSDMA0_RLC4_RB_BASE_DEFAULT 0x00000000 372 #define mmSDMA0_RLC4_RB_BASE_HI_DEFAULT 0x00000000 373 #define mmSDMA0_RLC4_RB_RPTR_DEFAULT 0x00000000 374 #define mmSDMA0_RLC4_RB_RPTR_HI_DEFAULT 0x00000000 375 #define mmSDMA0_RLC4_RB_WPTR_DEFAULT 0x00000000 376 #define mmSDMA0_RLC4_RB_WPTR_HI_DEFAULT 0x00000000 377 #define mmSDMA0_RLC4_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 378 #define mmSDMA0_RLC4_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 379 #define mmSDMA0_RLC4_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 380 #define mmSDMA0_RLC4_IB_CNTL_DEFAULT 0x00000100 381 #define mmSDMA0_RLC4_IB_RPTR_DEFAULT 0x00000000 382 #define mmSDMA0_RLC4_IB_OFFSET_DEFAULT 0x00000000 383 #define mmSDMA0_RLC4_IB_BASE_LO_DEFAULT 0x00000000 384 #define mmSDMA0_RLC4_IB_BASE_HI_DEFAULT 0x00000000 385 #define mmSDMA0_RLC4_IB_SIZE_DEFAULT 0x00000000 386 #define mmSDMA0_RLC4_SKIP_CNTL_DEFAULT 0x00000000 387 #define mmSDMA0_RLC4_CONTEXT_STATUS_DEFAULT 0x00000004 388 #define mmSDMA0_RLC4_DOORBELL_DEFAULT 0x00000000 389 #define mmSDMA0_RLC4_STATUS_DEFAULT 0x00000000 390 #define mmSDMA0_RLC4_DOORBELL_LOG_DEFAULT 0x00000000 391 #define mmSDMA0_RLC4_WATERMARK_DEFAULT 0x00000000 392 #define mmSDMA0_RLC4_DOORBELL_OFFSET_DEFAULT 0x00000000 393 #define mmSDMA0_RLC4_CSA_ADDR_LO_DEFAULT 0x00000000 394 #define mmSDMA0_RLC4_CSA_ADDR_HI_DEFAULT 0x00000000 395 #define mmSDMA0_RLC4_IB_SUB_REMAIN_DEFAULT 0x00000000 396 #define mmSDMA0_RLC4_PREEMPT_DEFAULT 0x00000000 397 #define mmSDMA0_RLC4_DUMMY_REG_DEFAULT 0x0000000f 398 #define mmSDMA0_RLC4_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 399 #define mmSDMA0_RLC4_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 400 #define mmSDMA0_RLC4_RB_AQL_CNTL_DEFAULT 0x00004000 401 #define mmSDMA0_RLC4_MINOR_PTR_UPDATE_DEFAULT 0x00000000 402 #define mmSDMA0_RLC4_MIDCMD_DATA0_DEFAULT 0x00000000 403 #define mmSDMA0_RLC4_MIDCMD_DATA1_DEFAULT 0x00000000 404 #define mmSDMA0_RLC4_MIDCMD_DATA2_DEFAULT 0x00000000 405 #define mmSDMA0_RLC4_MIDCMD_DATA3_DEFAULT 0x00000000 406 #define mmSDMA0_RLC4_MIDCMD_DATA4_DEFAULT 0x00000000 407 #define mmSDMA0_RLC4_MIDCMD_DATA5_DEFAULT 0x00000000 408 #define mmSDMA0_RLC4_MIDCMD_DATA6_DEFAULT 0x00000000 409 #define mmSDMA0_RLC4_MIDCMD_DATA7_DEFAULT 0x00000000 410 #define mmSDMA0_RLC4_MIDCMD_DATA8_DEFAULT 0x00000000 411 #define mmSDMA0_RLC4_MIDCMD_DATA9_DEFAULT 0x00000000 412 #define mmSDMA0_RLC4_MIDCMD_DATA10_DEFAULT 0x00000000 413 #define mmSDMA0_RLC4_MIDCMD_CNTL_DEFAULT 0x00000000 414 #define mmSDMA0_RLC5_RB_CNTL_DEFAULT 0x80040000 415 #define mmSDMA0_RLC5_RB_BASE_DEFAULT 0x00000000 416 #define mmSDMA0_RLC5_RB_BASE_HI_DEFAULT 0x00000000 417 #define mmSDMA0_RLC5_RB_RPTR_DEFAULT 0x00000000 418 #define mmSDMA0_RLC5_RB_RPTR_HI_DEFAULT 0x00000000 419 #define mmSDMA0_RLC5_RB_WPTR_DEFAULT 0x00000000 420 #define mmSDMA0_RLC5_RB_WPTR_HI_DEFAULT 0x00000000 421 #define mmSDMA0_RLC5_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 422 #define mmSDMA0_RLC5_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 423 #define mmSDMA0_RLC5_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 424 #define mmSDMA0_RLC5_IB_CNTL_DEFAULT 0x00000100 425 #define mmSDMA0_RLC5_IB_RPTR_DEFAULT 0x00000000 426 #define mmSDMA0_RLC5_IB_OFFSET_DEFAULT 0x00000000 427 #define mmSDMA0_RLC5_IB_BASE_LO_DEFAULT 0x00000000 428 #define mmSDMA0_RLC5_IB_BASE_HI_DEFAULT 0x00000000 429 #define mmSDMA0_RLC5_IB_SIZE_DEFAULT 0x00000000 430 #define mmSDMA0_RLC5_SKIP_CNTL_DEFAULT 0x00000000 431 #define mmSDMA0_RLC5_CONTEXT_STATUS_DEFAULT 0x00000004 432 #define mmSDMA0_RLC5_DOORBELL_DEFAULT 0x00000000 433 #define mmSDMA0_RLC5_STATUS_DEFAULT 0x00000000 434 #define mmSDMA0_RLC5_DOORBELL_LOG_DEFAULT 0x00000000 435 #define mmSDMA0_RLC5_WATERMARK_DEFAULT 0x00000000 436 #define mmSDMA0_RLC5_DOORBELL_OFFSET_DEFAULT 0x00000000 437 #define mmSDMA0_RLC5_CSA_ADDR_LO_DEFAULT 0x00000000 438 #define mmSDMA0_RLC5_CSA_ADDR_HI_DEFAULT 0x00000000 439 #define mmSDMA0_RLC5_IB_SUB_REMAIN_DEFAULT 0x00000000 440 #define mmSDMA0_RLC5_PREEMPT_DEFAULT 0x00000000 441 #define mmSDMA0_RLC5_DUMMY_REG_DEFAULT 0x0000000f 442 #define mmSDMA0_RLC5_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 443 #define mmSDMA0_RLC5_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 444 #define mmSDMA0_RLC5_RB_AQL_CNTL_DEFAULT 0x00004000 445 #define mmSDMA0_RLC5_MINOR_PTR_UPDATE_DEFAULT 0x00000000 446 #define mmSDMA0_RLC5_MIDCMD_DATA0_DEFAULT 0x00000000 447 #define mmSDMA0_RLC5_MIDCMD_DATA1_DEFAULT 0x00000000 448 #define mmSDMA0_RLC5_MIDCMD_DATA2_DEFAULT 0x00000000 449 #define mmSDMA0_RLC5_MIDCMD_DATA3_DEFAULT 0x00000000 450 #define mmSDMA0_RLC5_MIDCMD_DATA4_DEFAULT 0x00000000 451 #define mmSDMA0_RLC5_MIDCMD_DATA5_DEFAULT 0x00000000 452 #define mmSDMA0_RLC5_MIDCMD_DATA6_DEFAULT 0x00000000 453 #define mmSDMA0_RLC5_MIDCMD_DATA7_DEFAULT 0x00000000 454 #define mmSDMA0_RLC5_MIDCMD_DATA8_DEFAULT 0x00000000 455 #define mmSDMA0_RLC5_MIDCMD_DATA9_DEFAULT 0x00000000 456 #define mmSDMA0_RLC5_MIDCMD_DATA10_DEFAULT 0x00000000 457 #define mmSDMA0_RLC5_MIDCMD_CNTL_DEFAULT 0x00000000 458 #define mmSDMA0_RLC6_RB_CNTL_DEFAULT 0x80040000 459 #define mmSDMA0_RLC6_RB_BASE_DEFAULT 0x00000000 460 #define mmSDMA0_RLC6_RB_BASE_HI_DEFAULT 0x00000000 461 #define mmSDMA0_RLC6_RB_RPTR_DEFAULT 0x00000000 462 #define mmSDMA0_RLC6_RB_RPTR_HI_DEFAULT 0x00000000 463 #define mmSDMA0_RLC6_RB_WPTR_DEFAULT 0x00000000 464 #define mmSDMA0_RLC6_RB_WPTR_HI_DEFAULT 0x00000000 465 #define mmSDMA0_RLC6_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 466 #define mmSDMA0_RLC6_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 467 #define mmSDMA0_RLC6_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 468 #define mmSDMA0_RLC6_IB_CNTL_DEFAULT 0x00000100 469 #define mmSDMA0_RLC6_IB_RPTR_DEFAULT 0x00000000 470 #define mmSDMA0_RLC6_IB_OFFSET_DEFAULT 0x00000000 471 #define mmSDMA0_RLC6_IB_BASE_LO_DEFAULT 0x00000000 472 #define mmSDMA0_RLC6_IB_BASE_HI_DEFAULT 0x00000000 473 #define mmSDMA0_RLC6_IB_SIZE_DEFAULT 0x00000000 474 #define mmSDMA0_RLC6_SKIP_CNTL_DEFAULT 0x00000000 475 #define mmSDMA0_RLC6_CONTEXT_STATUS_DEFAULT 0x00000004 476 #define mmSDMA0_RLC6_DOORBELL_DEFAULT 0x00000000 477 #define mmSDMA0_RLC6_STATUS_DEFAULT 0x00000000 478 #define mmSDMA0_RLC6_DOORBELL_LOG_DEFAULT 0x00000000 479 #define mmSDMA0_RLC6_WATERMARK_DEFAULT 0x00000000 480 #define mmSDMA0_RLC6_DOORBELL_OFFSET_DEFAULT 0x00000000 481 #define mmSDMA0_RLC6_CSA_ADDR_LO_DEFAULT 0x00000000 482 #define mmSDMA0_RLC6_CSA_ADDR_HI_DEFAULT 0x00000000 483 #define mmSDMA0_RLC6_IB_SUB_REMAIN_DEFAULT 0x00000000 484 #define mmSDMA0_RLC6_PREEMPT_DEFAULT 0x00000000 485 #define mmSDMA0_RLC6_DUMMY_REG_DEFAULT 0x0000000f 486 #define mmSDMA0_RLC6_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 487 #define mmSDMA0_RLC6_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 488 #define mmSDMA0_RLC6_RB_AQL_CNTL_DEFAULT 0x00004000 489 #define mmSDMA0_RLC6_MINOR_PTR_UPDATE_DEFAULT 0x00000000 490 #define mmSDMA0_RLC6_MIDCMD_DATA0_DEFAULT 0x00000000 491 #define mmSDMA0_RLC6_MIDCMD_DATA1_DEFAULT 0x00000000 492 #define mmSDMA0_RLC6_MIDCMD_DATA2_DEFAULT 0x00000000 493 #define mmSDMA0_RLC6_MIDCMD_DATA3_DEFAULT 0x00000000 494 #define mmSDMA0_RLC6_MIDCMD_DATA4_DEFAULT 0x00000000 495 #define mmSDMA0_RLC6_MIDCMD_DATA5_DEFAULT 0x00000000 496 #define mmSDMA0_RLC6_MIDCMD_DATA6_DEFAULT 0x00000000 497 #define mmSDMA0_RLC6_MIDCMD_DATA7_DEFAULT 0x00000000 498 #define mmSDMA0_RLC6_MIDCMD_DATA8_DEFAULT 0x00000000 499 #define mmSDMA0_RLC6_MIDCMD_DATA9_DEFAULT 0x00000000 500 #define mmSDMA0_RLC6_MIDCMD_DATA10_DEFAULT 0x00000000 501 #define mmSDMA0_RLC6_MIDCMD_CNTL_DEFAULT 0x00000000 502 #define mmSDMA0_RLC7_RB_CNTL_DEFAULT 0x80040000 503 #define mmSDMA0_RLC7_RB_BASE_DEFAULT 0x00000000 504 #define mmSDMA0_RLC7_RB_BASE_HI_DEFAULT 0x00000000 505 #define mmSDMA0_RLC7_RB_RPTR_DEFAULT 0x00000000 506 #define mmSDMA0_RLC7_RB_RPTR_HI_DEFAULT 0x00000000 507 #define mmSDMA0_RLC7_RB_WPTR_DEFAULT 0x00000000 508 #define mmSDMA0_RLC7_RB_WPTR_HI_DEFAULT 0x00000000 509 #define mmSDMA0_RLC7_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 510 #define mmSDMA0_RLC7_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 511 #define mmSDMA0_RLC7_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 512 #define mmSDMA0_RLC7_IB_CNTL_DEFAULT 0x00000100 513 #define mmSDMA0_RLC7_IB_RPTR_DEFAULT 0x00000000 514 #define mmSDMA0_RLC7_IB_OFFSET_DEFAULT 0x00000000 515 #define mmSDMA0_RLC7_IB_BASE_LO_DEFAULT 0x00000000 516 #define mmSDMA0_RLC7_IB_BASE_HI_DEFAULT 0x00000000 517 #define mmSDMA0_RLC7_IB_SIZE_DEFAULT 0x00000000 518 #define mmSDMA0_RLC7_SKIP_CNTL_DEFAULT 0x00000000 519 #define mmSDMA0_RLC7_CONTEXT_STATUS_DEFAULT 0x00000004 520 #define mmSDMA0_RLC7_DOORBELL_DEFAULT 0x00000000 521 #define mmSDMA0_RLC7_STATUS_DEFAULT 0x00000000 522 #define mmSDMA0_RLC7_DOORBELL_LOG_DEFAULT 0x00000000 523 #define mmSDMA0_RLC7_WATERMARK_DEFAULT 0x00000000 524 #define mmSDMA0_RLC7_DOORBELL_OFFSET_DEFAULT 0x00000000 525 #define mmSDMA0_RLC7_CSA_ADDR_LO_DEFAULT 0x00000000 526 #define mmSDMA0_RLC7_CSA_ADDR_HI_DEFAULT 0x00000000 527 #define mmSDMA0_RLC7_IB_SUB_REMAIN_DEFAULT 0x00000000 528 #define mmSDMA0_RLC7_PREEMPT_DEFAULT 0x00000000 529 #define mmSDMA0_RLC7_DUMMY_REG_DEFAULT 0x0000000f 530 #define mmSDMA0_RLC7_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 531 #define mmSDMA0_RLC7_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 532 #define mmSDMA0_RLC7_RB_AQL_CNTL_DEFAULT 0x00004000 533 #define mmSDMA0_RLC7_MINOR_PTR_UPDATE_DEFAULT 0x00000000 534 #define mmSDMA0_RLC7_MIDCMD_DATA0_DEFAULT 0x00000000 535 #define mmSDMA0_RLC7_MIDCMD_DATA1_DEFAULT 0x00000000 536 #define mmSDMA0_RLC7_MIDCMD_DATA2_DEFAULT 0x00000000 537 #define mmSDMA0_RLC7_MIDCMD_DATA3_DEFAULT 0x00000000 538 #define mmSDMA0_RLC7_MIDCMD_DATA4_DEFAULT 0x00000000 539 #define mmSDMA0_RLC7_MIDCMD_DATA5_DEFAULT 0x00000000 540 #define mmSDMA0_RLC7_MIDCMD_DATA6_DEFAULT 0x00000000 541 #define mmSDMA0_RLC7_MIDCMD_DATA7_DEFAULT 0x00000000 542 #define mmSDMA0_RLC7_MIDCMD_DATA8_DEFAULT 0x00000000 543 #define mmSDMA0_RLC7_MIDCMD_DATA9_DEFAULT 0x00000000 544 #define mmSDMA0_RLC7_MIDCMD_DATA10_DEFAULT 0x00000000 545 #define mmSDMA0_RLC7_MIDCMD_CNTL_DEFAULT 0x00000000 546 547 548 // addressBlock: gc_sdma1_sdma1dec 549 #define mmSDMA1_DEC_START_DEFAULT 0x00000000 550 #define mmSDMA1_GLOBAL_TIMESTAMP_LO_DEFAULT 0x00000000 551 #define mmSDMA1_GLOBAL_TIMESTAMP_HI_DEFAULT 0x00000000 552 #define mmSDMA1_PG_CNTL_DEFAULT 0x00000000 553 #define mmSDMA1_PG_CTX_LO_DEFAULT 0x00000000 554 #define mmSDMA1_PG_CTX_HI_DEFAULT 0x00000000 555 #define mmSDMA1_PG_CTX_CNTL_DEFAULT 0x00000000 556 #define mmSDMA1_POWER_CNTL_DEFAULT 0x40000050 557 #define mmSDMA1_CLK_CTRL_DEFAULT 0x00000100 558 #define mmSDMA1_CNTL_DEFAULT 0x000000c2 559 #define mmSDMA1_CHICKEN_BITS_DEFAULT 0x03ef0107 560 #define mmSDMA1_GB_ADDR_CONFIG_DEFAULT 0x00000444 561 #define mmSDMA1_GB_ADDR_CONFIG_READ_DEFAULT 0x00000444 562 #define mmSDMA1_RB_RPTR_FETCH_HI_DEFAULT 0x00000000 563 #define mmSDMA1_SEM_WAIT_FAIL_TIMER_CNTL_DEFAULT 0x00000000 564 #define mmSDMA1_RB_RPTR_FETCH_DEFAULT 0x00000000 565 #define mmSDMA1_IB_OFFSET_FETCH_DEFAULT 0x00000000 566 #define mmSDMA1_PROGRAM_DEFAULT 0x00000000 567 #define mmSDMA1_STATUS_REG_DEFAULT 0x46dee557 568 #define mmSDMA1_STATUS1_REG_DEFAULT 0x000003ff 569 #define mmSDMA1_RD_BURST_CNTL_DEFAULT 0x00000002 570 #define mmSDMA1_HBM_PAGE_CONFIG_DEFAULT 0x00000000 571 #define mmSDMA1_UCODE_CHECKSUM_DEFAULT 0x00000000 572 #define mmSDMA1_F32_CNTL_DEFAULT 0x00000001 573 #define mmSDMA1_FREEZE_DEFAULT 0x00000000 574 #define mmSDMA1_PHASE0_QUANTUM_DEFAULT 0x00010002 575 #define mmSDMA1_PHASE1_QUANTUM_DEFAULT 0x00010002 576 #define mmSDMA1_EDC_CONFIG_DEFAULT 0x00000002 577 #define mmSDMA1_BA_THRESHOLD_DEFAULT 0x03ff03ff 578 #define mmSDMA1_ID_DEFAULT 0x00000001 579 #define mmSDMA1_VERSION_DEFAULT 0x00000500 580 #define mmSDMA1_EDC_COUNTER_DEFAULT 0x00000000 581 #define mmSDMA1_EDC_COUNTER_CLEAR_DEFAULT 0x00000000 582 #define mmSDMA1_STATUS2_REG_DEFAULT 0x00000001 583 #define mmSDMA1_ATOMIC_CNTL_DEFAULT 0x00000200 584 #define mmSDMA1_ATOMIC_PREOP_LO_DEFAULT 0x00000000 585 #define mmSDMA1_ATOMIC_PREOP_HI_DEFAULT 0x00000000 586 #define mmSDMA1_UTCL1_CNTL_DEFAULT 0xd0000191 587 #define mmSDMA1_UTCL1_WATERMK_DEFAULT 0xfffbd9fb 588 #define mmSDMA1_UTCL1_RD_STATUS_DEFAULT 0x01011555 589 #define mmSDMA1_UTCL1_WR_STATUS_DEFAULT 0x51011555 590 #define mmSDMA1_UTCL1_INV0_DEFAULT 0x00000800 591 #define mmSDMA1_UTCL1_INV1_DEFAULT 0x00000000 592 #define mmSDMA1_UTCL1_INV2_DEFAULT 0x00000000 593 #define mmSDMA1_UTCL1_RD_XNACK0_DEFAULT 0x00000000 594 #define mmSDMA1_UTCL1_RD_XNACK1_DEFAULT 0x00000000 595 #define mmSDMA1_UTCL1_WR_XNACK0_DEFAULT 0x00000000 596 #define mmSDMA1_UTCL1_WR_XNACK1_DEFAULT 0x00000000 597 #define mmSDMA1_UTCL1_TIMEOUT_DEFAULT 0x00000000 598 #define mmSDMA1_UTCL1_PAGE_DEFAULT 0x010cec00 599 #define mmSDMA1_RELAX_ORDERING_LUT_DEFAULT 0xc0000006 600 #define mmSDMA1_CHICKEN_BITS_2_DEFAULT 0x00100007 601 #define mmSDMA1_STATUS3_REG_DEFAULT 0x03f00000 602 #define mmSDMA1_PHYSICAL_ADDR_LO_DEFAULT 0x00000000 603 #define mmSDMA1_PHYSICAL_ADDR_HI_DEFAULT 0x00000000 604 #define mmSDMA1_PHASE2_QUANTUM_DEFAULT 0x00010002 605 #define mmSDMA1_ERROR_LOG_DEFAULT 0x0000000f 606 #define mmSDMA1_PUB_DUMMY_REG0_DEFAULT 0x00000000 607 #define mmSDMA1_PUB_DUMMY_REG1_DEFAULT 0x00000000 608 #define mmSDMA1_PUB_DUMMY_REG2_DEFAULT 0x00000000 609 #define mmSDMA1_PUB_DUMMY_REG3_DEFAULT 0x00000000 610 #define mmSDMA1_F32_COUNTER_DEFAULT 0x00000000 611 #define mmSDMA1_CRD_CNTL_DEFAULT 0x1850c640 612 #define mmSDMA1_AQL_STATUS_DEFAULT 0x00000003 613 #define mmSDMA1_EA_DBIT_ADDR_DATA_DEFAULT 0x00000000 614 #define mmSDMA1_EA_DBIT_ADDR_INDEX_DEFAULT 0x00000000 615 #define mmSDMA1_TLBI_GCR_CNTL_DEFAULT 0x40180454 616 #define mmSDMA1_TILING_CONFIG_DEFAULT 0x00000000 617 #define mmSDMA1_INT_STATUS_DEFAULT 0x00000000 618 #define mmSDMA1_HOLE_ADDR_LO_DEFAULT 0x00000000 619 #define mmSDMA1_HOLE_ADDR_HI_DEFAULT 0x00000000 620 #define mmSDMA1_CLOCK_GATING_REG_DEFAULT 0x00000000 621 #define mmSDMA1_STATUS4_REG_DEFAULT 0x00000001 622 #define mmSDMA1_SCRATCH_RAM_DATA_DEFAULT 0x00000000 623 #define mmSDMA1_SCRATCH_RAM_ADDR_DEFAULT 0x00000000 624 #define mmSDMA1_TIMESTAMP_CNTL_DEFAULT 0x00000000 625 #define mmSDMA1_STATUS5_REG_DEFAULT 0x00000000 626 #define mmSDMA1_QUEUE_RESET_REQ_DEFAULT 0x00000000 627 #define mmSDMA1_GFX_RB_CNTL_DEFAULT 0x80840000 628 #define mmSDMA1_GFX_RB_BASE_DEFAULT 0x00000000 629 #define mmSDMA1_GFX_RB_BASE_HI_DEFAULT 0x00000000 630 #define mmSDMA1_GFX_RB_RPTR_DEFAULT 0x00000000 631 #define mmSDMA1_GFX_RB_RPTR_HI_DEFAULT 0x00000000 632 #define mmSDMA1_GFX_RB_WPTR_DEFAULT 0x00000000 633 #define mmSDMA1_GFX_RB_WPTR_HI_DEFAULT 0x00000000 634 #define mmSDMA1_GFX_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 635 #define mmSDMA1_GFX_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 636 #define mmSDMA1_GFX_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 637 #define mmSDMA1_GFX_IB_CNTL_DEFAULT 0x00000100 638 #define mmSDMA1_GFX_IB_RPTR_DEFAULT 0x00000000 639 #define mmSDMA1_GFX_IB_OFFSET_DEFAULT 0x00000000 640 #define mmSDMA1_GFX_IB_BASE_LO_DEFAULT 0x00000000 641 #define mmSDMA1_GFX_IB_BASE_HI_DEFAULT 0x00000000 642 #define mmSDMA1_GFX_IB_SIZE_DEFAULT 0x00000000 643 #define mmSDMA1_GFX_SKIP_CNTL_DEFAULT 0x00000000 644 #define mmSDMA1_GFX_CONTEXT_STATUS_DEFAULT 0x00000005 645 #define mmSDMA1_GFX_DOORBELL_DEFAULT 0x00000000 646 #define mmSDMA1_GFX_CONTEXT_CNTL_DEFAULT 0x00000000 647 #define mmSDMA1_GFX_STATUS_DEFAULT 0x00000000 648 #define mmSDMA1_GFX_DOORBELL_LOG_DEFAULT 0x00000000 649 #define mmSDMA1_GFX_WATERMARK_DEFAULT 0x00000000 650 #define mmSDMA1_GFX_DOORBELL_OFFSET_DEFAULT 0x00000000 651 #define mmSDMA1_GFX_CSA_ADDR_LO_DEFAULT 0x00000000 652 #define mmSDMA1_GFX_CSA_ADDR_HI_DEFAULT 0x00000000 653 #define mmSDMA1_GFX_IB_SUB_REMAIN_DEFAULT 0x00000000 654 #define mmSDMA1_GFX_PREEMPT_DEFAULT 0x00000000 655 #define mmSDMA1_GFX_DUMMY_REG_DEFAULT 0x0000000f 656 #define mmSDMA1_GFX_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 657 #define mmSDMA1_GFX_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 658 #define mmSDMA1_GFX_RB_AQL_CNTL_DEFAULT 0x00004000 659 #define mmSDMA1_GFX_MINOR_PTR_UPDATE_DEFAULT 0x00000000 660 #define mmSDMA1_GFX_MIDCMD_DATA0_DEFAULT 0x00000000 661 #define mmSDMA1_GFX_MIDCMD_DATA1_DEFAULT 0x00000000 662 #define mmSDMA1_GFX_MIDCMD_DATA2_DEFAULT 0x00000000 663 #define mmSDMA1_GFX_MIDCMD_DATA3_DEFAULT 0x00000000 664 #define mmSDMA1_GFX_MIDCMD_DATA4_DEFAULT 0x00000000 665 #define mmSDMA1_GFX_MIDCMD_DATA5_DEFAULT 0x00000000 666 #define mmSDMA1_GFX_MIDCMD_DATA6_DEFAULT 0x00000000 667 #define mmSDMA1_GFX_MIDCMD_DATA7_DEFAULT 0x00000000 668 #define mmSDMA1_GFX_MIDCMD_DATA8_DEFAULT 0x00000000 669 #define mmSDMA1_GFX_MIDCMD_DATA9_DEFAULT 0x00000000 670 #define mmSDMA1_GFX_MIDCMD_DATA10_DEFAULT 0x00000000 671 #define mmSDMA1_GFX_MIDCMD_CNTL_DEFAULT 0x00000000 672 #define mmSDMA1_PAGE_RB_CNTL_DEFAULT 0x80840000 673 #define mmSDMA1_PAGE_RB_BASE_DEFAULT 0x00000000 674 #define mmSDMA1_PAGE_RB_BASE_HI_DEFAULT 0x00000000 675 #define mmSDMA1_PAGE_RB_RPTR_DEFAULT 0x00000000 676 #define mmSDMA1_PAGE_RB_RPTR_HI_DEFAULT 0x00000000 677 #define mmSDMA1_PAGE_RB_WPTR_DEFAULT 0x00000000 678 #define mmSDMA1_PAGE_RB_WPTR_HI_DEFAULT 0x00000000 679 #define mmSDMA1_PAGE_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 680 #define mmSDMA1_PAGE_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 681 #define mmSDMA1_PAGE_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 682 #define mmSDMA1_PAGE_IB_CNTL_DEFAULT 0x00000100 683 #define mmSDMA1_PAGE_IB_RPTR_DEFAULT 0x00000000 684 #define mmSDMA1_PAGE_IB_OFFSET_DEFAULT 0x00000000 685 #define mmSDMA1_PAGE_IB_BASE_LO_DEFAULT 0x00000000 686 #define mmSDMA1_PAGE_IB_BASE_HI_DEFAULT 0x00000000 687 #define mmSDMA1_PAGE_IB_SIZE_DEFAULT 0x00000000 688 #define mmSDMA1_PAGE_SKIP_CNTL_DEFAULT 0x00000000 689 #define mmSDMA1_PAGE_CONTEXT_STATUS_DEFAULT 0x00000004 690 #define mmSDMA1_PAGE_DOORBELL_DEFAULT 0x00000000 691 #define mmSDMA1_PAGE_STATUS_DEFAULT 0x00000000 692 #define mmSDMA1_PAGE_DOORBELL_LOG_DEFAULT 0x00000000 693 #define mmSDMA1_PAGE_WATERMARK_DEFAULT 0x00000000 694 #define mmSDMA1_PAGE_DOORBELL_OFFSET_DEFAULT 0x00000000 695 #define mmSDMA1_PAGE_CSA_ADDR_LO_DEFAULT 0x00000000 696 #define mmSDMA1_PAGE_CSA_ADDR_HI_DEFAULT 0x00000000 697 #define mmSDMA1_PAGE_IB_SUB_REMAIN_DEFAULT 0x00000000 698 #define mmSDMA1_PAGE_PREEMPT_DEFAULT 0x00000000 699 #define mmSDMA1_PAGE_DUMMY_REG_DEFAULT 0x0000000f 700 #define mmSDMA1_PAGE_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 701 #define mmSDMA1_PAGE_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 702 #define mmSDMA1_PAGE_RB_AQL_CNTL_DEFAULT 0x00004000 703 #define mmSDMA1_PAGE_MINOR_PTR_UPDATE_DEFAULT 0x00000000 704 #define mmSDMA1_PAGE_MIDCMD_DATA0_DEFAULT 0x00000000 705 #define mmSDMA1_PAGE_MIDCMD_DATA1_DEFAULT 0x00000000 706 #define mmSDMA1_PAGE_MIDCMD_DATA2_DEFAULT 0x00000000 707 #define mmSDMA1_PAGE_MIDCMD_DATA3_DEFAULT 0x00000000 708 #define mmSDMA1_PAGE_MIDCMD_DATA4_DEFAULT 0x00000000 709 #define mmSDMA1_PAGE_MIDCMD_DATA5_DEFAULT 0x00000000 710 #define mmSDMA1_PAGE_MIDCMD_DATA6_DEFAULT 0x00000000 711 #define mmSDMA1_PAGE_MIDCMD_DATA7_DEFAULT 0x00000000 712 #define mmSDMA1_PAGE_MIDCMD_DATA8_DEFAULT 0x00000000 713 #define mmSDMA1_PAGE_MIDCMD_DATA9_DEFAULT 0x00000000 714 #define mmSDMA1_PAGE_MIDCMD_DATA10_DEFAULT 0x00000000 715 #define mmSDMA1_PAGE_MIDCMD_CNTL_DEFAULT 0x00000000 716 #define mmSDMA1_RLC0_RB_CNTL_DEFAULT 0x80040000 717 #define mmSDMA1_RLC0_RB_BASE_DEFAULT 0x00000000 718 #define mmSDMA1_RLC0_RB_BASE_HI_DEFAULT 0x00000000 719 #define mmSDMA1_RLC0_RB_RPTR_DEFAULT 0x00000000 720 #define mmSDMA1_RLC0_RB_RPTR_HI_DEFAULT 0x00000000 721 #define mmSDMA1_RLC0_RB_WPTR_DEFAULT 0x00000000 722 #define mmSDMA1_RLC0_RB_WPTR_HI_DEFAULT 0x00000000 723 #define mmSDMA1_RLC0_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 724 #define mmSDMA1_RLC0_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 725 #define mmSDMA1_RLC0_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 726 #define mmSDMA1_RLC0_IB_CNTL_DEFAULT 0x00000100 727 #define mmSDMA1_RLC0_IB_RPTR_DEFAULT 0x00000000 728 #define mmSDMA1_RLC0_IB_OFFSET_DEFAULT 0x00000000 729 #define mmSDMA1_RLC0_IB_BASE_LO_DEFAULT 0x00000000 730 #define mmSDMA1_RLC0_IB_BASE_HI_DEFAULT 0x00000000 731 #define mmSDMA1_RLC0_IB_SIZE_DEFAULT 0x00000000 732 #define mmSDMA1_RLC0_SKIP_CNTL_DEFAULT 0x00000000 733 #define mmSDMA1_RLC0_CONTEXT_STATUS_DEFAULT 0x00000004 734 #define mmSDMA1_RLC0_DOORBELL_DEFAULT 0x00000000 735 #define mmSDMA1_RLC0_STATUS_DEFAULT 0x00000000 736 #define mmSDMA1_RLC0_DOORBELL_LOG_DEFAULT 0x00000000 737 #define mmSDMA1_RLC0_WATERMARK_DEFAULT 0x00000000 738 #define mmSDMA1_RLC0_DOORBELL_OFFSET_DEFAULT 0x00000000 739 #define mmSDMA1_RLC0_CSA_ADDR_LO_DEFAULT 0x00000000 740 #define mmSDMA1_RLC0_CSA_ADDR_HI_DEFAULT 0x00000000 741 #define mmSDMA1_RLC0_IB_SUB_REMAIN_DEFAULT 0x00000000 742 #define mmSDMA1_RLC0_PREEMPT_DEFAULT 0x00000000 743 #define mmSDMA1_RLC0_DUMMY_REG_DEFAULT 0x0000000f 744 #define mmSDMA1_RLC0_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 745 #define mmSDMA1_RLC0_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 746 #define mmSDMA1_RLC0_RB_AQL_CNTL_DEFAULT 0x00004000 747 #define mmSDMA1_RLC0_MINOR_PTR_UPDATE_DEFAULT 0x00000000 748 #define mmSDMA1_RLC0_MIDCMD_DATA0_DEFAULT 0x00000000 749 #define mmSDMA1_RLC0_MIDCMD_DATA1_DEFAULT 0x00000000 750 #define mmSDMA1_RLC0_MIDCMD_DATA2_DEFAULT 0x00000000 751 #define mmSDMA1_RLC0_MIDCMD_DATA3_DEFAULT 0x00000000 752 #define mmSDMA1_RLC0_MIDCMD_DATA4_DEFAULT 0x00000000 753 #define mmSDMA1_RLC0_MIDCMD_DATA5_DEFAULT 0x00000000 754 #define mmSDMA1_RLC0_MIDCMD_DATA6_DEFAULT 0x00000000 755 #define mmSDMA1_RLC0_MIDCMD_DATA7_DEFAULT 0x00000000 756 #define mmSDMA1_RLC0_MIDCMD_DATA8_DEFAULT 0x00000000 757 #define mmSDMA1_RLC0_MIDCMD_DATA9_DEFAULT 0x00000000 758 #define mmSDMA1_RLC0_MIDCMD_DATA10_DEFAULT 0x00000000 759 #define mmSDMA1_RLC0_MIDCMD_CNTL_DEFAULT 0x00000000 760 #define mmSDMA1_RLC1_RB_CNTL_DEFAULT 0x80040000 761 #define mmSDMA1_RLC1_RB_BASE_DEFAULT 0x00000000 762 #define mmSDMA1_RLC1_RB_BASE_HI_DEFAULT 0x00000000 763 #define mmSDMA1_RLC1_RB_RPTR_DEFAULT 0x00000000 764 #define mmSDMA1_RLC1_RB_RPTR_HI_DEFAULT 0x00000000 765 #define mmSDMA1_RLC1_RB_WPTR_DEFAULT 0x00000000 766 #define mmSDMA1_RLC1_RB_WPTR_HI_DEFAULT 0x00000000 767 #define mmSDMA1_RLC1_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 768 #define mmSDMA1_RLC1_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 769 #define mmSDMA1_RLC1_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 770 #define mmSDMA1_RLC1_IB_CNTL_DEFAULT 0x00000100 771 #define mmSDMA1_RLC1_IB_RPTR_DEFAULT 0x00000000 772 #define mmSDMA1_RLC1_IB_OFFSET_DEFAULT 0x00000000 773 #define mmSDMA1_RLC1_IB_BASE_LO_DEFAULT 0x00000000 774 #define mmSDMA1_RLC1_IB_BASE_HI_DEFAULT 0x00000000 775 #define mmSDMA1_RLC1_IB_SIZE_DEFAULT 0x00000000 776 #define mmSDMA1_RLC1_SKIP_CNTL_DEFAULT 0x00000000 777 #define mmSDMA1_RLC1_CONTEXT_STATUS_DEFAULT 0x00000004 778 #define mmSDMA1_RLC1_DOORBELL_DEFAULT 0x00000000 779 #define mmSDMA1_RLC1_STATUS_DEFAULT 0x00000000 780 #define mmSDMA1_RLC1_DOORBELL_LOG_DEFAULT 0x00000000 781 #define mmSDMA1_RLC1_WATERMARK_DEFAULT 0x00000000 782 #define mmSDMA1_RLC1_DOORBELL_OFFSET_DEFAULT 0x00000000 783 #define mmSDMA1_RLC1_CSA_ADDR_LO_DEFAULT 0x00000000 784 #define mmSDMA1_RLC1_CSA_ADDR_HI_DEFAULT 0x00000000 785 #define mmSDMA1_RLC1_IB_SUB_REMAIN_DEFAULT 0x00000000 786 #define mmSDMA1_RLC1_PREEMPT_DEFAULT 0x00000000 787 #define mmSDMA1_RLC1_DUMMY_REG_DEFAULT 0x0000000f 788 #define mmSDMA1_RLC1_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 789 #define mmSDMA1_RLC1_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 790 #define mmSDMA1_RLC1_RB_AQL_CNTL_DEFAULT 0x00004000 791 #define mmSDMA1_RLC1_MINOR_PTR_UPDATE_DEFAULT 0x00000000 792 #define mmSDMA1_RLC1_MIDCMD_DATA0_DEFAULT 0x00000000 793 #define mmSDMA1_RLC1_MIDCMD_DATA1_DEFAULT 0x00000000 794 #define mmSDMA1_RLC1_MIDCMD_DATA2_DEFAULT 0x00000000 795 #define mmSDMA1_RLC1_MIDCMD_DATA3_DEFAULT 0x00000000 796 #define mmSDMA1_RLC1_MIDCMD_DATA4_DEFAULT 0x00000000 797 #define mmSDMA1_RLC1_MIDCMD_DATA5_DEFAULT 0x00000000 798 #define mmSDMA1_RLC1_MIDCMD_DATA6_DEFAULT 0x00000000 799 #define mmSDMA1_RLC1_MIDCMD_DATA7_DEFAULT 0x00000000 800 #define mmSDMA1_RLC1_MIDCMD_DATA8_DEFAULT 0x00000000 801 #define mmSDMA1_RLC1_MIDCMD_DATA9_DEFAULT 0x00000000 802 #define mmSDMA1_RLC1_MIDCMD_DATA10_DEFAULT 0x00000000 803 #define mmSDMA1_RLC1_MIDCMD_CNTL_DEFAULT 0x00000000 804 #define mmSDMA1_RLC2_RB_CNTL_DEFAULT 0x80040000 805 #define mmSDMA1_RLC2_RB_BASE_DEFAULT 0x00000000 806 #define mmSDMA1_RLC2_RB_BASE_HI_DEFAULT 0x00000000 807 #define mmSDMA1_RLC2_RB_RPTR_DEFAULT 0x00000000 808 #define mmSDMA1_RLC2_RB_RPTR_HI_DEFAULT 0x00000000 809 #define mmSDMA1_RLC2_RB_WPTR_DEFAULT 0x00000000 810 #define mmSDMA1_RLC2_RB_WPTR_HI_DEFAULT 0x00000000 811 #define mmSDMA1_RLC2_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 812 #define mmSDMA1_RLC2_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 813 #define mmSDMA1_RLC2_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 814 #define mmSDMA1_RLC2_IB_CNTL_DEFAULT 0x00000100 815 #define mmSDMA1_RLC2_IB_RPTR_DEFAULT 0x00000000 816 #define mmSDMA1_RLC2_IB_OFFSET_DEFAULT 0x00000000 817 #define mmSDMA1_RLC2_IB_BASE_LO_DEFAULT 0x00000000 818 #define mmSDMA1_RLC2_IB_BASE_HI_DEFAULT 0x00000000 819 #define mmSDMA1_RLC2_IB_SIZE_DEFAULT 0x00000000 820 #define mmSDMA1_RLC2_SKIP_CNTL_DEFAULT 0x00000000 821 #define mmSDMA1_RLC2_CONTEXT_STATUS_DEFAULT 0x00000004 822 #define mmSDMA1_RLC2_DOORBELL_DEFAULT 0x00000000 823 #define mmSDMA1_RLC2_STATUS_DEFAULT 0x00000000 824 #define mmSDMA1_RLC2_DOORBELL_LOG_DEFAULT 0x00000000 825 #define mmSDMA1_RLC2_WATERMARK_DEFAULT 0x00000000 826 #define mmSDMA1_RLC2_DOORBELL_OFFSET_DEFAULT 0x00000000 827 #define mmSDMA1_RLC2_CSA_ADDR_LO_DEFAULT 0x00000000 828 #define mmSDMA1_RLC2_CSA_ADDR_HI_DEFAULT 0x00000000 829 #define mmSDMA1_RLC2_IB_SUB_REMAIN_DEFAULT 0x00000000 830 #define mmSDMA1_RLC2_PREEMPT_DEFAULT 0x00000000 831 #define mmSDMA1_RLC2_DUMMY_REG_DEFAULT 0x0000000f 832 #define mmSDMA1_RLC2_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 833 #define mmSDMA1_RLC2_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 834 #define mmSDMA1_RLC2_RB_AQL_CNTL_DEFAULT 0x00004000 835 #define mmSDMA1_RLC2_MINOR_PTR_UPDATE_DEFAULT 0x00000000 836 #define mmSDMA1_RLC2_MIDCMD_DATA0_DEFAULT 0x00000000 837 #define mmSDMA1_RLC2_MIDCMD_DATA1_DEFAULT 0x00000000 838 #define mmSDMA1_RLC2_MIDCMD_DATA2_DEFAULT 0x00000000 839 #define mmSDMA1_RLC2_MIDCMD_DATA3_DEFAULT 0x00000000 840 #define mmSDMA1_RLC2_MIDCMD_DATA4_DEFAULT 0x00000000 841 #define mmSDMA1_RLC2_MIDCMD_DATA5_DEFAULT 0x00000000 842 #define mmSDMA1_RLC2_MIDCMD_DATA6_DEFAULT 0x00000000 843 #define mmSDMA1_RLC2_MIDCMD_DATA7_DEFAULT 0x00000000 844 #define mmSDMA1_RLC2_MIDCMD_DATA8_DEFAULT 0x00000000 845 #define mmSDMA1_RLC2_MIDCMD_DATA9_DEFAULT 0x00000000 846 #define mmSDMA1_RLC2_MIDCMD_DATA10_DEFAULT 0x00000000 847 #define mmSDMA1_RLC2_MIDCMD_CNTL_DEFAULT 0x00000000 848 #define mmSDMA1_RLC3_RB_CNTL_DEFAULT 0x80040000 849 #define mmSDMA1_RLC3_RB_BASE_DEFAULT 0x00000000 850 #define mmSDMA1_RLC3_RB_BASE_HI_DEFAULT 0x00000000 851 #define mmSDMA1_RLC3_RB_RPTR_DEFAULT 0x00000000 852 #define mmSDMA1_RLC3_RB_RPTR_HI_DEFAULT 0x00000000 853 #define mmSDMA1_RLC3_RB_WPTR_DEFAULT 0x00000000 854 #define mmSDMA1_RLC3_RB_WPTR_HI_DEFAULT 0x00000000 855 #define mmSDMA1_RLC3_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 856 #define mmSDMA1_RLC3_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 857 #define mmSDMA1_RLC3_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 858 #define mmSDMA1_RLC3_IB_CNTL_DEFAULT 0x00000100 859 #define mmSDMA1_RLC3_IB_RPTR_DEFAULT 0x00000000 860 #define mmSDMA1_RLC3_IB_OFFSET_DEFAULT 0x00000000 861 #define mmSDMA1_RLC3_IB_BASE_LO_DEFAULT 0x00000000 862 #define mmSDMA1_RLC3_IB_BASE_HI_DEFAULT 0x00000000 863 #define mmSDMA1_RLC3_IB_SIZE_DEFAULT 0x00000000 864 #define mmSDMA1_RLC3_SKIP_CNTL_DEFAULT 0x00000000 865 #define mmSDMA1_RLC3_CONTEXT_STATUS_DEFAULT 0x00000004 866 #define mmSDMA1_RLC3_DOORBELL_DEFAULT 0x00000000 867 #define mmSDMA1_RLC3_STATUS_DEFAULT 0x00000000 868 #define mmSDMA1_RLC3_DOORBELL_LOG_DEFAULT 0x00000000 869 #define mmSDMA1_RLC3_WATERMARK_DEFAULT 0x00000000 870 #define mmSDMA1_RLC3_DOORBELL_OFFSET_DEFAULT 0x00000000 871 #define mmSDMA1_RLC3_CSA_ADDR_LO_DEFAULT 0x00000000 872 #define mmSDMA1_RLC3_CSA_ADDR_HI_DEFAULT 0x00000000 873 #define mmSDMA1_RLC3_IB_SUB_REMAIN_DEFAULT 0x00000000 874 #define mmSDMA1_RLC3_PREEMPT_DEFAULT 0x00000000 875 #define mmSDMA1_RLC3_DUMMY_REG_DEFAULT 0x0000000f 876 #define mmSDMA1_RLC3_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 877 #define mmSDMA1_RLC3_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 878 #define mmSDMA1_RLC3_RB_AQL_CNTL_DEFAULT 0x00004000 879 #define mmSDMA1_RLC3_MINOR_PTR_UPDATE_DEFAULT 0x00000000 880 #define mmSDMA1_RLC3_MIDCMD_DATA0_DEFAULT 0x00000000 881 #define mmSDMA1_RLC3_MIDCMD_DATA1_DEFAULT 0x00000000 882 #define mmSDMA1_RLC3_MIDCMD_DATA2_DEFAULT 0x00000000 883 #define mmSDMA1_RLC3_MIDCMD_DATA3_DEFAULT 0x00000000 884 #define mmSDMA1_RLC3_MIDCMD_DATA4_DEFAULT 0x00000000 885 #define mmSDMA1_RLC3_MIDCMD_DATA5_DEFAULT 0x00000000 886 #define mmSDMA1_RLC3_MIDCMD_DATA6_DEFAULT 0x00000000 887 #define mmSDMA1_RLC3_MIDCMD_DATA7_DEFAULT 0x00000000 888 #define mmSDMA1_RLC3_MIDCMD_DATA8_DEFAULT 0x00000000 889 #define mmSDMA1_RLC3_MIDCMD_DATA9_DEFAULT 0x00000000 890 #define mmSDMA1_RLC3_MIDCMD_DATA10_DEFAULT 0x00000000 891 #define mmSDMA1_RLC3_MIDCMD_CNTL_DEFAULT 0x00000000 892 #define mmSDMA1_RLC4_RB_CNTL_DEFAULT 0x80040000 893 #define mmSDMA1_RLC4_RB_BASE_DEFAULT 0x00000000 894 #define mmSDMA1_RLC4_RB_BASE_HI_DEFAULT 0x00000000 895 #define mmSDMA1_RLC4_RB_RPTR_DEFAULT 0x00000000 896 #define mmSDMA1_RLC4_RB_RPTR_HI_DEFAULT 0x00000000 897 #define mmSDMA1_RLC4_RB_WPTR_DEFAULT 0x00000000 898 #define mmSDMA1_RLC4_RB_WPTR_HI_DEFAULT 0x00000000 899 #define mmSDMA1_RLC4_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 900 #define mmSDMA1_RLC4_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 901 #define mmSDMA1_RLC4_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 902 #define mmSDMA1_RLC4_IB_CNTL_DEFAULT 0x00000100 903 #define mmSDMA1_RLC4_IB_RPTR_DEFAULT 0x00000000 904 #define mmSDMA1_RLC4_IB_OFFSET_DEFAULT 0x00000000 905 #define mmSDMA1_RLC4_IB_BASE_LO_DEFAULT 0x00000000 906 #define mmSDMA1_RLC4_IB_BASE_HI_DEFAULT 0x00000000 907 #define mmSDMA1_RLC4_IB_SIZE_DEFAULT 0x00000000 908 #define mmSDMA1_RLC4_SKIP_CNTL_DEFAULT 0x00000000 909 #define mmSDMA1_RLC4_CONTEXT_STATUS_DEFAULT 0x00000004 910 #define mmSDMA1_RLC4_DOORBELL_DEFAULT 0x00000000 911 #define mmSDMA1_RLC4_STATUS_DEFAULT 0x00000000 912 #define mmSDMA1_RLC4_DOORBELL_LOG_DEFAULT 0x00000000 913 #define mmSDMA1_RLC4_WATERMARK_DEFAULT 0x00000000 914 #define mmSDMA1_RLC4_DOORBELL_OFFSET_DEFAULT 0x00000000 915 #define mmSDMA1_RLC4_CSA_ADDR_LO_DEFAULT 0x00000000 916 #define mmSDMA1_RLC4_CSA_ADDR_HI_DEFAULT 0x00000000 917 #define mmSDMA1_RLC4_IB_SUB_REMAIN_DEFAULT 0x00000000 918 #define mmSDMA1_RLC4_PREEMPT_DEFAULT 0x00000000 919 #define mmSDMA1_RLC4_DUMMY_REG_DEFAULT 0x0000000f 920 #define mmSDMA1_RLC4_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 921 #define mmSDMA1_RLC4_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 922 #define mmSDMA1_RLC4_RB_AQL_CNTL_DEFAULT 0x00004000 923 #define mmSDMA1_RLC4_MINOR_PTR_UPDATE_DEFAULT 0x00000000 924 #define mmSDMA1_RLC4_MIDCMD_DATA0_DEFAULT 0x00000000 925 #define mmSDMA1_RLC4_MIDCMD_DATA1_DEFAULT 0x00000000 926 #define mmSDMA1_RLC4_MIDCMD_DATA2_DEFAULT 0x00000000 927 #define mmSDMA1_RLC4_MIDCMD_DATA3_DEFAULT 0x00000000 928 #define mmSDMA1_RLC4_MIDCMD_DATA4_DEFAULT 0x00000000 929 #define mmSDMA1_RLC4_MIDCMD_DATA5_DEFAULT 0x00000000 930 #define mmSDMA1_RLC4_MIDCMD_DATA6_DEFAULT 0x00000000 931 #define mmSDMA1_RLC4_MIDCMD_DATA7_DEFAULT 0x00000000 932 #define mmSDMA1_RLC4_MIDCMD_DATA8_DEFAULT 0x00000000 933 #define mmSDMA1_RLC4_MIDCMD_DATA9_DEFAULT 0x00000000 934 #define mmSDMA1_RLC4_MIDCMD_DATA10_DEFAULT 0x00000000 935 #define mmSDMA1_RLC4_MIDCMD_CNTL_DEFAULT 0x00000000 936 #define mmSDMA1_RLC5_RB_CNTL_DEFAULT 0x80040000 937 #define mmSDMA1_RLC5_RB_BASE_DEFAULT 0x00000000 938 #define mmSDMA1_RLC5_RB_BASE_HI_DEFAULT 0x00000000 939 #define mmSDMA1_RLC5_RB_RPTR_DEFAULT 0x00000000 940 #define mmSDMA1_RLC5_RB_RPTR_HI_DEFAULT 0x00000000 941 #define mmSDMA1_RLC5_RB_WPTR_DEFAULT 0x00000000 942 #define mmSDMA1_RLC5_RB_WPTR_HI_DEFAULT 0x00000000 943 #define mmSDMA1_RLC5_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 944 #define mmSDMA1_RLC5_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 945 #define mmSDMA1_RLC5_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 946 #define mmSDMA1_RLC5_IB_CNTL_DEFAULT 0x00000100 947 #define mmSDMA1_RLC5_IB_RPTR_DEFAULT 0x00000000 948 #define mmSDMA1_RLC5_IB_OFFSET_DEFAULT 0x00000000 949 #define mmSDMA1_RLC5_IB_BASE_LO_DEFAULT 0x00000000 950 #define mmSDMA1_RLC5_IB_BASE_HI_DEFAULT 0x00000000 951 #define mmSDMA1_RLC5_IB_SIZE_DEFAULT 0x00000000 952 #define mmSDMA1_RLC5_SKIP_CNTL_DEFAULT 0x00000000 953 #define mmSDMA1_RLC5_CONTEXT_STATUS_DEFAULT 0x00000004 954 #define mmSDMA1_RLC5_DOORBELL_DEFAULT 0x00000000 955 #define mmSDMA1_RLC5_STATUS_DEFAULT 0x00000000 956 #define mmSDMA1_RLC5_DOORBELL_LOG_DEFAULT 0x00000000 957 #define mmSDMA1_RLC5_WATERMARK_DEFAULT 0x00000000 958 #define mmSDMA1_RLC5_DOORBELL_OFFSET_DEFAULT 0x00000000 959 #define mmSDMA1_RLC5_CSA_ADDR_LO_DEFAULT 0x00000000 960 #define mmSDMA1_RLC5_CSA_ADDR_HI_DEFAULT 0x00000000 961 #define mmSDMA1_RLC5_IB_SUB_REMAIN_DEFAULT 0x00000000 962 #define mmSDMA1_RLC5_PREEMPT_DEFAULT 0x00000000 963 #define mmSDMA1_RLC5_DUMMY_REG_DEFAULT 0x0000000f 964 #define mmSDMA1_RLC5_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 965 #define mmSDMA1_RLC5_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 966 #define mmSDMA1_RLC5_RB_AQL_CNTL_DEFAULT 0x00004000 967 #define mmSDMA1_RLC5_MINOR_PTR_UPDATE_DEFAULT 0x00000000 968 #define mmSDMA1_RLC5_MIDCMD_DATA0_DEFAULT 0x00000000 969 #define mmSDMA1_RLC5_MIDCMD_DATA1_DEFAULT 0x00000000 970 #define mmSDMA1_RLC5_MIDCMD_DATA2_DEFAULT 0x00000000 971 #define mmSDMA1_RLC5_MIDCMD_DATA3_DEFAULT 0x00000000 972 #define mmSDMA1_RLC5_MIDCMD_DATA4_DEFAULT 0x00000000 973 #define mmSDMA1_RLC5_MIDCMD_DATA5_DEFAULT 0x00000000 974 #define mmSDMA1_RLC5_MIDCMD_DATA6_DEFAULT 0x00000000 975 #define mmSDMA1_RLC5_MIDCMD_DATA7_DEFAULT 0x00000000 976 #define mmSDMA1_RLC5_MIDCMD_DATA8_DEFAULT 0x00000000 977 #define mmSDMA1_RLC5_MIDCMD_DATA9_DEFAULT 0x00000000 978 #define mmSDMA1_RLC5_MIDCMD_DATA10_DEFAULT 0x00000000 979 #define mmSDMA1_RLC5_MIDCMD_CNTL_DEFAULT 0x00000000 980 #define mmSDMA1_RLC6_RB_CNTL_DEFAULT 0x80040000 981 #define mmSDMA1_RLC6_RB_BASE_DEFAULT 0x00000000 982 #define mmSDMA1_RLC6_RB_BASE_HI_DEFAULT 0x00000000 983 #define mmSDMA1_RLC6_RB_RPTR_DEFAULT 0x00000000 984 #define mmSDMA1_RLC6_RB_RPTR_HI_DEFAULT 0x00000000 985 #define mmSDMA1_RLC6_RB_WPTR_DEFAULT 0x00000000 986 #define mmSDMA1_RLC6_RB_WPTR_HI_DEFAULT 0x00000000 987 #define mmSDMA1_RLC6_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 988 #define mmSDMA1_RLC6_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 989 #define mmSDMA1_RLC6_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 990 #define mmSDMA1_RLC6_IB_CNTL_DEFAULT 0x00000100 991 #define mmSDMA1_RLC6_IB_RPTR_DEFAULT 0x00000000 992 #define mmSDMA1_RLC6_IB_OFFSET_DEFAULT 0x00000000 993 #define mmSDMA1_RLC6_IB_BASE_LO_DEFAULT 0x00000000 994 #define mmSDMA1_RLC6_IB_BASE_HI_DEFAULT 0x00000000 995 #define mmSDMA1_RLC6_IB_SIZE_DEFAULT 0x00000000 996 #define mmSDMA1_RLC6_SKIP_CNTL_DEFAULT 0x00000000 997 #define mmSDMA1_RLC6_CONTEXT_STATUS_DEFAULT 0x00000004 998 #define mmSDMA1_RLC6_DOORBELL_DEFAULT 0x00000000 999 #define mmSDMA1_RLC6_STATUS_DEFAULT 0x00000000 1000 #define mmSDMA1_RLC6_DOORBELL_LOG_DEFAULT 0x00000000 1001 #define mmSDMA1_RLC6_WATERMARK_DEFAULT 0x00000000 1002 #define mmSDMA1_RLC6_DOORBELL_OFFSET_DEFAULT 0x00000000 1003 #define mmSDMA1_RLC6_CSA_ADDR_LO_DEFAULT 0x00000000 1004 #define mmSDMA1_RLC6_CSA_ADDR_HI_DEFAULT 0x00000000 1005 #define mmSDMA1_RLC6_IB_SUB_REMAIN_DEFAULT 0x00000000 1006 #define mmSDMA1_RLC6_PREEMPT_DEFAULT 0x00000000 1007 #define mmSDMA1_RLC6_DUMMY_REG_DEFAULT 0x0000000f 1008 #define mmSDMA1_RLC6_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 1009 #define mmSDMA1_RLC6_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 1010 #define mmSDMA1_RLC6_RB_AQL_CNTL_DEFAULT 0x00004000 1011 #define mmSDMA1_RLC6_MINOR_PTR_UPDATE_DEFAULT 0x00000000 1012 #define mmSDMA1_RLC6_MIDCMD_DATA0_DEFAULT 0x00000000 1013 #define mmSDMA1_RLC6_MIDCMD_DATA1_DEFAULT 0x00000000 1014 #define mmSDMA1_RLC6_MIDCMD_DATA2_DEFAULT 0x00000000 1015 #define mmSDMA1_RLC6_MIDCMD_DATA3_DEFAULT 0x00000000 1016 #define mmSDMA1_RLC6_MIDCMD_DATA4_DEFAULT 0x00000000 1017 #define mmSDMA1_RLC6_MIDCMD_DATA5_DEFAULT 0x00000000 1018 #define mmSDMA1_RLC6_MIDCMD_DATA6_DEFAULT 0x00000000 1019 #define mmSDMA1_RLC6_MIDCMD_DATA7_DEFAULT 0x00000000 1020 #define mmSDMA1_RLC6_MIDCMD_DATA8_DEFAULT 0x00000000 1021 #define mmSDMA1_RLC6_MIDCMD_DATA9_DEFAULT 0x00000000 1022 #define mmSDMA1_RLC6_MIDCMD_DATA10_DEFAULT 0x00000000 1023 #define mmSDMA1_RLC6_MIDCMD_CNTL_DEFAULT 0x00000000 1024 #define mmSDMA1_RLC7_RB_CNTL_DEFAULT 0x80040000 1025 #define mmSDMA1_RLC7_RB_BASE_DEFAULT 0x00000000 1026 #define mmSDMA1_RLC7_RB_BASE_HI_DEFAULT 0x00000000 1027 #define mmSDMA1_RLC7_RB_RPTR_DEFAULT 0x00000000 1028 #define mmSDMA1_RLC7_RB_RPTR_HI_DEFAULT 0x00000000 1029 #define mmSDMA1_RLC7_RB_WPTR_DEFAULT 0x00000000 1030 #define mmSDMA1_RLC7_RB_WPTR_HI_DEFAULT 0x00000000 1031 #define mmSDMA1_RLC7_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 1032 #define mmSDMA1_RLC7_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 1033 #define mmSDMA1_RLC7_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 1034 #define mmSDMA1_RLC7_IB_CNTL_DEFAULT 0x00000100 1035 #define mmSDMA1_RLC7_IB_RPTR_DEFAULT 0x00000000 1036 #define mmSDMA1_RLC7_IB_OFFSET_DEFAULT 0x00000000 1037 #define mmSDMA1_RLC7_IB_BASE_LO_DEFAULT 0x00000000 1038 #define mmSDMA1_RLC7_IB_BASE_HI_DEFAULT 0x00000000 1039 #define mmSDMA1_RLC7_IB_SIZE_DEFAULT 0x00000000 1040 #define mmSDMA1_RLC7_SKIP_CNTL_DEFAULT 0x00000000 1041 #define mmSDMA1_RLC7_CONTEXT_STATUS_DEFAULT 0x00000004 1042 #define mmSDMA1_RLC7_DOORBELL_DEFAULT 0x00000000 1043 #define mmSDMA1_RLC7_STATUS_DEFAULT 0x00000000 1044 #define mmSDMA1_RLC7_DOORBELL_LOG_DEFAULT 0x00000000 1045 #define mmSDMA1_RLC7_WATERMARK_DEFAULT 0x00000000 1046 #define mmSDMA1_RLC7_DOORBELL_OFFSET_DEFAULT 0x00000000 1047 #define mmSDMA1_RLC7_CSA_ADDR_LO_DEFAULT 0x00000000 1048 #define mmSDMA1_RLC7_CSA_ADDR_HI_DEFAULT 0x00000000 1049 #define mmSDMA1_RLC7_IB_SUB_REMAIN_DEFAULT 0x00000000 1050 #define mmSDMA1_RLC7_PREEMPT_DEFAULT 0x00000000 1051 #define mmSDMA1_RLC7_DUMMY_REG_DEFAULT 0x0000000f 1052 #define mmSDMA1_RLC7_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 1053 #define mmSDMA1_RLC7_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 1054 #define mmSDMA1_RLC7_RB_AQL_CNTL_DEFAULT 0x00004000 1055 #define mmSDMA1_RLC7_MINOR_PTR_UPDATE_DEFAULT 0x00000000 1056 #define mmSDMA1_RLC7_MIDCMD_DATA0_DEFAULT 0x00000000 1057 #define mmSDMA1_RLC7_MIDCMD_DATA1_DEFAULT 0x00000000 1058 #define mmSDMA1_RLC7_MIDCMD_DATA2_DEFAULT 0x00000000 1059 #define mmSDMA1_RLC7_MIDCMD_DATA3_DEFAULT 0x00000000 1060 #define mmSDMA1_RLC7_MIDCMD_DATA4_DEFAULT 0x00000000 1061 #define mmSDMA1_RLC7_MIDCMD_DATA5_DEFAULT 0x00000000 1062 #define mmSDMA1_RLC7_MIDCMD_DATA6_DEFAULT 0x00000000 1063 #define mmSDMA1_RLC7_MIDCMD_DATA7_DEFAULT 0x00000000 1064 #define mmSDMA1_RLC7_MIDCMD_DATA8_DEFAULT 0x00000000 1065 #define mmSDMA1_RLC7_MIDCMD_DATA9_DEFAULT 0x00000000 1066 #define mmSDMA1_RLC7_MIDCMD_DATA10_DEFAULT 0x00000000 1067 #define mmSDMA1_RLC7_MIDCMD_CNTL_DEFAULT 0x00000000 1068 1069 1070 // addressBlock: gc_grbmdec 1071 #define mmGRBM_CNTL_DEFAULT 0x00000018 1072 #define mmGRBM_SKEW_CNTL_DEFAULT 0x00000020 1073 #define mmGRBM_STATUS2_DEFAULT 0x00000000 1074 #define mmGRBM_PWR_CNTL_DEFAULT 0x00000000 1075 #define mmGRBM_STATUS_DEFAULT 0x00000000 1076 #define mmGRBM_STATUS_SE0_DEFAULT 0x00000000 1077 #define mmGRBM_STATUS_SE1_DEFAULT 0x00000000 1078 #define mmGRBM_STATUS3_DEFAULT 0x00000000 1079 #define mmGRBM_SOFT_RESET_DEFAULT 0x00000000 1080 #define mmGRBM_GFX_CLKEN_CNTL_DEFAULT 0x00001008 1081 #define mmGRBM_WAIT_IDLE_CLOCKS_DEFAULT 0x00000030 1082 #define mmGRBM_STATUS_SE2_DEFAULT 0x00000000 1083 #define mmGRBM_STATUS_SE3_DEFAULT 0x00000000 1084 #define mmGRBM_READ_ERROR_DEFAULT 0x00000000 1085 #define mmGRBM_READ_ERROR2_DEFAULT 0x00000000 1086 #define mmGRBM_INT_CNTL_DEFAULT 0x00000000 1087 #define mmGRBM_TRAP_OP_DEFAULT 0x00000000 1088 #define mmGRBM_TRAP_ADDR_DEFAULT 0x00000000 1089 #define mmGRBM_TRAP_ADDR_MSK_DEFAULT 0x0003ffff 1090 #define mmGRBM_TRAP_WD_DEFAULT 0x00000000 1091 #define mmGRBM_TRAP_WD_MSK_DEFAULT 0xffffffff 1092 #define mmGRBM_DSM_BYPASS_DEFAULT 0x00000000 1093 #define mmGRBM_WRITE_ERROR_DEFAULT 0x00000000 1094 #define mmGRBM_CHIP_REVISION_DEFAULT 0x00000000 1095 #define mmGRBM_GFX_CNTL_DEFAULT 0x00000000 1096 #define mmGRBM_IH_CREDIT_DEFAULT 0x00010000 1097 #define mmGRBM_PWR_CNTL2_DEFAULT 0x00010000 1098 #define mmGRBM_UTCL2_INVAL_RANGE_START_DEFAULT 0x0000286d 1099 #define mmGRBM_UTCL2_INVAL_RANGE_END_DEFAULT 0x000028c6 1100 #define mmGRBM_FENCE_RANGE0_DEFAULT 0x00000000 1101 #define mmGRBM_FENCE_RANGE1_DEFAULT 0x00000000 1102 #define mmGRBM_NOWHERE_DEFAULT 0x00000000 1103 #define mmGRBM_SCRATCH_REG0_DEFAULT 0x00000000 1104 #define mmGRBM_SCRATCH_REG1_DEFAULT 0x00000000 1105 #define mmGRBM_SCRATCH_REG2_DEFAULT 0x00000000 1106 #define mmGRBM_SCRATCH_REG3_DEFAULT 0x00000000 1107 #define mmGRBM_SCRATCH_REG4_DEFAULT 0x00000000 1108 #define mmGRBM_SCRATCH_REG5_DEFAULT 0x00000000 1109 #define mmGRBM_SCRATCH_REG6_DEFAULT 0x00000000 1110 #define mmGRBM_SCRATCH_REG7_DEFAULT 0x00000000 1111 #define mmVIOLATION_DATA_ASYNC_VF_PROG_DEFAULT 0x00000000 1112 1113 1114 // addressBlock: gc_cpdec 1115 #define mmCP_CPC_STATUS_DEFAULT 0x00000000 1116 #define mmCP_CPC_BUSY_STAT_DEFAULT 0x00000000 1117 #define mmCP_CPC_STALLED_STAT1_DEFAULT 0x00000000 1118 #define mmCP_CPF_STATUS_DEFAULT 0x00000000 1119 #define mmCP_CPF_BUSY_STAT_DEFAULT 0x00000000 1120 #define mmCP_CPF_STALLED_STAT1_DEFAULT 0x00000000 1121 #define mmCP_CPC_BUSY_STAT2_DEFAULT 0x00000000 1122 #define mmCP_CPC_GRBM_FREE_COUNT_DEFAULT 0x00000008 1123 #define mmCP_CPC_PRIV_VIOLATION_ADDR_DEFAULT 0x00000000 1124 #define mmCP_MEC_ME1_HEADER_DUMP_DEFAULT 0x00000000 1125 #define mmCP_MEC_ME2_HEADER_DUMP_DEFAULT 0x00000000 1126 #define mmCP_CPC_SCRATCH_INDEX_DEFAULT 0x00000000 1127 #define mmCP_CPC_SCRATCH_DATA_DEFAULT 0x00000000 1128 #define mmCP_CPF_GRBM_FREE_COUNT_DEFAULT 0x00000002 1129 #define mmCP_CPF_BUSY_STAT2_DEFAULT 0x00000000 1130 #define mmCONFIG_RESERVED_REG0_DEFAULT 0x00000000 1131 #define mmCONFIG_RESERVED_REG1_DEFAULT 0x00000000 1132 #define mmCP_CPC_HALT_HYST_COUNT_DEFAULT 0x00000002 1133 #define mmCP_CE_COMPARE_COUNT_DEFAULT 0x00000000 1134 #define mmCP_CE_DE_COUNT_DEFAULT 0x00000000 1135 #define mmCP_DE_CE_COUNT_DEFAULT 0x00000000 1136 #define mmCP_DE_LAST_INVAL_COUNT_DEFAULT 0x00000000 1137 #define mmCP_DE_DE_COUNT_DEFAULT 0x00000000 1138 #define mmCP_STALLED_STAT3_DEFAULT 0x00000000 1139 #define mmCP_STALLED_STAT1_DEFAULT 0x00000000 1140 #define mmCP_STALLED_STAT2_DEFAULT 0x00000000 1141 #define mmCP_BUSY_STAT_DEFAULT 0x00000000 1142 #define mmCP_STAT_DEFAULT 0x00000000 1143 #define mmCP_ME_HEADER_DUMP_DEFAULT 0x00000000 1144 #define mmCP_PFP_HEADER_DUMP_DEFAULT 0x00000000 1145 #define mmCP_GRBM_FREE_COUNT_DEFAULT 0x000c0c0c 1146 #define mmCP_CE_HEADER_DUMP_DEFAULT 0x00000000 1147 #define mmCP_PFP_INSTR_PNTR_DEFAULT 0x00000000 1148 #define mmCP_ME_INSTR_PNTR_DEFAULT 0x00000000 1149 #define mmCP_CE_INSTR_PNTR_DEFAULT 0x00000000 1150 #define mmCP_MEC1_INSTR_PNTR_DEFAULT 0x00000000 1151 #define mmCP_MEC2_INSTR_PNTR_DEFAULT 0x00000000 1152 #define mmCP_CSF_STAT_DEFAULT 0x00000000 1153 #define mmCP_MEC_CNTL_DEFAULT 0x50000000 1154 #define mmCP_ME_CNTL_DEFAULT 0x15000000 1155 #define mmCP_CNTX_STAT_DEFAULT 0x00000000 1156 #define mmCP_ME_PREEMPTION_DEFAULT 0x00000000 1157 #define mmCP_ROQ_THRESHOLDS_DEFAULT 0x00003010 1158 #define mmCP_MEQ_STQ_THRESHOLD_DEFAULT 0x00000010 1159 #define mmCP_RB2_RPTR_DEFAULT 0x00000000 1160 #define mmCP_RB1_RPTR_DEFAULT 0x00000000 1161 #define mmCP_RB0_RPTR_DEFAULT 0x00000000 1162 #define mmCP_RB_RPTR_DEFAULT 0x00000000 1163 #define mmCP_RB_WPTR_DELAY_DEFAULT 0x00000000 1164 #define mmCP_RB_WPTR_POLL_CNTL_DEFAULT 0x00400100 1165 #define mmCP_ROQ1_THRESHOLDS_DEFAULT 0x06008010 1166 #define mmCP_ROQ2_THRESHOLDS_DEFAULT 0x000380a0 1167 #define mmCP_STQ_THRESHOLDS_DEFAULT 0x00804000 1168 #define mmCP_QUEUE_THRESHOLDS_DEFAULT 0x00002b16 1169 #define mmCP_MEQ_THRESHOLDS_DEFAULT 0x00008040 1170 #define mmCP_ROQ_AVAIL_DEFAULT 0x00000000 1171 #define mmCP_STQ_AVAIL_DEFAULT 0x00000000 1172 #define mmCP_ROQ2_AVAIL_DEFAULT 0x00000000 1173 #define mmCP_MEQ_AVAIL_DEFAULT 0x00000000 1174 #define mmCP_CMD_INDEX_DEFAULT 0x00000000 1175 #define mmCP_CMD_DATA_DEFAULT 0x00000000 1176 #define mmCP_ROQ_RB_STAT_DEFAULT 0x00000000 1177 #define mmCP_ROQ_IB1_STAT_DEFAULT 0x00000000 1178 #define mmCP_ROQ_IB2_STAT_DEFAULT 0x00000000 1179 #define mmCP_STQ_STAT_DEFAULT 0x00000000 1180 #define mmCP_STQ_WR_STAT_DEFAULT 0x00000000 1181 #define mmCP_MEQ_STAT_DEFAULT 0x00000000 1182 #define mmCP_CEQ1_AVAIL_DEFAULT 0x00000000 1183 #define mmCP_CEQ2_AVAIL_DEFAULT 0x00000000 1184 #define mmCP_CE_ROQ_RB_STAT_DEFAULT 0x00000000 1185 #define mmCP_CE_ROQ_IB1_STAT_DEFAULT 0x00000000 1186 #define mmCP_CE_ROQ_IB2_STAT_DEFAULT 0x00000000 1187 #define mmCP_CE_ROQ_DB_STAT_DEFAULT 0x00000000 1188 #define mmCP_ROQ3_THRESHOLDS_DEFAULT 0x0004c120 1189 #define mmCP_ROQ_DB_STAT_DEFAULT 0x00000000 1190 #define mmCP_PRIV_VIOLATION_ADDR_DEFAULT 0x00000000 1191 1192 1193 // addressBlock: gc_padec 1194 #define mmVGT_CACHE_INVALIDATION_DEFAULT 0x09000000 1195 #define mmVGT_ESGS_RING_SIZE_DEFAULT 0x00000000 1196 #define mmVGT_GSVS_RING_SIZE_DEFAULT 0x00000000 1197 #define mmVGT_TF_RING_SIZE_DEFAULT 0x0000c000 1198 #define mmVGT_HS_OFFCHIP_PARAM_DEFAULT 0x00000000 1199 #define mmVGT_TF_MEMORY_BASE_DEFAULT 0x00000000 1200 #define mmVGT_TF_MEMORY_BASE_HI_DEFAULT 0x00000000 1201 #define mmVGT_VTX_VECT_EJECT_REG_DEFAULT 0x0000007d 1202 #define mmVGT_DMA_DATA_FIFO_DEPTH_DEFAULT 0x00000200 1203 #define mmVGT_DMA_REQ_FIFO_DEPTH_DEFAULT 0x00000020 1204 #define mmVGT_DRAW_INIT_FIFO_DEPTH_DEFAULT 0x00000020 1205 #define mmVGT_LAST_COPY_STATE_DEFAULT 0x00000000 1206 #define mmVGT_FIFO_DEPTHS_DEFAULT 0x10180040 1207 #define mmVGT_GS_VERTEX_REUSE_DEFAULT 0x00000010 1208 #define mmVGT_MC_LAT_CNTL_DEFAULT 0x00000002 1209 #define mmIA_UTCL1_STATUS_2_DEFAULT 0x00000000 1210 #define mmWD_CNTL_STATUS_DEFAULT 0x00000000 1211 #define mmCC_GC_PRIM_CONFIG_DEFAULT 0x000ffaa0 1212 #define mmGC_USER_PRIM_CONFIG_DEFAULT 0x000ffaa0 1213 #define mmWD_QOS_DEFAULT 0x00000000 1214 #define mmWD_UTCL1_CNTL_DEFAULT 0x00000080 1215 #define mmWD_UTCL1_STATUS_DEFAULT 0x00000000 1216 #define mmGE_PC_CNTL_DEFAULT 0x00000400 1217 #define mmIA_UTCL1_CNTL_DEFAULT 0x00000080 1218 #define mmIA_UTCL1_STATUS_DEFAULT 0x00000000 1219 #define mmCC_GC_SA_UNIT_DISABLE_DEFAULT 0x00000000 1220 #define mmGC_USER_SA_UNIT_DISABLE_DEFAULT 0x00000000 1221 #define mmVGT_SYS_CONFIG_DEFAULT 0x00000011 1222 #define mmGE_PRIV_CONTROL_DEFAULT 0x000000fe 1223 #define mmGE_STATUS_DEFAULT 0x00000000 1224 #define mmVGT_VS_MAX_WAVE_ID_DEFAULT 0x000002ff 1225 #define mmVGT_GS_MAX_WAVE_ID_DEFAULT 0x000007ff 1226 #define mmCC_GC_SHADER_ARRAY_CONFIG_GEN1_DEFAULT 0x00000000 1227 #define mmCC_GC_SHADER_ARRAY_CONFIG_GEN0_DEFAULT 0x00000000 1228 #define mmGFX_PIPE_CONTROL_DEFAULT 0x00000000 1229 #define mmCC_GC_SHADER_ARRAY_CONFIG_DEFAULT 0xffe00000 1230 #define mmGC_USER_SHADER_ARRAY_CONFIG_DEFAULT 0x00000000 1231 #define mmVGT_DMA_PRIMITIVE_TYPE_DEFAULT 0x00000000 1232 #define mmVGT_DMA_CONTROL_DEFAULT 0x00000000 1233 #define mmVGT_DMA_LS_HS_CONFIG_DEFAULT 0x00000000 1234 #define mmVGT_STRMOUT_DELAY_DEFAULT 0x00092400 1235 #define mmWD_BUF_RESOURCE_1_DEFAULT 0x00000000 1236 #define mmWD_BUF_RESOURCE_2_DEFAULT 0x00000000 1237 #define mmPA_CL_CNTL_STATUS_DEFAULT 0x00000000 1238 #define mmPA_CL_ENHANCE_DEFAULT 0x00200007 1239 #define mmPA_SU_CNTL_STATUS_DEFAULT 0x00000000 1240 #define mmPA_SC_FIFO_DEPTH_CNTL_DEFAULT 0x00000100 1241 #define mmPA_SC_P3D_TRAP_SCREEN_HV_LOCK_DEFAULT 0x00000000 1242 #define mmPA_SC_HP3D_TRAP_SCREEN_HV_LOCK_DEFAULT 0x00000000 1243 #define mmPA_SC_TRAP_SCREEN_HV_LOCK_DEFAULT 0x00000000 1244 #define mmPA_SC_FORCE_EOV_MAX_CNTS_DEFAULT 0x00ffffff 1245 #define mmPA_SC_BINNER_EVENT_CNTL_0_DEFAULT 0x842a4c02 1246 #define mmPA_SC_BINNER_EVENT_CNTL_1_DEFAULT 0x82000008 1247 #define mmPA_SC_BINNER_EVENT_CNTL_2_DEFAULT 0x9118aab8 1248 #define mmPA_SC_BINNER_EVENT_CNTL_3_DEFAULT 0xc2400024 1249 #define mmPA_SC_BINNER_TIMEOUT_COUNTER_DEFAULT 0x00000000 1250 #define mmPA_SC_BINNER_PERF_CNTL_0_DEFAULT 0x00000000 1251 #define mmPA_SC_BINNER_PERF_CNTL_1_DEFAULT 0x00000000 1252 #define mmPA_SC_BINNER_PERF_CNTL_2_DEFAULT 0x00000000 1253 #define mmPA_SC_BINNER_PERF_CNTL_3_DEFAULT 0x00000000 1254 #define mmPA_SC_ENHANCE_2_DEFAULT 0x00000020 1255 #define mmPA_SC_ENHANCE_INTERNAL_DEFAULT 0x00000000 1256 #define mmPA_SC_BINNER_CNTL_OVERRIDE_DEFAULT 0x08000000 1257 #define mmPA_SC_PBB_OVERRIDE_FLAG_DEFAULT 0x00000000 1258 #define mmPA_PH_INTERFACE_FIFO_SIZE_DEFAULT 0x00000100 1259 #define mmPA_PH_ENHANCE_DEFAULT 0x00001000 1260 #define mmPA_SC_BC_WAVE_BREAK_DEFAULT 0x00360040 1261 #define mmPA_SC_ENHANCE_3_DEFAULT 0x00000000 1262 #define mmPA_SC_FIFO_SIZE_DEFAULT 0x00000000 1263 #define mmPA_SC_IF_FIFO_SIZE_DEFAULT 0x00000000 1264 #define mmPA_SC_PKR_WAVE_TABLE_CNTL_DEFAULT 0x00000000 1265 #define mmPA_SIDEBAND_REQUEST_DELAYS_DEFAULT 0x08000020 1266 #define mmPA_SC_ENHANCE_DEFAULT 0x08000009 1267 #define mmPA_SC_ENHANCE_1_DEFAULT 0x040c2000 1268 #define mmPA_SC_DSM_CNTL_DEFAULT 0x00000000 1269 #define mmPA_SC_TILE_STEERING_CREST_OVERRIDE_DEFAULT 0x00000000 1270 1271 1272 // addressBlock: gc_sqdec 1273 #define mmSQ_CONFIG_DEFAULT 0x00180020 1274 #define mmSQC_CONFIG_DEFAULT 0x000a2000 1275 #define mmLDS_CONFIG_DEFAULT 0x00000000 1276 #define mmSQ_RANDOM_WAVE_PRI_DEFAULT 0x0000007f 1277 #define mmSQG_STATUS_DEFAULT 0x00000000 1278 #define mmSQ_FIFO_SIZES_DEFAULT 0x0000d001 1279 #define mmSQ_DSM_CNTL_DEFAULT 0x00000000 1280 #define mmSQ_DSM_CNTL2_DEFAULT 0x00000000 1281 #define mmSQ_RUNTIME_CONFIG_DEFAULT 0x00000000 1282 #define mmSH_MEM_BASES_DEFAULT 0x00000000 1283 #define mmSP_CONFIG_DEFAULT 0x00000020 1284 #define mmSQ_ARB_CONFIG_DEFAULT 0x00000030 1285 #define mmSH_MEM_CONFIG_DEFAULT 0x0000c000 1286 #define mmSQ_SHADER_TBA_LO_DEFAULT 0x00000000 1287 #define mmSQ_SHADER_TBA_HI_DEFAULT 0x00000000 1288 #define mmSQ_SHADER_TMA_LO_DEFAULT 0x00000000 1289 #define mmSQ_SHADER_TMA_HI_DEFAULT 0x00000000 1290 #define mmSQG_UTCL0_CNTL1_DEFAULT 0x00000580 1291 #define mmSQG_UTCL0_CNTL2_DEFAULT 0x00000000 1292 #define mmSQG_UTCL0_STATUS_DEFAULT 0x00000000 1293 #define mmSQG_CONFIG_DEFAULT 0x00000000 1294 #define mmCC_GC_SHADER_RATE_CONFIG_DEFAULT 0x00000000 1295 #define mmGC_USER_SHADER_RATE_CONFIG_DEFAULT 0x00000000 1296 #define mmSQ_INTERRUPT_AUTO_MASK_DEFAULT 0x00ffffff 1297 #define mmSQ_INTERRUPT_MSG_CTRL_DEFAULT 0x00000000 1298 #define mmSQ_WATCH0_ADDR_H_DEFAULT 0x00000000 1299 #define mmSQ_WATCH0_ADDR_L_DEFAULT 0x00000000 1300 #define mmSQ_WATCH0_CNTL_DEFAULT 0x00000000 1301 #define mmSQ_WATCH1_ADDR_H_DEFAULT 0x00000000 1302 #define mmSQ_WATCH1_ADDR_L_DEFAULT 0x00000000 1303 #define mmSQ_WATCH1_CNTL_DEFAULT 0x00000000 1304 #define mmSQ_WATCH2_ADDR_H_DEFAULT 0x00000000 1305 #define mmSQ_WATCH2_ADDR_L_DEFAULT 0x00000000 1306 #define mmSQ_WATCH2_CNTL_DEFAULT 0x00000000 1307 #define mmSQ_WATCH3_ADDR_H_DEFAULT 0x00000000 1308 #define mmSQ_WATCH3_ADDR_L_DEFAULT 0x00000000 1309 #define mmSQ_WATCH3_CNTL_DEFAULT 0x00000000 1310 #define mmSQ_THREAD_TRACE_BUF0_BASE_DEFAULT 0x00000000 1311 #define mmSQ_THREAD_TRACE_BUF0_SIZE_DEFAULT 0x00000000 1312 #define mmSQ_THREAD_TRACE_BUF1_BASE_DEFAULT 0x00000000 1313 #define mmSQ_THREAD_TRACE_BUF1_SIZE_DEFAULT 0x00000000 1314 #define mmSQ_THREAD_TRACE_WPTR_DEFAULT 0x00000000 1315 #define mmSQ_THREAD_TRACE_MASK_DEFAULT 0x00000000 1316 #define mmSQ_THREAD_TRACE_TOKEN_MASK_DEFAULT 0x00000000 1317 #define mmSQ_THREAD_TRACE_CTRL_DEFAULT 0x00400000 1318 #define mmSQ_THREAD_TRACE_STATUS_DEFAULT 0x00000000 1319 #define mmSQ_THREAD_TRACE_DROPPED_CNTR_DEFAULT 0x00000000 1320 #define mmSQ_THREAD_TRACE_GFX_DRAW_CNTR_DEFAULT 0x00000000 1321 #define mmSQ_THREAD_TRACE_GFX_MARKER_CNTR_DEFAULT 0x00000000 1322 #define mmSQ_THREAD_TRACE_HP3D_DRAW_CNTR_DEFAULT 0x00000000 1323 #define mmSQ_THREAD_TRACE_HP3D_MARKER_CNTR_DEFAULT 0x00000000 1324 #define mmSQ_THREAD_TRACE_STATUS2_DEFAULT 0x00000000 1325 #define mmSQ_IND_INDEX_DEFAULT 0x00000000 1326 #define mmSQ_IND_DATA_DEFAULT 0x00000000 1327 #define mmSQ_CMD_DEFAULT 0x00000000 1328 #define mmSQ_TIME_HI_DEFAULT 0x00000000 1329 #define mmSQ_TIME_LO_DEFAULT 0x00000000 1330 #define mmSQ_LB_CTR_CTRL_DEFAULT 0x00000000 1331 #define mmSQ_LB_DATA0_DEFAULT 0x00000000 1332 #define mmSQ_LB_DATA1_DEFAULT 0x00000000 1333 #define mmSQ_LB_DATA2_DEFAULT 0x00000000 1334 #define mmSQ_LB_DATA3_DEFAULT 0x00000000 1335 #define mmSQ_LB_CTR_SEL0_DEFAULT 0x00000000 1336 #define mmSQ_LB_CTR_SEL1_DEFAULT 0x00000000 1337 #define mmSQ_EDC_CNT_DEFAULT 0x00000000 1338 #define mmSQ_EDC_FUE_CNTL_DEFAULT 0x00000000 1339 #define mmSQ_WREXEC_EXEC_HI_DEFAULT 0x00000000 1340 #define mmSQ_WREXEC_EXEC_LO_DEFAULT 0x00000000 1341 #define mmSQC_ICACHE_UTCL0_CNTL1_DEFAULT 0x00000480 1342 #define mmSQC_ICACHE_UTCL0_CNTL2_DEFAULT 0x00000000 1343 #define mmSQC_DCACHE_UTCL0_CNTL1_DEFAULT 0x00000500 1344 #define mmSQC_DCACHE_UTCL0_CNTL2_DEFAULT 0x00000000 1345 #define mmSQC_ICACHE_UTCL0_STATUS_DEFAULT 0x00000000 1346 #define mmSQC_DCACHE_UTCL0_STATUS_DEFAULT 0x00000000 1347 1348 1349 // addressBlock: gc_shsdec 1350 #define mmSX_DEBUG_1_DEFAULT 0x00000020 1351 #define mmSPI_PS_MAX_WAVE_ID_DEFAULT 0x020000cf 1352 #define mmSPI_START_PHASE_DEFAULT 0x000000a0 1353 #define mmSPI_GFX_CNTL_DEFAULT 0x00000000 1354 #define mmSPI_DSM_CNTL_DEFAULT 0x00000000 1355 #define mmSPI_DSM_CNTL2_DEFAULT 0x00000000 1356 #define mmSPI_EDC_CNT_DEFAULT 0x00000000 1357 #define mmSPI_USER_ACCUM_VMID_CNTL_DEFAULT 0x00000000 1358 #define mmSPI_CONFIG_CNTL_DEFAULT 0xc062c688 1359 #define mmSPI_WAVE_LIMIT_CNTL_DEFAULT 0x00000000 1360 #define mmSPI_CONFIG_CNTL_2_DEFAULT 0x00000011 1361 #define mmSPI_CONFIG_CNTL_1_DEFAULT 0x000c0104 1362 #define mmSPI_CONFIG_PS_CU_EN_DEFAULT 0x00000000 1363 #define mmSPI_WF_LIFETIME_CNTL_DEFAULT 0x00000000 1364 #define mmSPI_WF_LIFETIME_LIMIT_0_DEFAULT 0x00000100 1365 #define mmSPI_WF_LIFETIME_LIMIT_1_DEFAULT 0x00000100 1366 #define mmSPI_WF_LIFETIME_LIMIT_2_DEFAULT 0x00000100 1367 #define mmSPI_WF_LIFETIME_LIMIT_3_DEFAULT 0x00000100 1368 #define mmSPI_WF_LIFETIME_LIMIT_4_DEFAULT 0x00000100 1369 #define mmSPI_WF_LIFETIME_LIMIT_5_DEFAULT 0x00000100 1370 #define mmSPI_WF_LIFETIME_STATUS_0_DEFAULT 0x00000000 1371 #define mmSPI_WF_LIFETIME_STATUS_1_DEFAULT 0x00000000 1372 #define mmSPI_WF_LIFETIME_STATUS_2_DEFAULT 0x00000000 1373 #define mmSPI_WF_LIFETIME_STATUS_4_DEFAULT 0x00000000 1374 #define mmSPI_WF_LIFETIME_STATUS_6_DEFAULT 0x00000000 1375 #define mmSPI_WF_LIFETIME_STATUS_7_DEFAULT 0x00000000 1376 #define mmSPI_WF_LIFETIME_STATUS_8_DEFAULT 0x00000000 1377 #define mmSPI_WF_LIFETIME_STATUS_9_DEFAULT 0x00000000 1378 #define mmSPI_WF_LIFETIME_STATUS_11_DEFAULT 0x00000000 1379 #define mmSPI_WF_LIFETIME_STATUS_13_DEFAULT 0x00000000 1380 #define mmSPI_WF_LIFETIME_STATUS_14_DEFAULT 0x00000000 1381 #define mmSPI_WF_LIFETIME_STATUS_15_DEFAULT 0x00000000 1382 #define mmSPI_WF_LIFETIME_STATUS_16_DEFAULT 0x00000000 1383 #define mmSPI_WF_LIFETIME_STATUS_17_DEFAULT 0x00000000 1384 #define mmSPI_WF_LIFETIME_STATUS_18_DEFAULT 0x00000000 1385 #define mmSPI_WF_LIFETIME_STATUS_19_DEFAULT 0x00000000 1386 #define mmSPI_WF_LIFETIME_STATUS_20_DEFAULT 0x00000000 1387 #define mmSPI_WF_LIFETIME_STATUS_21_DEFAULT 0x00000000 1388 #define mmSPI_LB_CTR_CTRL_DEFAULT 0x00000000 1389 #define mmSPI_LB_WGP_MASK_DEFAULT 0x0000ffff 1390 #define mmSPI_LB_DATA_REG_DEFAULT 0x00000000 1391 #define mmSPI_PG_ENABLE_STATIC_WGP_MASK_DEFAULT 0x0000ffff 1392 #define mmSPI_GDS_CREDITS_DEFAULT 0x0000403c 1393 #define mmSPI_SX_EXPORT_BUFFER_SIZES_DEFAULT 0x10000800 1394 #define mmSPI_SX_SCOREBOARD_BUFFER_SIZES_DEFAULT 0x00800040 1395 #define mmSPI_CSQ_WF_ACTIVE_STATUS_DEFAULT 0x00000000 1396 #define mmSPI_CSQ_WF_ACTIVE_COUNT_0_DEFAULT 0x00000000 1397 #define mmSPI_CSQ_WF_ACTIVE_COUNT_1_DEFAULT 0x00000000 1398 #define mmSPI_CSQ_WF_ACTIVE_COUNT_2_DEFAULT 0x00000000 1399 #define mmSPI_CSQ_WF_ACTIVE_COUNT_3_DEFAULT 0x00000000 1400 #define mmSPI_LB_DATA_WAVES_DEFAULT 0x00000000 1401 #define mmSPI_LB_DATA_PERWGP_WAVE_HSGS_DEFAULT 0x00000000 1402 #define mmSPI_LB_DATA_PERWGP_WAVE_VSPS_DEFAULT 0x00000000 1403 #define mmSPI_LB_DATA_PERWGP_WAVE_CS_DEFAULT 0x00000000 1404 #define mmSPI_P0_TRAP_SCREEN_PSBA_LO_DEFAULT 0x00000000 1405 #define mmSPI_P0_TRAP_SCREEN_PSBA_HI_DEFAULT 0x00000000 1406 #define mmSPI_P0_TRAP_SCREEN_PSMA_LO_DEFAULT 0x00000000 1407 #define mmSPI_P0_TRAP_SCREEN_PSMA_HI_DEFAULT 0x00000000 1408 #define mmSPI_P0_TRAP_SCREEN_GPR_MIN_DEFAULT 0x00000000 1409 #define mmSPI_P1_TRAP_SCREEN_PSBA_LO_DEFAULT 0x00000000 1410 #define mmSPI_P1_TRAP_SCREEN_PSBA_HI_DEFAULT 0x00000000 1411 #define mmSPI_P1_TRAP_SCREEN_PSMA_LO_DEFAULT 0x00000000 1412 #define mmSPI_P1_TRAP_SCREEN_PSMA_HI_DEFAULT 0x00000000 1413 #define mmSPI_P1_TRAP_SCREEN_GPR_MIN_DEFAULT 0x00000000 1414 1415 1416 // addressBlock: gc_tpdec 1417 #define mmTD_STATUS_DEFAULT 0x00000000 1418 #define mmTD_DSM_CNTL_DEFAULT 0x00000000 1419 #define mmTD_DSM_CNTL2_DEFAULT 0x00000000 1420 #define mmTD_SCRATCH_DEFAULT 0x00000000 1421 #define mmTA_CNTL_DEFAULT 0xc0040000 1422 #define mmTA_RESERVED_010C_DEFAULT 0x00000000 1423 #define mmTA_STATUS_DEFAULT 0x00000000 1424 #define mmTA_SCRATCH_DEFAULT 0x00000000 1425 1426 1427 // addressBlock: gc_gdsdec 1428 #define mmGDS_CONFIG_DEFAULT 0x00000000 1429 #define mmGDS_CNTL_STATUS_DEFAULT 0x00000000 1430 #define mmGDS_ENHANCE_DEFAULT 0x00000000 1431 #define mmGDS_PROTECTION_FAULT_DEFAULT 0x00000000 1432 #define mmGDS_VM_PROTECTION_FAULT_DEFAULT 0x00000000 1433 #define mmGDS_EDC_CNT_DEFAULT 0x00000000 1434 #define mmGDS_EDC_GRBM_CNT_DEFAULT 0x00000000 1435 #define mmGDS_EDC_OA_DED_DEFAULT 0x00000000 1436 #define mmGDS_DSM_CNTL_DEFAULT 0x00000000 1437 #define mmGDS_EDC_OA_PHY_CNT_DEFAULT 0x00000000 1438 #define mmGDS_EDC_OA_PIPE_CNT_DEFAULT 0x00000000 1439 #define mmGDS_DSM_CNTL2_DEFAULT 0x00000000 1440 #define mmGDS_WD_GDS_CSB_DEFAULT 0x00000000 1441 1442 1443 // addressBlock: gc_rbdec 1444 #define mmDB_DEBUG_DEFAULT 0x00000000 1445 #define mmDB_DEBUG2_DEFAULT 0x00000420 1446 #define mmDB_DEBUG3_DEFAULT 0x00000000 1447 #define mmDB_DEBUG4_DEFAULT 0x04000000 1448 #define mmDB_ETILE_STUTTER_CONTROL_DEFAULT 0x00000000 1449 #define mmDB_LTILE_STUTTER_CONTROL_DEFAULT 0x00000000 1450 #define mmDB_EQUAD_STUTTER_CONTROL_DEFAULT 0x00000000 1451 #define mmDB_LQUAD_STUTTER_CONTROL_DEFAULT 0x00000000 1452 #define mmDB_CREDIT_LIMIT_DEFAULT 0x00000000 1453 #define mmDB_WATERMARKS_DEFAULT 0x0a040a04 1454 #define mmDB_SUBTILE_CONTROL_DEFAULT 0x00000000 1455 #define mmDB_FREE_CACHELINES_DEFAULT 0x00000000 1456 #define mmDB_FIFO_DEPTH1_DEFAULT 0x00000000 1457 #define mmDB_FIFO_DEPTH2_DEFAULT 0x00000000 1458 #define mmDB_LAST_OF_BURST_CONFIG_DEFAULT 0x01c28210 1459 #define mmDB_RING_CONTROL_DEFAULT 0x00000001 1460 #define mmDB_MEM_ARB_WATERMARKS_DEFAULT 0x04040404 1461 #define mmDB_FIFO_DEPTH3_DEFAULT 0x00000000 1462 #define mmDB_RMI_BC_GL2_CACHE_CONTROL_DEFAULT 0x00150055 1463 #define mmDB_EXCEPTION_CONTROL_DEFAULT 0x00f80000 1464 #define mmDB_DFSM_CONFIG_DEFAULT 0x00000002 1465 #define mmDB_DEBUG5_DEFAULT 0x00000060 1466 #define mmDB_DFSM_TILES_IN_FLIGHT_DEFAULT 0x000003e8 1467 #define mmDB_DFSM_PRIMS_IN_FLIGHT_DEFAULT 0x000000c8 1468 #define mmDB_DFSM_WATCHDOG_DEFAULT 0x000f4240 1469 #define mmDB_DFSM_FLUSH_ENABLE_DEFAULT 0x000007ff 1470 #define mmDB_DFSM_FLUSH_AUX_EVENT_DEFAULT 0x00000000 1471 #define mmDB_FGCG_SRAMS_CLK_CTRL_DEFAULT 0x00000000 1472 #define mmDB_FGCG_INTERFACES_CLK_CTRL_DEFAULT 0x00000000 1473 #define mmCC_RB_REDUNDANCY_DEFAULT 0x00000000 1474 #define mmCC_RB_BACKEND_DISABLE_DEFAULT 0x00000000 1475 #define mmGB_ADDR_CONFIG_DEFAULT 0x00000444 1476 #define mmGB_BACKEND_MAP_DEFAULT 0x00000000 1477 #define mmGB_GPU_ID_DEFAULT 0x00000000 1478 #define mmCC_RB_DAISY_CHAIN_DEFAULT 0x76543210 1479 #define mmGB_ADDR_CONFIG_READ_DEFAULT 0x00000444 1480 #define mmCB_HW_CONTROL_4_DEFAULT 0x003c0014 1481 #define mmCB_HW_CONTROL_3_DEFAULT 0x00000000 1482 #define mmCB_HW_CONTROL_DEFAULT 0x00000100 1483 #define mmCB_HW_CONTROL_1_DEFAULT 0x00000000 1484 #define mmCB_HW_CONTROL_2_DEFAULT 0x30000000 1485 #define mmCB_DCC_CONFIG_DEFAULT 0x00000000 1486 #define mmCB_HW_MEM_ARBITER_RD_DEFAULT 0x00029000 1487 #define mmCB_HW_MEM_ARBITER_WR_DEFAULT 0x00029000 1488 #define mmCB_RMI_BC_GL2_CACHE_CONTROL_DEFAULT 0x00550055 1489 #define mmCB_STUTTER_CONTROL_CMASK_RDLAT_DEFAULT 0x00000000 1490 #define mmCB_STUTTER_CONTROL_FMASK_RDLAT_DEFAULT 0x00000000 1491 #define mmCB_STUTTER_CONTROL_COLOR_RDLAT_DEFAULT 0x00000000 1492 #define mmCB_CACHE_EVICT_POINTS_DEFAULT 0x0e101410 1493 #define mmGC_USER_RB_REDUNDANCY_DEFAULT 0x00000000 1494 #define mmGC_USER_RB_BACKEND_DISABLE_DEFAULT 0x00000000 1495 1496 1497 // addressBlock: gc_gceadec2 1498 #define mmGCEA_MISC_DEFAULT 0x0de8bff0 1499 #define mmGCEA_LATENCY_SAMPLING_DEFAULT 0x00000000 1500 #define mmGCEA_DSM_CNTL_DEFAULT 0x00000000 1501 #define mmGCEA_DSM_CNTLA_DEFAULT 0x00000000 1502 #define mmGCEA_DSM_CNTLB_DEFAULT 0x00000000 1503 #define mmGCEA_DSM_CNTL2_DEFAULT 0x00000000 1504 #define mmGCEA_DSM_CNTL2A_DEFAULT 0x00000000 1505 #define mmGCEA_DSM_CNTL2B_DEFAULT 0x00000000 1506 #define mmGCEA_GL2C_XBR_CREDITS_DEFAULT 0x637f637f 1507 #define mmGCEA_GL2C_XBR_MAXBURST_DEFAULT 0x00333333 1508 #define mmGCEA_PROBE_CNTL_DEFAULT 0x00000000 1509 #define mmGCEA_PROBE_MAP_DEFAULT 0x0000aaaa 1510 #define mmGCEA_ERR_STATUS_DEFAULT 0x00000300 1511 #define mmGCEA_MISC2_DEFAULT 0x00000000 1512 1513 1514 // addressBlock: gc_spipdec2 1515 #define mmSPI_PQEV_CTRL_DEFAULT 0x00ff1008 1516 #define mmSPI_EXP_THROTTLE_CTRL_DEFAULT 0x08782e2e 1517 1518 1519 // addressBlock: gc_gceadec3 1520 #define mmGCEA_RRET_MEM_RESERVE_DEFAULT 0x00000000 1521 1522 1523 // addressBlock: gc_rmi_rmidec 1524 #define mmRMI_GENERAL_CNTL_DEFAULT 0x01e00000 1525 #define mmRMI_GENERAL_CNTL1_DEFAULT 0x00003201 1526 #define mmRMI_GENERAL_STATUS_DEFAULT 0x00000000 1527 #define mmRMI_SUBBLOCK_STATUS0_DEFAULT 0x00000000 1528 #define mmRMI_SUBBLOCK_STATUS1_DEFAULT 0x00000000 1529 #define mmRMI_SUBBLOCK_STATUS2_DEFAULT 0x00000000 1530 #define mmRMI_SUBBLOCK_STATUS3_DEFAULT 0x00000000 1531 #define mmRMI_XBAR_CONFIG_DEFAULT 0x00000f00 1532 #define mmRMI_PROBE_POP_LOGIC_CNTL_DEFAULT 0x0003fcff 1533 #define mmRMI_UTC_XNACK_N_MISC_CNTL_DEFAULT 0x00000564 1534 #define mmRMI_DEMUX_CNTL_DEFAULT 0x02000200 1535 #define mmRMI_UTCL1_CNTL1_DEFAULT 0x00020000 1536 #define mmRMI_UTCL1_CNTL2_DEFAULT 0x00010000 1537 #define mmRMI_UTC_UNIT_CONFIG_DEFAULT 0x00000000 1538 #define mmRMI_TCIW_FORMATTER0_CNTL_DEFAULT 0x4404001e 1539 #define mmRMI_TCIW_FORMATTER1_CNTL_DEFAULT 0x4404001e 1540 #define mmRMI_SCOREBOARD_CNTL_DEFAULT 0x001ffe00 1541 #define mmRMI_SCOREBOARD_STATUS0_DEFAULT 0x00000000 1542 #define mmRMI_SCOREBOARD_STATUS1_DEFAULT 0x00000000 1543 #define mmRMI_SCOREBOARD_STATUS2_DEFAULT 0x00000000 1544 #define mmRMI_XBAR_ARBITER_CONFIG_DEFAULT 0x08000800 1545 #define mmRMI_XBAR_ARBITER_CONFIG_1_DEFAULT 0x0000ffff 1546 #define mmRMI_CLOCK_CNTRL_DEFAULT 0x00008822 1547 #define mmRMI_UTCL1_STATUS_DEFAULT 0x00000000 1548 #define mmRMI_RB_GLX_CID_MAP_DEFAULT 0xbcaa9987 1549 #define mmRMI_SPARE_DEFAULT 0xffff310d 1550 #define mmRMI_SPARE_1_DEFAULT 0x00000a00 1551 #define mmRMI_SPARE_2_DEFAULT 0x00000000 1552 #define mmCC_RMI_REDUNDANCY_DEFAULT 0x00000010 1553 #define mmGC_USER_RMI_REDUNDANCY_DEFAULT 0x00000010 1554 1555 1556 // addressBlock: gc_dbgu_gfx_dbgudec 1557 1558 1559 // addressBlock: gc_pmmdec 1560 #define mmGCR_GENERAL_CNTL_DEFAULT 0x00000400 1561 #define mmGCR_CMD_STATUS_DEFAULT 0x00000000 1562 #define mmGCR_SPARE_DEFAULT 0x00000000 1563 #define mmPMM_GENERAL_CNTL_DEFAULT 0x00000000 1564 #define mmGCR_PIO_CNTL_DEFAULT 0x00000000 1565 #define mmGCR_PIO_DATA_DEFAULT 0x00000000 1566 1567 1568 // addressBlock: gc_utcl1dec 1569 #define mmUTCL1_CTRL_DEFAULT 0x00000000 1570 #define mmUTCL1_ALOG_DEFAULT 0x00186482 1571 #define mmUTCL1_UTCL0_INVREQ_DISABLE_DEFAULT 0x00000000 1572 #define mmGCRD_SA_TARGETS_DISABLE_DEFAULT 0x00000000 1573 #define mmUTCL1_STATUS_DEFAULT 0x00000000 1574 1575 1576 // addressBlock: gc_gcvml2pfdec 1577 #define mmGCVM_L2_CNTL_DEFAULT 0x00080602 1578 #define mmGCVM_L2_CNTL2_DEFAULT 0x00000000 1579 #define mmGCVM_L2_CNTL3_DEFAULT 0x80100007 1580 #define mmGCVM_L2_STATUS_DEFAULT 0x00000000 1581 #define mmGCVM_DUMMY_PAGE_FAULT_CNTL_DEFAULT 0x00000090 1582 #define mmGCVM_DUMMY_PAGE_FAULT_ADDR_LO32_DEFAULT 0x00000000 1583 #define mmGCVM_DUMMY_PAGE_FAULT_ADDR_HI32_DEFAULT 0x00000000 1584 #define mmGCVM_INVALIDATE_CNTL_DEFAULT 0x0000010f 1585 #define mmGCVM_L2_PROTECTION_FAULT_CNTL_DEFAULT 0x3ffffffc 1586 #define mmGCVM_L2_PROTECTION_FAULT_CNTL2_DEFAULT 0x000a0000 1587 #define mmGCVM_L2_PROTECTION_FAULT_MM_CNTL3_DEFAULT 0xffffffff 1588 #define mmGCVM_L2_PROTECTION_FAULT_MM_CNTL4_DEFAULT 0xffffffff 1589 #define mmGCVM_L2_PROTECTION_FAULT_STATUS_DEFAULT 0x00000000 1590 #define mmGCVM_L2_PROTECTION_FAULT_ADDR_LO32_DEFAULT 0x00000000 1591 #define mmGCVM_L2_PROTECTION_FAULT_ADDR_HI32_DEFAULT 0x00000000 1592 #define mmGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32_DEFAULT 0x00000000 1593 #define mmGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32_DEFAULT 0x00000000 1594 #define mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32_DEFAULT 0x00000000 1595 #define mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32_DEFAULT 0x00000000 1596 #define mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32_DEFAULT 0x00000000 1597 #define mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32_DEFAULT 0x00000000 1598 #define mmGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32_DEFAULT 0x00000000 1599 #define mmGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32_DEFAULT 0x00000000 1600 #define mmGCVM_L2_CNTL4_DEFAULT 0x000000c1 1601 #define mmGCVM_L2_MM_GROUP_RT_CLASSES_DEFAULT 0x00000000 1602 #define mmGCVM_L2_BANK_SELECT_RESERVED_CID_DEFAULT 0x00000000 1603 #define mmGCVM_L2_BANK_SELECT_RESERVED_CID2_DEFAULT 0x00000000 1604 #define mmGCVM_L2_CACHE_PARITY_CNTL_DEFAULT 0x00000000 1605 #define mmGCVM_L2_CNTL5_DEFAULT 0x00003fe0 1606 #define mmGCVM_L2_GCR_CNTL_DEFAULT 0x00000000 1607 #define mmGCVML2_WALKER_MACRO_THROTTLE_TIME_DEFAULT 0x00000000 1608 #define mmGCVML2_WALKER_MACRO_THROTTLE_FETCH_LIMIT_DEFAULT 0x00000000 1609 #define mmGCVML2_WALKER_MICRO_THROTTLE_TIME_DEFAULT 0x00000000 1610 #define mmGCVML2_WALKER_MICRO_THROTTLE_FETCH_LIMIT_DEFAULT 0x00000000 1611 #define mmGCVM_L2_PTE_CACHE_DUMP_CNTL_DEFAULT 0x00000000 1612 #define mmGCVM_L2_PTE_CACHE_DUMP_READ_DEFAULT 0x00000000 1613 1614 1615 // addressBlock: gc_gcvml2vcdec 1616 #define mmGCVM_CONTEXT0_CNTL_DEFAULT 0x007ffe80 1617 #define mmGCVM_CONTEXT1_CNTL_DEFAULT 0x007ffe80 1618 #define mmGCVM_CONTEXT2_CNTL_DEFAULT 0x007ffe80 1619 #define mmGCVM_CONTEXT3_CNTL_DEFAULT 0x007ffe80 1620 #define mmGCVM_CONTEXT4_CNTL_DEFAULT 0x007ffe80 1621 #define mmGCVM_CONTEXT5_CNTL_DEFAULT 0x007ffe80 1622 #define mmGCVM_CONTEXT6_CNTL_DEFAULT 0x007ffe80 1623 #define mmGCVM_CONTEXT7_CNTL_DEFAULT 0x007ffe80 1624 #define mmGCVM_CONTEXT8_CNTL_DEFAULT 0x007ffe80 1625 #define mmGCVM_CONTEXT9_CNTL_DEFAULT 0x007ffe80 1626 #define mmGCVM_CONTEXT10_CNTL_DEFAULT 0x007ffe80 1627 #define mmGCVM_CONTEXT11_CNTL_DEFAULT 0x007ffe80 1628 #define mmGCVM_CONTEXT12_CNTL_DEFAULT 0x007ffe80 1629 #define mmGCVM_CONTEXT13_CNTL_DEFAULT 0x007ffe80 1630 #define mmGCVM_CONTEXT14_CNTL_DEFAULT 0x007ffe80 1631 #define mmGCVM_CONTEXT15_CNTL_DEFAULT 0x007ffe80 1632 #define mmGCVM_CONTEXTS_DISABLE_DEFAULT 0x00000000 1633 #define mmGCVM_INVALIDATE_ENG0_SEM_DEFAULT 0x00000000 1634 #define mmGCVM_INVALIDATE_ENG1_SEM_DEFAULT 0x00000000 1635 #define mmGCVM_INVALIDATE_ENG2_SEM_DEFAULT 0x00000000 1636 #define mmGCVM_INVALIDATE_ENG3_SEM_DEFAULT 0x00000000 1637 #define mmGCVM_INVALIDATE_ENG4_SEM_DEFAULT 0x00000000 1638 #define mmGCVM_INVALIDATE_ENG5_SEM_DEFAULT 0x00000000 1639 #define mmGCVM_INVALIDATE_ENG6_SEM_DEFAULT 0x00000000 1640 #define mmGCVM_INVALIDATE_ENG7_SEM_DEFAULT 0x00000000 1641 #define mmGCVM_INVALIDATE_ENG8_SEM_DEFAULT 0x00000000 1642 #define mmGCVM_INVALIDATE_ENG9_SEM_DEFAULT 0x00000000 1643 #define mmGCVM_INVALIDATE_ENG10_SEM_DEFAULT 0x00000000 1644 #define mmGCVM_INVALIDATE_ENG11_SEM_DEFAULT 0x00000000 1645 #define mmGCVM_INVALIDATE_ENG12_SEM_DEFAULT 0x00000000 1646 #define mmGCVM_INVALIDATE_ENG13_SEM_DEFAULT 0x00000000 1647 #define mmGCVM_INVALIDATE_ENG14_SEM_DEFAULT 0x00000000 1648 #define mmGCVM_INVALIDATE_ENG15_SEM_DEFAULT 0x00000000 1649 #define mmGCVM_INVALIDATE_ENG16_SEM_DEFAULT 0x00000000 1650 #define mmGCVM_INVALIDATE_ENG17_SEM_DEFAULT 0x00000000 1651 #define mmGCVM_INVALIDATE_ENG0_REQ_DEFAULT 0x02f80000 1652 #define mmGCVM_INVALIDATE_ENG1_REQ_DEFAULT 0x02f80000 1653 #define mmGCVM_INVALIDATE_ENG2_REQ_DEFAULT 0x02f80000 1654 #define mmGCVM_INVALIDATE_ENG3_REQ_DEFAULT 0x02f80000 1655 #define mmGCVM_INVALIDATE_ENG4_REQ_DEFAULT 0x02f80000 1656 #define mmGCVM_INVALIDATE_ENG5_REQ_DEFAULT 0x02f80000 1657 #define mmGCVM_INVALIDATE_ENG6_REQ_DEFAULT 0x02f80000 1658 #define mmGCVM_INVALIDATE_ENG7_REQ_DEFAULT 0x02f80000 1659 #define mmGCVM_INVALIDATE_ENG8_REQ_DEFAULT 0x02f80000 1660 #define mmGCVM_INVALIDATE_ENG9_REQ_DEFAULT 0x02f80000 1661 #define mmGCVM_INVALIDATE_ENG10_REQ_DEFAULT 0x02f80000 1662 #define mmGCVM_INVALIDATE_ENG11_REQ_DEFAULT 0x02f80000 1663 #define mmGCVM_INVALIDATE_ENG12_REQ_DEFAULT 0x02f80000 1664 #define mmGCVM_INVALIDATE_ENG13_REQ_DEFAULT 0x02f80000 1665 #define mmGCVM_INVALIDATE_ENG14_REQ_DEFAULT 0x02f80000 1666 #define mmGCVM_INVALIDATE_ENG15_REQ_DEFAULT 0x02f80000 1667 #define mmGCVM_INVALIDATE_ENG16_REQ_DEFAULT 0x02f80000 1668 #define mmGCVM_INVALIDATE_ENG17_REQ_DEFAULT 0x02f80000 1669 #define mmGCVM_INVALIDATE_ENG0_ACK_DEFAULT 0x00000000 1670 #define mmGCVM_INVALIDATE_ENG1_ACK_DEFAULT 0x00000000 1671 #define mmGCVM_INVALIDATE_ENG2_ACK_DEFAULT 0x00000000 1672 #define mmGCVM_INVALIDATE_ENG3_ACK_DEFAULT 0x00000000 1673 #define mmGCVM_INVALIDATE_ENG4_ACK_DEFAULT 0x00000000 1674 #define mmGCVM_INVALIDATE_ENG5_ACK_DEFAULT 0x00000000 1675 #define mmGCVM_INVALIDATE_ENG6_ACK_DEFAULT 0x00000000 1676 #define mmGCVM_INVALIDATE_ENG7_ACK_DEFAULT 0x00000000 1677 #define mmGCVM_INVALIDATE_ENG8_ACK_DEFAULT 0x00000000 1678 #define mmGCVM_INVALIDATE_ENG9_ACK_DEFAULT 0x00000000 1679 #define mmGCVM_INVALIDATE_ENG10_ACK_DEFAULT 0x00000000 1680 #define mmGCVM_INVALIDATE_ENG11_ACK_DEFAULT 0x00000000 1681 #define mmGCVM_INVALIDATE_ENG12_ACK_DEFAULT 0x00000000 1682 #define mmGCVM_INVALIDATE_ENG13_ACK_DEFAULT 0x00000000 1683 #define mmGCVM_INVALIDATE_ENG14_ACK_DEFAULT 0x00000000 1684 #define mmGCVM_INVALIDATE_ENG15_ACK_DEFAULT 0x00000000 1685 #define mmGCVM_INVALIDATE_ENG16_ACK_DEFAULT 0x00000000 1686 #define mmGCVM_INVALIDATE_ENG17_ACK_DEFAULT 0x00000000 1687 #define mmGCVM_INVALIDATE_ENG0_ADDR_RANGE_LO32_DEFAULT 0x00000000 1688 #define mmGCVM_INVALIDATE_ENG0_ADDR_RANGE_HI32_DEFAULT 0x00000000 1689 #define mmGCVM_INVALIDATE_ENG1_ADDR_RANGE_LO32_DEFAULT 0x00000000 1690 #define mmGCVM_INVALIDATE_ENG1_ADDR_RANGE_HI32_DEFAULT 0x00000000 1691 #define mmGCVM_INVALIDATE_ENG2_ADDR_RANGE_LO32_DEFAULT 0x00000000 1692 #define mmGCVM_INVALIDATE_ENG2_ADDR_RANGE_HI32_DEFAULT 0x00000000 1693 #define mmGCVM_INVALIDATE_ENG3_ADDR_RANGE_LO32_DEFAULT 0x00000000 1694 #define mmGCVM_INVALIDATE_ENG3_ADDR_RANGE_HI32_DEFAULT 0x00000000 1695 #define mmGCVM_INVALIDATE_ENG4_ADDR_RANGE_LO32_DEFAULT 0x00000000 1696 #define mmGCVM_INVALIDATE_ENG4_ADDR_RANGE_HI32_DEFAULT 0x00000000 1697 #define mmGCVM_INVALIDATE_ENG5_ADDR_RANGE_LO32_DEFAULT 0x00000000 1698 #define mmGCVM_INVALIDATE_ENG5_ADDR_RANGE_HI32_DEFAULT 0x00000000 1699 #define mmGCVM_INVALIDATE_ENG6_ADDR_RANGE_LO32_DEFAULT 0x00000000 1700 #define mmGCVM_INVALIDATE_ENG6_ADDR_RANGE_HI32_DEFAULT 0x00000000 1701 #define mmGCVM_INVALIDATE_ENG7_ADDR_RANGE_LO32_DEFAULT 0x00000000 1702 #define mmGCVM_INVALIDATE_ENG7_ADDR_RANGE_HI32_DEFAULT 0x00000000 1703 #define mmGCVM_INVALIDATE_ENG8_ADDR_RANGE_LO32_DEFAULT 0x00000000 1704 #define mmGCVM_INVALIDATE_ENG8_ADDR_RANGE_HI32_DEFAULT 0x00000000 1705 #define mmGCVM_INVALIDATE_ENG9_ADDR_RANGE_LO32_DEFAULT 0x00000000 1706 #define mmGCVM_INVALIDATE_ENG9_ADDR_RANGE_HI32_DEFAULT 0x00000000 1707 #define mmGCVM_INVALIDATE_ENG10_ADDR_RANGE_LO32_DEFAULT 0x00000000 1708 #define mmGCVM_INVALIDATE_ENG10_ADDR_RANGE_HI32_DEFAULT 0x00000000 1709 #define mmGCVM_INVALIDATE_ENG11_ADDR_RANGE_LO32_DEFAULT 0x00000000 1710 #define mmGCVM_INVALIDATE_ENG11_ADDR_RANGE_HI32_DEFAULT 0x00000000 1711 #define mmGCVM_INVALIDATE_ENG12_ADDR_RANGE_LO32_DEFAULT 0x00000000 1712 #define mmGCVM_INVALIDATE_ENG12_ADDR_RANGE_HI32_DEFAULT 0x00000000 1713 #define mmGCVM_INVALIDATE_ENG13_ADDR_RANGE_LO32_DEFAULT 0x00000000 1714 #define mmGCVM_INVALIDATE_ENG13_ADDR_RANGE_HI32_DEFAULT 0x00000000 1715 #define mmGCVM_INVALIDATE_ENG14_ADDR_RANGE_LO32_DEFAULT 0x00000000 1716 #define mmGCVM_INVALIDATE_ENG14_ADDR_RANGE_HI32_DEFAULT 0x00000000 1717 #define mmGCVM_INVALIDATE_ENG15_ADDR_RANGE_LO32_DEFAULT 0x00000000 1718 #define mmGCVM_INVALIDATE_ENG15_ADDR_RANGE_HI32_DEFAULT 0x00000000 1719 #define mmGCVM_INVALIDATE_ENG16_ADDR_RANGE_LO32_DEFAULT 0x00000000 1720 #define mmGCVM_INVALIDATE_ENG16_ADDR_RANGE_HI32_DEFAULT 0x00000000 1721 #define mmGCVM_INVALIDATE_ENG17_ADDR_RANGE_LO32_DEFAULT 0x00000000 1722 #define mmGCVM_INVALIDATE_ENG17_ADDR_RANGE_HI32_DEFAULT 0x00000000 1723 #define mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1724 #define mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1725 #define mmGCVM_CONTEXT1_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1726 #define mmGCVM_CONTEXT1_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1727 #define mmGCVM_CONTEXT2_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1728 #define mmGCVM_CONTEXT2_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1729 #define mmGCVM_CONTEXT3_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1730 #define mmGCVM_CONTEXT3_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1731 #define mmGCVM_CONTEXT4_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1732 #define mmGCVM_CONTEXT4_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1733 #define mmGCVM_CONTEXT5_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1734 #define mmGCVM_CONTEXT5_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1735 #define mmGCVM_CONTEXT6_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1736 #define mmGCVM_CONTEXT6_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1737 #define mmGCVM_CONTEXT7_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1738 #define mmGCVM_CONTEXT7_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1739 #define mmGCVM_CONTEXT8_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1740 #define mmGCVM_CONTEXT8_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1741 #define mmGCVM_CONTEXT9_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1742 #define mmGCVM_CONTEXT9_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1743 #define mmGCVM_CONTEXT10_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1744 #define mmGCVM_CONTEXT10_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1745 #define mmGCVM_CONTEXT11_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1746 #define mmGCVM_CONTEXT11_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1747 #define mmGCVM_CONTEXT12_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1748 #define mmGCVM_CONTEXT12_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1749 #define mmGCVM_CONTEXT13_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1750 #define mmGCVM_CONTEXT13_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1751 #define mmGCVM_CONTEXT14_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1752 #define mmGCVM_CONTEXT14_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1753 #define mmGCVM_CONTEXT15_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000 1754 #define mmGCVM_CONTEXT15_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000 1755 #define mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1756 #define mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1757 #define mmGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1758 #define mmGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1759 #define mmGCVM_CONTEXT2_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1760 #define mmGCVM_CONTEXT2_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1761 #define mmGCVM_CONTEXT3_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1762 #define mmGCVM_CONTEXT3_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1763 #define mmGCVM_CONTEXT4_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1764 #define mmGCVM_CONTEXT4_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1765 #define mmGCVM_CONTEXT5_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1766 #define mmGCVM_CONTEXT5_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1767 #define mmGCVM_CONTEXT6_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1768 #define mmGCVM_CONTEXT6_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1769 #define mmGCVM_CONTEXT7_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1770 #define mmGCVM_CONTEXT7_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1771 #define mmGCVM_CONTEXT8_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1772 #define mmGCVM_CONTEXT8_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1773 #define mmGCVM_CONTEXT9_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1774 #define mmGCVM_CONTEXT9_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1775 #define mmGCVM_CONTEXT10_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1776 #define mmGCVM_CONTEXT10_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1777 #define mmGCVM_CONTEXT11_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1778 #define mmGCVM_CONTEXT11_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1779 #define mmGCVM_CONTEXT12_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1780 #define mmGCVM_CONTEXT12_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1781 #define mmGCVM_CONTEXT13_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1782 #define mmGCVM_CONTEXT13_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1783 #define mmGCVM_CONTEXT14_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1784 #define mmGCVM_CONTEXT14_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1785 #define mmGCVM_CONTEXT15_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000 1786 #define mmGCVM_CONTEXT15_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000 1787 #define mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1788 #define mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1789 #define mmGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1790 #define mmGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1791 #define mmGCVM_CONTEXT2_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1792 #define mmGCVM_CONTEXT2_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1793 #define mmGCVM_CONTEXT3_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1794 #define mmGCVM_CONTEXT3_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1795 #define mmGCVM_CONTEXT4_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1796 #define mmGCVM_CONTEXT4_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1797 #define mmGCVM_CONTEXT5_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1798 #define mmGCVM_CONTEXT5_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1799 #define mmGCVM_CONTEXT6_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1800 #define mmGCVM_CONTEXT6_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1801 #define mmGCVM_CONTEXT7_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1802 #define mmGCVM_CONTEXT7_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1803 #define mmGCVM_CONTEXT8_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1804 #define mmGCVM_CONTEXT8_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1805 #define mmGCVM_CONTEXT9_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1806 #define mmGCVM_CONTEXT9_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1807 #define mmGCVM_CONTEXT10_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1808 #define mmGCVM_CONTEXT10_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1809 #define mmGCVM_CONTEXT11_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1810 #define mmGCVM_CONTEXT11_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1811 #define mmGCVM_CONTEXT12_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1812 #define mmGCVM_CONTEXT12_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1813 #define mmGCVM_CONTEXT13_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1814 #define mmGCVM_CONTEXT13_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1815 #define mmGCVM_CONTEXT14_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1816 #define mmGCVM_CONTEXT14_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1817 #define mmGCVM_CONTEXT15_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000 1818 #define mmGCVM_CONTEXT15_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000 1819 #define mmGCVM_L2_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 1820 #define mmGCVM_L2_CONTEXT0_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 1821 #define mmGCVM_L2_CONTEXT1_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 1822 #define mmGCVM_L2_CONTEXT2_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 1823 #define mmGCVM_L2_CONTEXT3_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 1824 #define mmGCVM_L2_CONTEXT4_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 1825 #define mmGCVM_L2_CONTEXT5_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 1826 #define mmGCVM_L2_CONTEXT6_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 1827 #define mmGCVM_L2_CONTEXT7_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 1828 #define mmGCVM_L2_CONTEXT8_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 1829 #define mmGCVM_L2_CONTEXT9_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 1830 #define mmGCVM_L2_CONTEXT10_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 1831 #define mmGCVM_L2_CONTEXT11_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 1832 #define mmGCVM_L2_CONTEXT12_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 1833 #define mmGCVM_L2_CONTEXT13_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 1834 #define mmGCVM_L2_CONTEXT14_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 1835 #define mmGCVM_L2_CONTEXT15_PER_PFVF_PTE_CACHE_FRAGMENT_SIZES_DEFAULT 0x00001c00 1836 1837 1838 // addressBlock: gc_gcvmsharedpfdec 1839 #define mmGCMC_VM_NB_MMIOBASE_DEFAULT 0x00000000 1840 #define mmGCMC_VM_NB_MMIOLIMIT_DEFAULT 0x00000000 1841 #define mmGCMC_VM_NB_PCI_CTRL_DEFAULT 0x00000000 1842 #define mmGCMC_VM_NB_PCI_ARB_DEFAULT 0x00000008 1843 #define mmGCMC_VM_NB_TOP_OF_DRAM_SLOT1_DEFAULT 0x00000000 1844 #define mmGCMC_VM_NB_LOWER_TOP_OF_DRAM2_DEFAULT 0x00000000 1845 #define mmGCMC_VM_NB_UPPER_TOP_OF_DRAM2_DEFAULT 0x00000000 1846 #define mmGCMC_VM_FB_OFFSET_DEFAULT 0x00000000 1847 #define mmGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB_DEFAULT 0x00000000 1848 #define mmGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB_DEFAULT 0x00000000 1849 #define mmGCMC_VM_STEERING_DEFAULT 0x00000001 1850 #define mmGCMC_SHARED_VIRT_RESET_REQ_DEFAULT 0x00000000 1851 #define mmGCMC_MEM_POWER_LS_DEFAULT 0x00000208 1852 #define mmGCMC_VM_CACHEABLE_DRAM_ADDRESS_START_DEFAULT 0x00000000 1853 #define mmGCMC_VM_CACHEABLE_DRAM_ADDRESS_END_DEFAULT 0x000fffff 1854 #define mmGCMC_VM_APT_CNTL_DEFAULT 0x0000000c 1855 #define mmGCMC_VM_LOCAL_HBM_ADDRESS_LOCK_CNTL_DEFAULT 0x00000000 1856 #define mmGCMC_VM_LOCAL_HBM_ADDRESS_START_DEFAULT 0x00000000 1857 #define mmGCMC_VM_LOCAL_HBM_ADDRESS_END_DEFAULT 0x000fffff 1858 #define mmGCMC_SHARED_ACTIVE_FCN_ID_DEFAULT 0x00000000 1859 #define mmGCMC_SHARED_VIRT_RESET_REQ2_DEFAULT 0x00000000 1860 #define mmGCMC_VM_XGMI_LFB_CNTL_DEFAULT 0x00000000 1861 #define mmGCMC_VM_XGMI_LFB_SIZE_DEFAULT 0x00000000 1862 #define mmGCMC_VM_FB_NOALLOC_CNTL_DEFAULT 0x00000000 1863 #define mmGCUTCL2_HARVEST_BYPASS_GROUPS_DEFAULT 0x00000000 1864 1865 1866 // addressBlock: gc_gcvmsharedvcdec 1867 #define mmGCMC_VM_FB_LOCATION_BASE_DEFAULT 0x00000000 1868 #define mmGCMC_VM_FB_LOCATION_TOP_DEFAULT 0x00000000 1869 #define mmGCMC_VM_AGP_TOP_DEFAULT 0x00000000 1870 #define mmGCMC_VM_AGP_BOT_DEFAULT 0x00000000 1871 #define mmGCMC_VM_AGP_BASE_DEFAULT 0x00000000 1872 #define mmGCMC_VM_SYSTEM_APERTURE_LOW_ADDR_DEFAULT 0x00000000 1873 #define mmGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR_DEFAULT 0x00000000 1874 #define mmGCMC_VM_MX_L1_TLB_CNTL_DEFAULT 0x00000501 1875 1876 1877 // addressBlock: gc_gceadec 1878 #define mmGCEA_DRAM_RD_CLI2GRP_MAP0_DEFAULT 0xa9503aaa 1879 #define mmGCEA_DRAM_RD_CLI2GRP_MAP1_DEFAULT 0xa9503aaa 1880 #define mmGCEA_DRAM_WR_CLI2GRP_MAP0_DEFAULT 0xa9503aaa 1881 #define mmGCEA_DRAM_WR_CLI2GRP_MAP1_DEFAULT 0xa9503aaa 1882 #define mmGCEA_DRAM_RD_GRP2VC_MAP_DEFAULT 0x00000924 1883 #define mmGCEA_DRAM_WR_GRP2VC_MAP_DEFAULT 0x00000324 1884 #define mmGCEA_DRAM_RD_LAZY_DEFAULT 0x78000924 1885 #define mmGCEA_DRAM_WR_LAZY_DEFAULT 0x78000924 1886 #define mmGCEA_DRAM_RD_CAM_CNTL_DEFAULT 0x16db4444 1887 #define mmGCEA_DRAM_WR_CAM_CNTL_DEFAULT 0x16db4444 1888 #define mmGCEA_DRAM_PAGE_BURST_DEFAULT 0x20082008 1889 #define mmGCEA_DRAM_RD_PRI_AGE_DEFAULT 0x00db6249 1890 #define mmGCEA_DRAM_WR_PRI_AGE_DEFAULT 0x00db6249 1891 #define mmGCEA_DRAM_RD_PRI_QUEUING_DEFAULT 0x00000db6 1892 #define mmGCEA_DRAM_WR_PRI_QUEUING_DEFAULT 0x00000db6 1893 #define mmGCEA_DRAM_RD_PRI_FIXED_DEFAULT 0x00000924 1894 #define mmGCEA_DRAM_WR_PRI_FIXED_DEFAULT 0x00000924 1895 #define mmGCEA_DRAM_RD_PRI_URGENCY_DEFAULT 0x0000fdb6 1896 #define mmGCEA_DRAM_WR_PRI_URGENCY_DEFAULT 0x0000fdb6 1897 #define mmGCEA_DRAM_RD_PRI_QUANT_PRI1_DEFAULT 0x3f3f3f3f 1898 #define mmGCEA_DRAM_RD_PRI_QUANT_PRI2_DEFAULT 0x7f7f7f7f 1899 #define mmGCEA_DRAM_RD_PRI_QUANT_PRI3_DEFAULT 0xffffffff 1900 #define mmGCEA_DRAM_WR_PRI_QUANT_PRI1_DEFAULT 0x3f3f3f3f 1901 #define mmGCEA_DRAM_WR_PRI_QUANT_PRI2_DEFAULT 0x7f7f7f7f 1902 #define mmGCEA_DRAM_WR_PRI_QUANT_PRI3_DEFAULT 0xffffffff 1903 #define mmGCEA_IO_RD_CLI2GRP_MAP0_DEFAULT 0xa9503aaa 1904 #define mmGCEA_IO_RD_CLI2GRP_MAP1_DEFAULT 0xa9503aaa 1905 #define mmGCEA_IO_WR_CLI2GRP_MAP0_DEFAULT 0xa9503aaa 1906 #define mmGCEA_IO_WR_CLI2GRP_MAP1_DEFAULT 0xa9503aaa 1907 #define mmGCEA_IO_RD_COMBINE_FLUSH_DEFAULT 0x00007777 1908 #define mmGCEA_IO_WR_COMBINE_FLUSH_DEFAULT 0x00007777 1909 #define mmGCEA_IO_GROUP_BURST_DEFAULT 0x1f031f03 1910 #define mmGCEA_IO_RD_PRI_AGE_DEFAULT 0x00db6249 1911 #define mmGCEA_IO_WR_PRI_AGE_DEFAULT 0x00db6249 1912 #define mmGCEA_IO_RD_PRI_QUEUING_DEFAULT 0x00000db6 1913 #define mmGCEA_IO_WR_PRI_QUEUING_DEFAULT 0x00000db6 1914 #define mmGCEA_IO_RD_PRI_FIXED_DEFAULT 0x00000924 1915 #define mmGCEA_IO_WR_PRI_FIXED_DEFAULT 0x00000924 1916 #define mmGCEA_IO_RD_PRI_URGENCY_DEFAULT 0x00000492 1917 #define mmGCEA_IO_WR_PRI_URGENCY_DEFAULT 0x00000492 1918 #define mmGCEA_IO_RD_PRI_URGENCY_MASKING_DEFAULT 0xffffffff 1919 #define mmGCEA_IO_WR_PRI_URGENCY_MASKING_DEFAULT 0xffffffff 1920 #define mmGCEA_IO_RD_PRI_QUANT_PRI1_DEFAULT 0x3f3f3f3f 1921 #define mmGCEA_IO_RD_PRI_QUANT_PRI2_DEFAULT 0x7f7f7f7f 1922 #define mmGCEA_IO_RD_PRI_QUANT_PRI3_DEFAULT 0xffffffff 1923 #define mmGCEA_IO_WR_PRI_QUANT_PRI1_DEFAULT 0x3f3f3f3f 1924 #define mmGCEA_IO_WR_PRI_QUANT_PRI2_DEFAULT 0x7f7f7f7f 1925 #define mmGCEA_IO_WR_PRI_QUANT_PRI3_DEFAULT 0xffffffff 1926 1927 1928 // addressBlock: gc_tcdec 1929 #define mmTCP_INVALIDATE_DEFAULT 0x00000000 1930 #define mmTCP_STATUS_DEFAULT 0x00000000 1931 #define mmTCP_EDC_CNT_DEFAULT 0x00000000 1932 #define mmTCI_STATUS_DEFAULT 0x00000000 1933 #define mmTCI_CNTL_1_DEFAULT 0x40080022 1934 #define mmTCI_CNTL_2_DEFAULT 0x00000041 1935 1936 1937 // addressBlock: gc_shdec 1938 #define mmSPI_SHADER_PGM_RSRC4_PS_DEFAULT 0x0000ffff 1939 #define mmSPI_SHADER_PGM_CHKSUM_PS_DEFAULT 0x00000000 1940 #define mmSPI_SHADER_PGM_RSRC3_PS_DEFAULT 0x0000ffff 1941 #define mmSPI_SHADER_PGM_LO_PS_DEFAULT 0x00000000 1942 #define mmSPI_SHADER_PGM_HI_PS_DEFAULT 0x00000000 1943 #define mmSPI_SHADER_PGM_RSRC1_PS_DEFAULT 0x00000000 1944 #define mmSPI_SHADER_PGM_RSRC2_PS_DEFAULT 0x00000000 1945 #define mmSPI_SHADER_USER_DATA_PS_0_DEFAULT 0x00000000 1946 #define mmSPI_SHADER_USER_DATA_PS_1_DEFAULT 0x00000000 1947 #define mmSPI_SHADER_USER_DATA_PS_2_DEFAULT 0x00000000 1948 #define mmSPI_SHADER_USER_DATA_PS_3_DEFAULT 0x00000000 1949 #define mmSPI_SHADER_USER_DATA_PS_4_DEFAULT 0x00000000 1950 #define mmSPI_SHADER_USER_DATA_PS_5_DEFAULT 0x00000000 1951 #define mmSPI_SHADER_USER_DATA_PS_6_DEFAULT 0x00000000 1952 #define mmSPI_SHADER_USER_DATA_PS_7_DEFAULT 0x00000000 1953 #define mmSPI_SHADER_USER_DATA_PS_8_DEFAULT 0x00000000 1954 #define mmSPI_SHADER_USER_DATA_PS_9_DEFAULT 0x00000000 1955 #define mmSPI_SHADER_USER_DATA_PS_10_DEFAULT 0x00000000 1956 #define mmSPI_SHADER_USER_DATA_PS_11_DEFAULT 0x00000000 1957 #define mmSPI_SHADER_USER_DATA_PS_12_DEFAULT 0x00000000 1958 #define mmSPI_SHADER_USER_DATA_PS_13_DEFAULT 0x00000000 1959 #define mmSPI_SHADER_USER_DATA_PS_14_DEFAULT 0x00000000 1960 #define mmSPI_SHADER_USER_DATA_PS_15_DEFAULT 0x00000000 1961 #define mmSPI_SHADER_USER_DATA_PS_16_DEFAULT 0x00000000 1962 #define mmSPI_SHADER_USER_DATA_PS_17_DEFAULT 0x00000000 1963 #define mmSPI_SHADER_USER_DATA_PS_18_DEFAULT 0x00000000 1964 #define mmSPI_SHADER_USER_DATA_PS_19_DEFAULT 0x00000000 1965 #define mmSPI_SHADER_USER_DATA_PS_20_DEFAULT 0x00000000 1966 #define mmSPI_SHADER_USER_DATA_PS_21_DEFAULT 0x00000000 1967 #define mmSPI_SHADER_USER_DATA_PS_22_DEFAULT 0x00000000 1968 #define mmSPI_SHADER_USER_DATA_PS_23_DEFAULT 0x00000000 1969 #define mmSPI_SHADER_USER_DATA_PS_24_DEFAULT 0x00000000 1970 #define mmSPI_SHADER_USER_DATA_PS_25_DEFAULT 0x00000000 1971 #define mmSPI_SHADER_USER_DATA_PS_26_DEFAULT 0x00000000 1972 #define mmSPI_SHADER_USER_DATA_PS_27_DEFAULT 0x00000000 1973 #define mmSPI_SHADER_USER_DATA_PS_28_DEFAULT 0x00000000 1974 #define mmSPI_SHADER_USER_DATA_PS_29_DEFAULT 0x00000000 1975 #define mmSPI_SHADER_USER_DATA_PS_30_DEFAULT 0x00000000 1976 #define mmSPI_SHADER_USER_DATA_PS_31_DEFAULT 0x00000000 1977 #define mmSPI_SHADER_REQ_CTRL_PS_DEFAULT 0x00000000 1978 #define mmSPI_SHADER_USER_ACCUM_PS_0_DEFAULT 0x00000000 1979 #define mmSPI_SHADER_USER_ACCUM_PS_1_DEFAULT 0x00000000 1980 #define mmSPI_SHADER_USER_ACCUM_PS_2_DEFAULT 0x00000000 1981 #define mmSPI_SHADER_USER_ACCUM_PS_3_DEFAULT 0x00000000 1982 #define mmSPI_SHADER_PGM_RSRC4_VS_DEFAULT 0x0000ffff 1983 #define mmSPI_SHADER_PGM_CHKSUM_VS_DEFAULT 0x00000000 1984 #define mmSPI_SHADER_PGM_RSRC3_VS_DEFAULT 0x0000ffff 1985 #define mmSPI_SHADER_LATE_ALLOC_VS_DEFAULT 0x00000000 1986 #define mmSPI_SHADER_PGM_LO_VS_DEFAULT 0x00000000 1987 #define mmSPI_SHADER_PGM_HI_VS_DEFAULT 0x00000000 1988 #define mmSPI_SHADER_PGM_RSRC1_VS_DEFAULT 0x00000000 1989 #define mmSPI_SHADER_PGM_RSRC2_VS_DEFAULT 0x00000000 1990 #define mmSPI_SHADER_USER_DATA_VS_0_DEFAULT 0x00000000 1991 #define mmSPI_SHADER_USER_DATA_VS_1_DEFAULT 0x00000000 1992 #define mmSPI_SHADER_USER_DATA_VS_2_DEFAULT 0x00000000 1993 #define mmSPI_SHADER_USER_DATA_VS_3_DEFAULT 0x00000000 1994 #define mmSPI_SHADER_USER_DATA_VS_4_DEFAULT 0x00000000 1995 #define mmSPI_SHADER_USER_DATA_VS_5_DEFAULT 0x00000000 1996 #define mmSPI_SHADER_USER_DATA_VS_6_DEFAULT 0x00000000 1997 #define mmSPI_SHADER_USER_DATA_VS_7_DEFAULT 0x00000000 1998 #define mmSPI_SHADER_USER_DATA_VS_8_DEFAULT 0x00000000 1999 #define mmSPI_SHADER_USER_DATA_VS_9_DEFAULT 0x00000000 2000 #define mmSPI_SHADER_USER_DATA_VS_10_DEFAULT 0x00000000 2001 #define mmSPI_SHADER_USER_DATA_VS_11_DEFAULT 0x00000000 2002 #define mmSPI_SHADER_USER_DATA_VS_12_DEFAULT 0x00000000 2003 #define mmSPI_SHADER_USER_DATA_VS_13_DEFAULT 0x00000000 2004 #define mmSPI_SHADER_USER_DATA_VS_14_DEFAULT 0x00000000 2005 #define mmSPI_SHADER_USER_DATA_VS_15_DEFAULT 0x00000000 2006 #define mmSPI_SHADER_USER_DATA_VS_16_DEFAULT 0x00000000 2007 #define mmSPI_SHADER_USER_DATA_VS_17_DEFAULT 0x00000000 2008 #define mmSPI_SHADER_USER_DATA_VS_18_DEFAULT 0x00000000 2009 #define mmSPI_SHADER_USER_DATA_VS_19_DEFAULT 0x00000000 2010 #define mmSPI_SHADER_USER_DATA_VS_20_DEFAULT 0x00000000 2011 #define mmSPI_SHADER_USER_DATA_VS_21_DEFAULT 0x00000000 2012 #define mmSPI_SHADER_USER_DATA_VS_22_DEFAULT 0x00000000 2013 #define mmSPI_SHADER_USER_DATA_VS_23_DEFAULT 0x00000000 2014 #define mmSPI_SHADER_USER_DATA_VS_24_DEFAULT 0x00000000 2015 #define mmSPI_SHADER_USER_DATA_VS_25_DEFAULT 0x00000000 2016 #define mmSPI_SHADER_USER_DATA_VS_26_DEFAULT 0x00000000 2017 #define mmSPI_SHADER_USER_DATA_VS_27_DEFAULT 0x00000000 2018 #define mmSPI_SHADER_USER_DATA_VS_28_DEFAULT 0x00000000 2019 #define mmSPI_SHADER_USER_DATA_VS_29_DEFAULT 0x00000000 2020 #define mmSPI_SHADER_USER_DATA_VS_30_DEFAULT 0x00000000 2021 #define mmSPI_SHADER_USER_DATA_VS_31_DEFAULT 0x00000000 2022 #define mmSPI_SHADER_REQ_CTRL_VS_DEFAULT 0x00000000 2023 #define mmSPI_SHADER_USER_ACCUM_VS_0_DEFAULT 0x00000000 2024 #define mmSPI_SHADER_USER_ACCUM_VS_1_DEFAULT 0x00000000 2025 #define mmSPI_SHADER_USER_ACCUM_VS_2_DEFAULT 0x00000000 2026 #define mmSPI_SHADER_USER_ACCUM_VS_3_DEFAULT 0x00000000 2027 #define mmSPI_SHADER_PGM_RSRC2_GS_VS_DEFAULT 0x00000000 2028 #define mmSPI_SHADER_PGM_CHKSUM_GS_DEFAULT 0x00000000 2029 #define mmSPI_SHADER_PGM_RSRC4_GS_DEFAULT 0x0010ffff 2030 #define mmSPI_SHADER_USER_DATA_ADDR_LO_GS_DEFAULT 0x00000000 2031 #define mmSPI_SHADER_USER_DATA_ADDR_HI_GS_DEFAULT 0x00000000 2032 #define mmSPI_SHADER_PGM_LO_ES_GS_DEFAULT 0x00000000 2033 #define mmSPI_SHADER_PGM_HI_ES_GS_DEFAULT 0x00000000 2034 #define mmSPI_SHADER_PGM_RSRC3_GS_DEFAULT 0x0000fffe 2035 #define mmSPI_SHADER_PGM_LO_GS_DEFAULT 0x00000000 2036 #define mmSPI_SHADER_PGM_HI_GS_DEFAULT 0x00000000 2037 #define mmSPI_SHADER_PGM_RSRC1_GS_DEFAULT 0x00000000 2038 #define mmSPI_SHADER_PGM_RSRC2_GS_DEFAULT 0x00000000 2039 #define mmSPI_SHADER_USER_DATA_GS_0_DEFAULT 0x00000000 2040 #define mmSPI_SHADER_USER_DATA_GS_1_DEFAULT 0x00000000 2041 #define mmSPI_SHADER_USER_DATA_GS_2_DEFAULT 0x00000000 2042 #define mmSPI_SHADER_USER_DATA_GS_3_DEFAULT 0x00000000 2043 #define mmSPI_SHADER_USER_DATA_GS_4_DEFAULT 0x00000000 2044 #define mmSPI_SHADER_USER_DATA_GS_5_DEFAULT 0x00000000 2045 #define mmSPI_SHADER_USER_DATA_GS_6_DEFAULT 0x00000000 2046 #define mmSPI_SHADER_USER_DATA_GS_7_DEFAULT 0x00000000 2047 #define mmSPI_SHADER_USER_DATA_GS_8_DEFAULT 0x00000000 2048 #define mmSPI_SHADER_USER_DATA_GS_9_DEFAULT 0x00000000 2049 #define mmSPI_SHADER_USER_DATA_GS_10_DEFAULT 0x00000000 2050 #define mmSPI_SHADER_USER_DATA_GS_11_DEFAULT 0x00000000 2051 #define mmSPI_SHADER_USER_DATA_GS_12_DEFAULT 0x00000000 2052 #define mmSPI_SHADER_USER_DATA_GS_13_DEFAULT 0x00000000 2053 #define mmSPI_SHADER_USER_DATA_GS_14_DEFAULT 0x00000000 2054 #define mmSPI_SHADER_USER_DATA_GS_15_DEFAULT 0x00000000 2055 #define mmSPI_SHADER_USER_DATA_GS_16_DEFAULT 0x00000000 2056 #define mmSPI_SHADER_USER_DATA_GS_17_DEFAULT 0x00000000 2057 #define mmSPI_SHADER_USER_DATA_GS_18_DEFAULT 0x00000000 2058 #define mmSPI_SHADER_USER_DATA_GS_19_DEFAULT 0x00000000 2059 #define mmSPI_SHADER_USER_DATA_GS_20_DEFAULT 0x00000000 2060 #define mmSPI_SHADER_USER_DATA_GS_21_DEFAULT 0x00000000 2061 #define mmSPI_SHADER_USER_DATA_GS_22_DEFAULT 0x00000000 2062 #define mmSPI_SHADER_USER_DATA_GS_23_DEFAULT 0x00000000 2063 #define mmSPI_SHADER_USER_DATA_GS_24_DEFAULT 0x00000000 2064 #define mmSPI_SHADER_USER_DATA_GS_25_DEFAULT 0x00000000 2065 #define mmSPI_SHADER_USER_DATA_GS_26_DEFAULT 0x00000000 2066 #define mmSPI_SHADER_USER_DATA_GS_27_DEFAULT 0x00000000 2067 #define mmSPI_SHADER_USER_DATA_GS_28_DEFAULT 0x00000000 2068 #define mmSPI_SHADER_USER_DATA_GS_29_DEFAULT 0x00000000 2069 #define mmSPI_SHADER_USER_DATA_GS_30_DEFAULT 0x00000000 2070 #define mmSPI_SHADER_USER_DATA_GS_31_DEFAULT 0x00000000 2071 #define mmSPI_SHADER_REQ_CTRL_ESGS_DEFAULT 0x00000000 2072 #define mmSPI_SHADER_USER_ACCUM_ESGS_0_DEFAULT 0x00000000 2073 #define mmSPI_SHADER_USER_ACCUM_ESGS_1_DEFAULT 0x00000000 2074 #define mmSPI_SHADER_USER_ACCUM_ESGS_2_DEFAULT 0x00000000 2075 #define mmSPI_SHADER_USER_ACCUM_ESGS_3_DEFAULT 0x00000000 2076 #define mmSPI_SHADER_PGM_LO_ES_DEFAULT 0x00000000 2077 #define mmSPI_SHADER_PGM_HI_ES_DEFAULT 0x00000000 2078 #define mmSPI_SHADER_PGM_CHKSUM_HS_DEFAULT 0x00000000 2079 #define mmSPI_SHADER_PGM_RSRC4_HS_DEFAULT 0x0000ffff 2080 #define mmSPI_SHADER_USER_DATA_ADDR_LO_HS_DEFAULT 0x00000000 2081 #define mmSPI_SHADER_USER_DATA_ADDR_HI_HS_DEFAULT 0x00000000 2082 #define mmSPI_SHADER_PGM_LO_LS_HS_DEFAULT 0x00000000 2083 #define mmSPI_SHADER_PGM_HI_LS_HS_DEFAULT 0x00000000 2084 #define mmSPI_SHADER_PGM_RSRC3_HS_DEFAULT 0xffff0000 2085 #define mmSPI_SHADER_PGM_LO_HS_DEFAULT 0x00000000 2086 #define mmSPI_SHADER_PGM_HI_HS_DEFAULT 0x00000000 2087 #define mmSPI_SHADER_PGM_RSRC1_HS_DEFAULT 0x00000000 2088 #define mmSPI_SHADER_PGM_RSRC2_HS_DEFAULT 0x00000000 2089 #define mmSPI_SHADER_USER_DATA_HS_0_DEFAULT 0x00000000 2090 #define mmSPI_SHADER_USER_DATA_HS_1_DEFAULT 0x00000000 2091 #define mmSPI_SHADER_USER_DATA_HS_2_DEFAULT 0x00000000 2092 #define mmSPI_SHADER_USER_DATA_HS_3_DEFAULT 0x00000000 2093 #define mmSPI_SHADER_USER_DATA_HS_4_DEFAULT 0x00000000 2094 #define mmSPI_SHADER_USER_DATA_HS_5_DEFAULT 0x00000000 2095 #define mmSPI_SHADER_USER_DATA_HS_6_DEFAULT 0x00000000 2096 #define mmSPI_SHADER_USER_DATA_HS_7_DEFAULT 0x00000000 2097 #define mmSPI_SHADER_USER_DATA_HS_8_DEFAULT 0x00000000 2098 #define mmSPI_SHADER_USER_DATA_HS_9_DEFAULT 0x00000000 2099 #define mmSPI_SHADER_USER_DATA_HS_10_DEFAULT 0x00000000 2100 #define mmSPI_SHADER_USER_DATA_HS_11_DEFAULT 0x00000000 2101 #define mmSPI_SHADER_USER_DATA_HS_12_DEFAULT 0x00000000 2102 #define mmSPI_SHADER_USER_DATA_HS_13_DEFAULT 0x00000000 2103 #define mmSPI_SHADER_USER_DATA_HS_14_DEFAULT 0x00000000 2104 #define mmSPI_SHADER_USER_DATA_HS_15_DEFAULT 0x00000000 2105 #define mmSPI_SHADER_USER_DATA_HS_16_DEFAULT 0x00000000 2106 #define mmSPI_SHADER_USER_DATA_HS_17_DEFAULT 0x00000000 2107 #define mmSPI_SHADER_USER_DATA_HS_18_DEFAULT 0x00000000 2108 #define mmSPI_SHADER_USER_DATA_HS_19_DEFAULT 0x00000000 2109 #define mmSPI_SHADER_USER_DATA_HS_20_DEFAULT 0x00000000 2110 #define mmSPI_SHADER_USER_DATA_HS_21_DEFAULT 0x00000000 2111 #define mmSPI_SHADER_USER_DATA_HS_22_DEFAULT 0x00000000 2112 #define mmSPI_SHADER_USER_DATA_HS_23_DEFAULT 0x00000000 2113 #define mmSPI_SHADER_USER_DATA_HS_24_DEFAULT 0x00000000 2114 #define mmSPI_SHADER_USER_DATA_HS_25_DEFAULT 0x00000000 2115 #define mmSPI_SHADER_USER_DATA_HS_26_DEFAULT 0x00000000 2116 #define mmSPI_SHADER_USER_DATA_HS_27_DEFAULT 0x00000000 2117 #define mmSPI_SHADER_USER_DATA_HS_28_DEFAULT 0x00000000 2118 #define mmSPI_SHADER_USER_DATA_HS_29_DEFAULT 0x00000000 2119 #define mmSPI_SHADER_USER_DATA_HS_30_DEFAULT 0x00000000 2120 #define mmSPI_SHADER_USER_DATA_HS_31_DEFAULT 0x00000000 2121 #define mmSPI_SHADER_REQ_CTRL_LSHS_DEFAULT 0x00000000 2122 #define mmSPI_SHADER_USER_ACCUM_LSHS_0_DEFAULT 0x00000000 2123 #define mmSPI_SHADER_USER_ACCUM_LSHS_1_DEFAULT 0x00000000 2124 #define mmSPI_SHADER_USER_ACCUM_LSHS_2_DEFAULT 0x00000000 2125 #define mmSPI_SHADER_USER_ACCUM_LSHS_3_DEFAULT 0x00000000 2126 #define mmSPI_SHADER_PGM_LO_LS_DEFAULT 0x00000000 2127 #define mmSPI_SHADER_PGM_HI_LS_DEFAULT 0x00000000 2128 #define mmCOMPUTE_DISPATCH_INITIATOR_DEFAULT 0x00000000 2129 #define mmCOMPUTE_DIM_X_DEFAULT 0x00000000 2130 #define mmCOMPUTE_DIM_Y_DEFAULT 0x00000000 2131 #define mmCOMPUTE_DIM_Z_DEFAULT 0x00000000 2132 #define mmCOMPUTE_START_X_DEFAULT 0x00000000 2133 #define mmCOMPUTE_START_Y_DEFAULT 0x00000000 2134 #define mmCOMPUTE_START_Z_DEFAULT 0x00000000 2135 #define mmCOMPUTE_NUM_THREAD_X_DEFAULT 0x00000000 2136 #define mmCOMPUTE_NUM_THREAD_Y_DEFAULT 0x00000000 2137 #define mmCOMPUTE_NUM_THREAD_Z_DEFAULT 0x00000000 2138 #define mmCOMPUTE_PIPELINESTAT_ENABLE_DEFAULT 0x00000001 2139 #define mmCOMPUTE_PERFCOUNT_ENABLE_DEFAULT 0x00000000 2140 #define mmCOMPUTE_PGM_LO_DEFAULT 0x00000000 2141 #define mmCOMPUTE_PGM_HI_DEFAULT 0x00000000 2142 #define mmCOMPUTE_DISPATCH_PKT_ADDR_LO_DEFAULT 0x00000000 2143 #define mmCOMPUTE_DISPATCH_PKT_ADDR_HI_DEFAULT 0x00000000 2144 #define mmCOMPUTE_DISPATCH_SCRATCH_BASE_LO_DEFAULT 0x00000000 2145 #define mmCOMPUTE_DISPATCH_SCRATCH_BASE_HI_DEFAULT 0x00000000 2146 #define mmCOMPUTE_PGM_RSRC1_DEFAULT 0x00000000 2147 #define mmCOMPUTE_PGM_RSRC2_DEFAULT 0x00000000 2148 #define mmCOMPUTE_VMID_DEFAULT 0x00000000 2149 #define mmCOMPUTE_RESOURCE_LIMITS_DEFAULT 0x00000000 2150 #define mmCOMPUTE_DESTINATION_EN_SE0_DEFAULT 0xffffffff 2151 #define mmCOMPUTE_STATIC_THREAD_MGMT_SE0_DEFAULT 0xffffffff 2152 #define mmCOMPUTE_DESTINATION_EN_SE1_DEFAULT 0xffffffff 2153 #define mmCOMPUTE_STATIC_THREAD_MGMT_SE1_DEFAULT 0xffffffff 2154 #define mmCOMPUTE_TMPRING_SIZE_DEFAULT 0x00000000 2155 #define mmCOMPUTE_DESTINATION_EN_SE2_DEFAULT 0xffffffff 2156 #define mmCOMPUTE_STATIC_THREAD_MGMT_SE2_DEFAULT 0xffffffff 2157 #define mmCOMPUTE_DESTINATION_EN_SE3_DEFAULT 0xffffffff 2158 #define mmCOMPUTE_STATIC_THREAD_MGMT_SE3_DEFAULT 0xffffffff 2159 #define mmCOMPUTE_RESTART_X_DEFAULT 0x00000000 2160 #define mmCOMPUTE_RESTART_Y_DEFAULT 0x00000000 2161 #define mmCOMPUTE_RESTART_Z_DEFAULT 0x00000000 2162 #define mmCOMPUTE_THREAD_TRACE_ENABLE_DEFAULT 0x00000000 2163 #define mmCOMPUTE_MISC_RESERVED_DEFAULT 0x00000003 2164 #define mmCOMPUTE_DISPATCH_ID_DEFAULT 0x00000000 2165 #define mmCOMPUTE_THREADGROUP_ID_DEFAULT 0x00000000 2166 #define mmCOMPUTE_REQ_CTRL_DEFAULT 0x00000000 2167 #define mmCOMPUTE_USER_ACCUM_0_DEFAULT 0x00000000 2168 #define mmCOMPUTE_USER_ACCUM_1_DEFAULT 0x00000000 2169 #define mmCOMPUTE_USER_ACCUM_2_DEFAULT 0x00000000 2170 #define mmCOMPUTE_USER_ACCUM_3_DEFAULT 0x00000000 2171 #define mmCOMPUTE_PGM_RSRC3_DEFAULT 0x00000000 2172 #define mmCOMPUTE_DDID_INDEX_DEFAULT 0x00000000 2173 #define mmCOMPUTE_SHADER_CHKSUM_DEFAULT 0x00000000 2174 #define mmCOMPUTE_RELAUNCH_DEFAULT 0x00000000 2175 #define mmCOMPUTE_WAVE_RESTORE_ADDR_LO_DEFAULT 0x00000000 2176 #define mmCOMPUTE_WAVE_RESTORE_ADDR_HI_DEFAULT 0x00000000 2177 #define mmCOMPUTE_RELAUNCH2_DEFAULT 0x00000000 2178 #define mmCOMPUTE_USER_DATA_0_DEFAULT 0x00000000 2179 #define mmCOMPUTE_USER_DATA_1_DEFAULT 0x00000000 2180 #define mmCOMPUTE_USER_DATA_2_DEFAULT 0x00000000 2181 #define mmCOMPUTE_USER_DATA_3_DEFAULT 0x00000000 2182 #define mmCOMPUTE_USER_DATA_4_DEFAULT 0x00000000 2183 #define mmCOMPUTE_USER_DATA_5_DEFAULT 0x00000000 2184 #define mmCOMPUTE_USER_DATA_6_DEFAULT 0x00000000 2185 #define mmCOMPUTE_USER_DATA_7_DEFAULT 0x00000000 2186 #define mmCOMPUTE_USER_DATA_8_DEFAULT 0x00000000 2187 #define mmCOMPUTE_USER_DATA_9_DEFAULT 0x00000000 2188 #define mmCOMPUTE_USER_DATA_10_DEFAULT 0x00000000 2189 #define mmCOMPUTE_USER_DATA_11_DEFAULT 0x00000000 2190 #define mmCOMPUTE_USER_DATA_12_DEFAULT 0x00000000 2191 #define mmCOMPUTE_USER_DATA_13_DEFAULT 0x00000000 2192 #define mmCOMPUTE_USER_DATA_14_DEFAULT 0x00000000 2193 #define mmCOMPUTE_USER_DATA_15_DEFAULT 0x00000000 2194 #define mmCOMPUTE_DISPATCH_TUNNEL_DEFAULT 0x00000000 2195 #define mmCOMPUTE_DISPATCH_END_DEFAULT 0x00000000 2196 #define mmCOMPUTE_NOWHERE_DEFAULT 0x00000000 2197 #define mmSH_RESERVED_REG0_DEFAULT 0x00000000 2198 #define mmSH_RESERVED_REG1_DEFAULT 0x00000000 2199 2200 2201 // addressBlock: gc_cppdec 2202 #define mmCP_EOPQ_WAIT_TIME_DEFAULT 0x0000052c 2203 #define mmCP_CPC_MGCG_SYNC_CNTL_DEFAULT 0x00001020 2204 #define mmCPC_INT_INFO_DEFAULT 0x00000000 2205 #define mmCP_VIRT_STATUS_DEFAULT 0x00000000 2206 #define mmCPC_INT_ADDR_DEFAULT 0x00000000 2207 #define mmCPC_INT_PASID_DEFAULT 0x00000000 2208 #define mmCP_GFX_ERROR_DEFAULT 0x00000000 2209 #define mmCPG_UTCL1_CNTL_DEFAULT 0x00000080 2210 #define mmCPC_UTCL1_CNTL_DEFAULT 0x00000080 2211 #define mmCPF_UTCL1_CNTL_DEFAULT 0x00000080 2212 #define mmCP_AQL_SMM_STATUS_DEFAULT 0x00000000 2213 #define mmCP_RB0_BASE_DEFAULT 0x00000000 2214 #define mmCP_RB_BASE_DEFAULT 0x00000000 2215 #define mmCP_RB0_CNTL_DEFAULT 0x00a00000 2216 #define mmCP_RB_CNTL_DEFAULT 0x00a00000 2217 #define mmCP_RB_RPTR_WR_DEFAULT 0x00000000 2218 #define mmCP_RB0_RPTR_ADDR_DEFAULT 0x00000000 2219 #define mmCP_RB_RPTR_ADDR_DEFAULT 0x00000000 2220 #define mmCP_RB0_RPTR_ADDR_HI_DEFAULT 0x00000000 2221 #define mmCP_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 2222 #define mmCP_RB0_BUFSZ_MASK_DEFAULT 0x00000000 2223 #define mmCP_RB_BUFSZ_MASK_DEFAULT 0x00000000 2224 #define mmCP_INT_CNTL_DEFAULT 0x00000000 2225 #define mmCP_INT_STATUS_DEFAULT 0x00000000 2226 #define mmCP_DEVICE_ID_DEFAULT 0x00000000 2227 #define mmCP_ME0_PIPE_PRIORITY_CNTS_DEFAULT 0x08081020 2228 #define mmCP_RING_PRIORITY_CNTS_DEFAULT 0x08081020 2229 #define mmCP_ME0_PIPE0_PRIORITY_DEFAULT 0x00000002 2230 #define mmCP_RING0_PRIORITY_DEFAULT 0x00000002 2231 #define mmCP_ME0_PIPE1_PRIORITY_DEFAULT 0x00000002 2232 #define mmCP_RING1_PRIORITY_DEFAULT 0x00000002 2233 #define mmCP_ME0_PIPE2_PRIORITY_DEFAULT 0x00000002 2234 #define mmCP_RING2_PRIORITY_DEFAULT 0x00000002 2235 #define mmCP_FATAL_ERROR_DEFAULT 0x00000000 2236 #define mmCP_RB_VMID_DEFAULT 0x00000000 2237 #define mmCP_ME0_PIPE0_VMID_DEFAULT 0x00000000 2238 #define mmCP_ME0_PIPE1_VMID_DEFAULT 0x00000000 2239 #define mmCP_RB0_WPTR_DEFAULT 0x00000000 2240 #define mmCP_RB_WPTR_DEFAULT 0x00000000 2241 #define mmCP_RB0_WPTR_HI_DEFAULT 0x00000000 2242 #define mmCP_RB_WPTR_HI_DEFAULT 0x00000000 2243 #define mmCP_RB1_WPTR_DEFAULT 0x00000000 2244 #define mmCP_RB1_WPTR_HI_DEFAULT 0x00000000 2245 #define mmCP_RB2_WPTR_DEFAULT 0x00000000 2246 #define mmCP_PROCESS_QUANTUM_DEFAULT 0x00000008 2247 #define mmCP_RB_DOORBELL_RANGE_LOWER_DEFAULT 0x00000000 2248 #define mmCP_RB_DOORBELL_RANGE_UPPER_DEFAULT 0x00000108 2249 #define mmCP_MEC_DOORBELL_RANGE_LOWER_DEFAULT 0x00000110 2250 #define mmCP_MEC_DOORBELL_RANGE_UPPER_DEFAULT 0x00000ffc 2251 #define mmCPG_UTCL1_ERROR_DEFAULT 0x00000000 2252 #define mmCPC_UTCL1_ERROR_DEFAULT 0x00000000 2253 #define mmCP_RB1_BASE_DEFAULT 0x00000000 2254 #define mmCP_RB1_CNTL_DEFAULT 0x00a00000 2255 #define mmCP_RB1_RPTR_ADDR_DEFAULT 0x00000000 2256 #define mmCP_RB1_RPTR_ADDR_HI_DEFAULT 0x00000000 2257 #define mmCP_RB1_BUFSZ_MASK_DEFAULT 0x00000000 2258 #define mmCP_RB2_BASE_DEFAULT 0x00000000 2259 #define mmCP_RB2_CNTL_DEFAULT 0x00a00000 2260 #define mmCP_RB2_RPTR_ADDR_DEFAULT 0x00000000 2261 #define mmCP_RB2_RPTR_ADDR_HI_DEFAULT 0x00000000 2262 #define mmCP_INT_CNTL_RING0_DEFAULT 0x00000000 2263 #define mmCP_INT_CNTL_RING1_DEFAULT 0x00000000 2264 #define mmCP_INT_CNTL_RING2_DEFAULT 0x00000000 2265 #define mmCP_INT_STATUS_RING0_DEFAULT 0x00000000 2266 #define mmCP_INT_STATUS_RING1_DEFAULT 0x00000000 2267 #define mmCP_INT_STATUS_RING2_DEFAULT 0x00000000 2268 #define mmCP_ME_F32_INTERRUPT_DEFAULT 0x00000000 2269 #define mmCP_PFP_F32_INTERRUPT_DEFAULT 0x00000000 2270 #define mmCP_CE_F32_INTERRUPT_DEFAULT 0x00000000 2271 #define mmCP_MEC1_F32_INTERRUPT_DEFAULT 0x00000000 2272 #define mmCP_MEC2_F32_INTERRUPT_DEFAULT 0x00000000 2273 #define mmCP_PWR_CNTL_DEFAULT 0x00000000 2274 #define mmCP_MEM_SLP_CNTL_DEFAULT 0x00020200 2275 #define mmCP_ECC_FIRSTOCCURRENCE_DEFAULT 0x00000000 2276 #define mmCP_ECC_FIRSTOCCURRENCE_RING0_DEFAULT 0x00000000 2277 #define mmCP_ECC_FIRSTOCCURRENCE_RING1_DEFAULT 0x00000000 2278 #define mmCP_ECC_FIRSTOCCURRENCE_RING2_DEFAULT 0x00000000 2279 #define mmGB_EDC_MODE_DEFAULT 0x00000000 2280 #define mmCP_PQ_WPTR_POLL_CNTL_DEFAULT 0x00000001 2281 #define mmCP_PQ_WPTR_POLL_CNTL1_DEFAULT 0x00000000 2282 #define mmCP_ME1_PIPE0_INT_CNTL_DEFAULT 0x00000000 2283 #define mmCP_ME1_PIPE1_INT_CNTL_DEFAULT 0x00000000 2284 #define mmCP_ME1_PIPE2_INT_CNTL_DEFAULT 0x00000000 2285 #define mmCP_ME1_PIPE3_INT_CNTL_DEFAULT 0x00000000 2286 #define mmCP_ME2_PIPE0_INT_CNTL_DEFAULT 0x00000000 2287 #define mmCP_ME2_PIPE1_INT_CNTL_DEFAULT 0x00000000 2288 #define mmCP_ME2_PIPE2_INT_CNTL_DEFAULT 0x00000000 2289 #define mmCP_ME2_PIPE3_INT_CNTL_DEFAULT 0x00000000 2290 #define mmCP_ME1_PIPE0_INT_STATUS_DEFAULT 0x00000000 2291 #define mmCP_ME1_PIPE1_INT_STATUS_DEFAULT 0x00000000 2292 #define mmCP_ME1_PIPE2_INT_STATUS_DEFAULT 0x00000000 2293 #define mmCP_ME1_PIPE3_INT_STATUS_DEFAULT 0x00000000 2294 #define mmCP_ME2_PIPE0_INT_STATUS_DEFAULT 0x00000000 2295 #define mmCP_ME2_PIPE1_INT_STATUS_DEFAULT 0x00000000 2296 #define mmCP_ME2_PIPE2_INT_STATUS_DEFAULT 0x00000000 2297 #define mmCP_ME2_PIPE3_INT_STATUS_DEFAULT 0x00000000 2298 #define mmCP_GFX_QUEUE_INDEX_DEFAULT 0x00000000 2299 #define mmCC_GC_EDC_CONFIG_DEFAULT 0x00000000 2300 #define mmCP_ME1_PIPE_PRIORITY_CNTS_DEFAULT 0x08081020 2301 #define mmCP_ME1_PIPE0_PRIORITY_DEFAULT 0x00000002 2302 #define mmCP_ME1_PIPE1_PRIORITY_DEFAULT 0x00000002 2303 #define mmCP_ME1_PIPE2_PRIORITY_DEFAULT 0x00000002 2304 #define mmCP_ME1_PIPE3_PRIORITY_DEFAULT 0x00000002 2305 #define mmCP_ME2_PIPE_PRIORITY_CNTS_DEFAULT 0x08081020 2306 #define mmCP_ME2_PIPE0_PRIORITY_DEFAULT 0x00000002 2307 #define mmCP_ME2_PIPE1_PRIORITY_DEFAULT 0x00000002 2308 #define mmCP_ME2_PIPE2_PRIORITY_DEFAULT 0x00000002 2309 #define mmCP_ME2_PIPE3_PRIORITY_DEFAULT 0x00000002 2310 #define mmCP_CE_PRGRM_CNTR_START_DEFAULT 0x00000000 2311 #define mmCP_PFP_PRGRM_CNTR_START_DEFAULT 0x00000000 2312 #define mmCP_ME_PRGRM_CNTR_START_DEFAULT 0x00000000 2313 #define mmCP_MEC1_PRGRM_CNTR_START_DEFAULT 0x00000000 2314 #define mmCP_MEC2_PRGRM_CNTR_START_DEFAULT 0x00000000 2315 #define mmCP_CE_INTR_ROUTINE_START_DEFAULT 0x00000002 2316 #define mmCP_PFP_INTR_ROUTINE_START_DEFAULT 0x00000002 2317 #define mmCP_ME_INTR_ROUTINE_START_DEFAULT 0x00000002 2318 #define mmCP_MEC1_INTR_ROUTINE_START_DEFAULT 0x00000002 2319 #define mmCP_MEC2_INTR_ROUTINE_START_DEFAULT 0x00000002 2320 #define mmCP_CONTEXT_CNTL_DEFAULT 0x00750075 2321 #define mmCP_MAX_CONTEXT_DEFAULT 0x00000007 2322 #define mmCP_IQ_WAIT_TIME1_DEFAULT 0x40404040 2323 #define mmCP_IQ_WAIT_TIME2_DEFAULT 0x40404040 2324 #define mmCP_RB0_BASE_HI_DEFAULT 0x00000000 2325 #define mmCP_RB1_BASE_HI_DEFAULT 0x00000000 2326 #define mmCP_VMID_RESET_DEFAULT 0x00000000 2327 #define mmCPC_INT_CNTL_DEFAULT 0x00000000 2328 #define mmCPC_INT_STATUS_DEFAULT 0x00000000 2329 #define mmCP_VMID_PREEMPT_DEFAULT 0x00000000 2330 #define mmCPC_INT_CNTX_ID_DEFAULT 0x00000000 2331 #define mmCP_PQ_STATUS_DEFAULT 0x00000000 2332 #define mmCP_MEC1_F32_INT_DIS_DEFAULT 0x00000000 2333 #define mmCP_MEC2_F32_INT_DIS_DEFAULT 0x00000000 2334 #define mmCP_VMID_STATUS_DEFAULT 0x00000000 2335 #define mmCPC_SUSPEND_CTX_SAVE_BASE_ADDR_LO_DEFAULT 0x00000000 2336 #define mmCPC_SUSPEND_CTX_SAVE_BASE_ADDR_HI_DEFAULT 0x00000000 2337 #define mmCPC_SUSPEND_CTX_SAVE_CONTROL_DEFAULT 0x00000000 2338 #define mmCPC_SUSPEND_CNTL_STACK_OFFSET_DEFAULT 0x00000000 2339 #define mmCPC_SUSPEND_CNTL_STACK_SIZE_DEFAULT 0x00000000 2340 #define mmCPC_SUSPEND_WG_STATE_OFFSET_DEFAULT 0x00000000 2341 #define mmCPC_SUSPEND_CTX_SAVE_SIZE_DEFAULT 0x00000000 2342 #define mmCPC_OS_PIPES_DEFAULT 0x00000000 2343 #define mmCP_SUSPEND_RESUME_REQ_DEFAULT 0x00000000 2344 #define mmCP_SUSPEND_CNTL_DEFAULT 0x00000002 2345 #define mmCP_IQ_WAIT_TIME3_DEFAULT 0x00000040 2346 #define mmCPC_DDID_BASE_ADDR_LO_DEFAULT 0x00000000 2347 #define mmCP_DDID_BASE_ADDR_LO_DEFAULT 0x00000000 2348 #define mmCPC_DDID_BASE_ADDR_HI_DEFAULT 0x00000000 2349 #define mmCP_DDID_BASE_ADDR_HI_DEFAULT 0x00000000 2350 #define mmCPC_DDID_CNTL_DEFAULT 0x00000080 2351 #define mmCP_DDID_CNTL_DEFAULT 0x00000080 2352 #define mmCP_GFX_DDID_INFLIGHT_COUNT_DEFAULT 0x00000000 2353 #define mmCP_GFX_DDID_WPTR_DEFAULT 0x00000000 2354 #define mmCP_GFX_DDID_RPTR_DEFAULT 0x00000000 2355 #define mmCP_GFX_DDID_DELTA_RPT_COUNT_DEFAULT 0x00000000 2356 #define mmCP_GFX_HPD_STATUS0_DEFAULT 0x01000000 2357 #define mmCP_GFX_HPD_CONTROL0_DEFAULT 0x00000000 2358 #define mmCP_GFX_HPD_OSPRE_FENCE_ADDR_LO_DEFAULT 0x00000000 2359 #define mmCP_GFX_HPD_OSPRE_FENCE_ADDR_HI_DEFAULT 0x00000000 2360 #define mmCP_GFX_HPD_OSPRE_FENCE_DATA_LO_DEFAULT 0x00000000 2361 #define mmCP_GFX_HPD_OSPRE_FENCE_DATA_HI_DEFAULT 0x00000000 2362 #define mmCP_GFX_INDEX_MUTEX_DEFAULT 0x00000000 2363 #define mmCP_GFX_MQD_BASE_ADDR_DEFAULT 0x00000000 2364 #define mmCP_GFX_MQD_BASE_ADDR_HI_DEFAULT 0x00000000 2365 #define mmCP_GFX_HQD_ACTIVE_DEFAULT 0x00000000 2366 #define mmCP_GFX_HQD_VMID_DEFAULT 0x00000000 2367 #define mmCP_GFX_HQD_QUEUE_PRIORITY_DEFAULT 0x00000000 2368 #define mmCP_GFX_HQD_QUANTUM_DEFAULT 0x00000a01 2369 #define mmCP_GFX_HQD_BASE_DEFAULT 0x00000000 2370 #define mmCP_GFX_HQD_BASE_HI_DEFAULT 0x00000000 2371 #define mmCP_GFX_HQD_RPTR_DEFAULT 0x00000000 2372 #define mmCP_GFX_HQD_RPTR_ADDR_DEFAULT 0x00000000 2373 #define mmCP_GFX_HQD_RPTR_ADDR_HI_DEFAULT 0x00000000 2374 #define mmCP_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 2375 #define mmCP_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 2376 #define mmCP_RB_DOORBELL_CONTROL_DEFAULT 0x00000000 2377 #define mmCP_GFX_HQD_OFFSET_DEFAULT 0x00000000 2378 #define mmCP_GFX_HQD_CNTL_DEFAULT 0x00a00000 2379 #define mmCP_GFX_HQD_CSMD_RPTR_DEFAULT 0x00000000 2380 #define mmCP_GFX_HQD_WPTR_DEFAULT 0x00000000 2381 #define mmCP_GFX_HQD_WPTR_HI_DEFAULT 0x00000000 2382 #define mmCP_GFX_HQD_DEQUEUE_REQUEST_DEFAULT 0x00000000 2383 #define mmCP_GFX_HQD_MAPPED_DEFAULT 0x00000000 2384 #define mmCP_GFX_HQD_QUE_MGR_CONTROL_DEFAULT 0x00000000 2385 #define mmCP_GFX_HQD_HQ_STATUS0_DEFAULT 0x40000000 2386 #define mmCP_GFX_HQD_HQ_CONTROL0_DEFAULT 0x00000000 2387 #define mmCP_GFX_MQD_CONTROL_DEFAULT 0x00000100 2388 #define mmCP_HQD_GFX_CONTROL_DEFAULT 0x00000000 2389 #define mmCP_HQD_GFX_STATUS_DEFAULT 0x00000000 2390 #define mmCP_GFX_HQD_CE_RPTR_WR_DEFAULT 0x00000000 2391 #define mmCP_GFX_HQD_CE_BASE_DEFAULT 0x00000000 2392 #define mmCP_GFX_HQD_CE_BASE_HI_DEFAULT 0x00000000 2393 #define mmCP_GFX_HQD_CE_RPTR_DEFAULT 0x00000000 2394 #define mmCP_GFX_HQD_CE_RPTR_ADDR_DEFAULT 0x00000000 2395 #define mmCP_GFX_HQD_CE_RPTR_ADDR_HI_DEFAULT 0x00000000 2396 #define mmCP_GFX_HQD_CE_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 2397 #define mmCP_GFX_HQD_CE_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 2398 #define mmCP_GFX_HQD_CE_OFFSET_DEFAULT 0x00000000 2399 #define mmCP_GFX_HQD_CE_CNTL_DEFAULT 0x08a00000 2400 #define mmCP_GFX_HQD_CE_CSMD_RPTR_DEFAULT 0x00000000 2401 #define mmCP_GFX_HQD_CE_WPTR_DEFAULT 0x00000000 2402 #define mmCP_GFX_HQD_CE_WPTR_HI_DEFAULT 0x00000000 2403 #define mmCP_CE_DOORBELL_CONTROL_DEFAULT 0x00000000 2404 #define mmCP_DMA_WATCH0_ADDR_LO_DEFAULT 0x00000000 2405 #define mmCP_DMA_WATCH0_ADDR_HI_DEFAULT 0x00000000 2406 #define mmCP_DMA_WATCH0_MASK_DEFAULT 0x00000000 2407 #define mmCP_DMA_WATCH0_CNTL_DEFAULT 0x00000000 2408 #define mmCP_DMA_WATCH1_ADDR_LO_DEFAULT 0x00000000 2409 #define mmCP_DMA_WATCH1_ADDR_HI_DEFAULT 0x00000000 2410 #define mmCP_DMA_WATCH1_MASK_DEFAULT 0x00000000 2411 #define mmCP_DMA_WATCH1_CNTL_DEFAULT 0x00000000 2412 #define mmCP_DMA_WATCH2_ADDR_LO_DEFAULT 0x00000000 2413 #define mmCP_DMA_WATCH2_ADDR_HI_DEFAULT 0x00000000 2414 #define mmCP_DMA_WATCH2_MASK_DEFAULT 0x00000000 2415 #define mmCP_DMA_WATCH2_CNTL_DEFAULT 0x00000000 2416 #define mmCP_DMA_WATCH3_ADDR_LO_DEFAULT 0x00000000 2417 #define mmCP_DMA_WATCH3_ADDR_HI_DEFAULT 0x00000000 2418 #define mmCP_DMA_WATCH3_MASK_DEFAULT 0x00000000 2419 #define mmCP_DMA_WATCH3_CNTL_DEFAULT 0x00000000 2420 #define mmCP_DMA_WATCH_STAT_ADDR_LO_DEFAULT 0x00000000 2421 #define mmCP_DMA_WATCH_STAT_ADDR_HI_DEFAULT 0x00000000 2422 #define mmCP_DMA_WATCH_STAT_DEFAULT 0x00000000 2423 #define mmCP_PFP_JT_STAT_DEFAULT 0x00000000 2424 #define mmCP_CE_JT_STAT_DEFAULT 0x00000000 2425 #define mmCP_MEC_JT_STAT_DEFAULT 0x00000000 2426 #define mmCP_FETCHER_SOURCE_DEFAULT 0x00000000 2427 #define mmCP_CE_CS_PARTITION_INDEX_DEFAULT 0x00000000 2428 #define mmCP_RB_DOORBELL_CLEAR_DEFAULT 0x00000000 2429 #define mmCP_RB0_ACTIVE_DEFAULT 0x00000000 2430 #define mmCP_RB_ACTIVE_DEFAULT 0x00000000 2431 #define mmCP_RB1_ACTIVE_DEFAULT 0x00000000 2432 #define mmCP_RB_STATUS_DEFAULT 0x00000000 2433 #define mmCPG_RCIU_CAM_INDEX_DEFAULT 0x00000000 2434 #define mmCPG_RCIU_CAM_DATA_DEFAULT 0x00000000 2435 #define mmCPG_RCIU_CAM_DATA_PHASE0_DEFAULT 0x00000000 2436 #define mmCPG_RCIU_CAM_DATA_PHASE1_DEFAULT 0x00000000 2437 #define mmCPG_RCIU_CAM_DATA_PHASE2_DEFAULT 0x00000000 2438 #define mmCP_GPU_TIMESTAMP_OFFSET_LO_DEFAULT 0x00000000 2439 #define mmCP_GPU_TIMESTAMP_OFFSET_HI_DEFAULT 0x00000000 2440 #define mmCPF_GCR_CNTL_DEFAULT 0x0001c7f0 2441 #define mmCPG_UTCL1_STATUS_DEFAULT 0x00000000 2442 #define mmCPC_UTCL1_STATUS_DEFAULT 0x00000000 2443 #define mmCPF_UTCL1_STATUS_DEFAULT 0x00000000 2444 #define mmCP_SD_CNTL_DEFAULT 0x0000047f 2445 #define mmCP_SOFT_RESET_CNTL_DEFAULT 0x00000000 2446 #define mmCP_CPC_GFX_CNTL_DEFAULT 0x00000000 2447 2448 2449 // addressBlock: gc_spipdec 2450 #define mmSPI_ARB_PRIORITY_DEFAULT 0x00000000 2451 #define mmSPI_ARB_CYCLES_0_DEFAULT 0x00000000 2452 #define mmSPI_ARB_CYCLES_1_DEFAULT 0x00000000 2453 #define mmSPI_WCL_PIPE_PERCENT_GFX_DEFAULT 0x07c1f07f 2454 #define mmSPI_WCL_PIPE_PERCENT_HP3D_DEFAULT 0x07c1f07f 2455 #define mmSPI_WCL_PIPE_PERCENT_CS0_DEFAULT 0x0000007f 2456 #define mmSPI_WCL_PIPE_PERCENT_CS1_DEFAULT 0x0000007f 2457 #define mmSPI_WCL_PIPE_PERCENT_CS2_DEFAULT 0x0000007f 2458 #define mmSPI_WCL_PIPE_PERCENT_CS3_DEFAULT 0x0000007f 2459 #define mmSPI_COMPUTE_QUEUE_RESET_DEFAULT 0x00000000 2460 #define mmSPI_RESOURCE_RESERVE_CU_0_DEFAULT 0x00000000 2461 #define mmSPI_RESOURCE_RESERVE_CU_1_DEFAULT 0x00000000 2462 #define mmSPI_RESOURCE_RESERVE_CU_2_DEFAULT 0x00000000 2463 #define mmSPI_RESOURCE_RESERVE_CU_3_DEFAULT 0x00000000 2464 #define mmSPI_RESOURCE_RESERVE_CU_4_DEFAULT 0x00000000 2465 #define mmSPI_RESOURCE_RESERVE_CU_5_DEFAULT 0x00000000 2466 #define mmSPI_RESOURCE_RESERVE_CU_6_DEFAULT 0x00000000 2467 #define mmSPI_RESOURCE_RESERVE_CU_7_DEFAULT 0x00000000 2468 #define mmSPI_RESOURCE_RESERVE_CU_8_DEFAULT 0x00000000 2469 #define mmSPI_RESOURCE_RESERVE_CU_9_DEFAULT 0x00000000 2470 #define mmSPI_RESOURCE_RESERVE_EN_CU_0_DEFAULT 0x00000000 2471 #define mmSPI_RESOURCE_RESERVE_EN_CU_1_DEFAULT 0x00000000 2472 #define mmSPI_RESOURCE_RESERVE_EN_CU_2_DEFAULT 0x00000000 2473 #define mmSPI_RESOURCE_RESERVE_EN_CU_3_DEFAULT 0x00000000 2474 #define mmSPI_RESOURCE_RESERVE_EN_CU_4_DEFAULT 0x00000000 2475 #define mmSPI_RESOURCE_RESERVE_EN_CU_5_DEFAULT 0x00000000 2476 #define mmSPI_RESOURCE_RESERVE_EN_CU_6_DEFAULT 0x00000000 2477 #define mmSPI_RESOURCE_RESERVE_EN_CU_7_DEFAULT 0x00000000 2478 #define mmSPI_RESOURCE_RESERVE_EN_CU_8_DEFAULT 0x00000000 2479 #define mmSPI_RESOURCE_RESERVE_EN_CU_9_DEFAULT 0x00000000 2480 #define mmSPI_COMPUTE_WF_CTX_SAVE_DEFAULT 0x00000000 2481 #define mmSPI_ARB_CNTL_0_DEFAULT 0x00000000 2482 #define mmSPI_FEATURE_CTRL_DEFAULT 0x00000000 2483 #define mmSPI_SHADER_RSRC_LIMIT_CTRL_DEFAULT 0x00000000 2484 2485 2486 // addressBlock: gc_cpphqddec 2487 #define mmCP_HPD_MES_ROQ_OFFSETS_DEFAULT 0x00400000 2488 #define mmCP_HPD_ROQ_OFFSETS_DEFAULT 0x00200604 2489 #define mmCP_HPD_STATUS0_DEFAULT 0x01000000 2490 #define mmCP_HPD_UTCL1_CNTL_DEFAULT 0x00000000 2491 #define mmCP_HPD_UTCL1_ERROR_DEFAULT 0x00000000 2492 #define mmCP_HPD_UTCL1_ERROR_ADDR_DEFAULT 0x00000000 2493 #define mmCP_MQD_BASE_ADDR_DEFAULT 0x00000000 2494 #define mmCP_MQD_BASE_ADDR_HI_DEFAULT 0x00000000 2495 #define mmCP_HQD_ACTIVE_DEFAULT 0x00000000 2496 #define mmCP_HQD_VMID_DEFAULT 0x00000000 2497 #define mmCP_HQD_PERSISTENT_STATE_DEFAULT 0x0be05301 2498 #define mmCP_HQD_PIPE_PRIORITY_DEFAULT 0x00000000 2499 #define mmCP_HQD_QUEUE_PRIORITY_DEFAULT 0x00000000 2500 #define mmCP_HQD_QUANTUM_DEFAULT 0x00000000 2501 #define mmCP_HQD_PQ_BASE_DEFAULT 0x00000000 2502 #define mmCP_HQD_PQ_BASE_HI_DEFAULT 0x00000000 2503 #define mmCP_HQD_PQ_RPTR_DEFAULT 0x00000000 2504 #define mmCP_HQD_PQ_RPTR_REPORT_ADDR_DEFAULT 0x00000000 2505 #define mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI_DEFAULT 0x00000000 2506 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_DEFAULT 0x00000000 2507 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 2508 #define mmCP_HQD_PQ_DOORBELL_CONTROL_DEFAULT 0x00000000 2509 #define mmCP_HQD_PQ_CONTROL_DEFAULT 0x00308509 2510 #define mmCP_HQD_IB_BASE_ADDR_DEFAULT 0x00000000 2511 #define mmCP_HQD_IB_BASE_ADDR_HI_DEFAULT 0x00000000 2512 #define mmCP_HQD_IB_RPTR_DEFAULT 0x00000000 2513 #define mmCP_HQD_IB_CONTROL_DEFAULT 0x00300000 2514 #define mmCP_HQD_IQ_TIMER_DEFAULT 0x00000000 2515 #define mmCP_HQD_IQ_RPTR_DEFAULT 0x00000000 2516 #define mmCP_HQD_DEQUEUE_REQUEST_DEFAULT 0x00000000 2517 #define mmCP_HQD_DMA_OFFLOAD_DEFAULT 0x00000000 2518 #define mmCP_HQD_OFFLOAD_DEFAULT 0x00000000 2519 #define mmCP_HQD_SEMA_CMD_DEFAULT 0x00000000 2520 #define mmCP_HQD_MSG_TYPE_DEFAULT 0x00000000 2521 #define mmCP_HQD_ATOMIC0_PREOP_LO_DEFAULT 0x00000000 2522 #define mmCP_HQD_ATOMIC0_PREOP_HI_DEFAULT 0x00000000 2523 #define mmCP_HQD_ATOMIC1_PREOP_LO_DEFAULT 0x00000000 2524 #define mmCP_HQD_ATOMIC1_PREOP_HI_DEFAULT 0x00000000 2525 #define mmCP_HQD_HQ_SCHEDULER0_DEFAULT 0x00000000 2526 #define mmCP_HQD_HQ_STATUS0_DEFAULT 0x40000000 2527 #define mmCP_HQD_HQ_CONTROL0_DEFAULT 0x00000000 2528 #define mmCP_HQD_HQ_SCHEDULER1_DEFAULT 0x00000000 2529 #define mmCP_MQD_CONTROL_DEFAULT 0x00000100 2530 #define mmCP_HQD_HQ_STATUS1_DEFAULT 0x00000000 2531 #define mmCP_HQD_HQ_CONTROL1_DEFAULT 0x00000000 2532 #define mmCP_HQD_EOP_BASE_ADDR_DEFAULT 0x00000000 2533 #define mmCP_HQD_EOP_BASE_ADDR_HI_DEFAULT 0x00000000 2534 #define mmCP_HQD_EOP_CONTROL_DEFAULT 0x00000006 2535 #define mmCP_HQD_EOP_RPTR_DEFAULT 0x40000000 2536 #define mmCP_HQD_EOP_WPTR_DEFAULT 0x007f8000 2537 #define mmCP_HQD_EOP_EVENTS_DEFAULT 0x00000000 2538 #define mmCP_HQD_CTX_SAVE_BASE_ADDR_LO_DEFAULT 0x00000000 2539 #define mmCP_HQD_CTX_SAVE_BASE_ADDR_HI_DEFAULT 0x00000000 2540 #define mmCP_HQD_CTX_SAVE_CONTROL_DEFAULT 0x00000000 2541 #define mmCP_HQD_CNTL_STACK_OFFSET_DEFAULT 0x00000000 2542 #define mmCP_HQD_CNTL_STACK_SIZE_DEFAULT 0x00000000 2543 #define mmCP_HQD_WG_STATE_OFFSET_DEFAULT 0x00000000 2544 #define mmCP_HQD_CTX_SAVE_SIZE_DEFAULT 0x00000000 2545 #define mmCP_HQD_GDS_RESOURCE_STATE_DEFAULT 0x00000000 2546 #define mmCP_HQD_ERROR_DEFAULT 0x00000000 2547 #define mmCP_HQD_EOP_WPTR_MEM_DEFAULT 0x00000000 2548 #define mmCP_HQD_AQL_CONTROL_DEFAULT 0x00000000 2549 #define mmCP_HQD_PQ_WPTR_LO_DEFAULT 0x00000000 2550 #define mmCP_HQD_PQ_WPTR_HI_DEFAULT 0x00000000 2551 #define mmCP_HQD_SUSPEND_CNTL_STACK_OFFSET_DEFAULT 0x00000000 2552 #define mmCP_HQD_SUSPEND_CNTL_STACK_DW_CNT_DEFAULT 0x00000000 2553 #define mmCP_HQD_SUSPEND_WG_STATE_OFFSET_DEFAULT 0x00000000 2554 #define mmCP_HQD_DDID_RPTR_DEFAULT 0x00000000 2555 #define mmCP_HQD_DDID_WPTR_DEFAULT 0x00000000 2556 #define mmCP_HQD_DDID_INFLIGHT_COUNT_DEFAULT 0x00000000 2557 #define mmCP_HQD_DDID_DELTA_RPT_COUNT_DEFAULT 0x00000000 2558 #define mmCP_HQD_DEQUEUE_STATUS_DEFAULT 0x00000000 2559 2560 2561 // addressBlock: gc_didtdec 2562 #define mmDIDT_IND_INDEX_DEFAULT 0x00000000 2563 #define mmDIDT_IND_DATA_DEFAULT 0x00000000 2564 #define mmDIDT_INDEX_AUTO_INCR_EN_DEFAULT 0x00000000 2565 2566 2567 // addressBlock: gc_gccacdec 2568 #define mmGC_CAC_CTRL_1_DEFAULT 0x01000100 2569 #define mmGC_CAC_CTRL_2_DEFAULT 0x00000000 2570 #define mmGC_CAC_AGGR_LOWER_DEFAULT 0x00000000 2571 #define mmGC_CAC_AGGR_UPPER_DEFAULT 0x00000000 2572 #define mmGC_CAC_SOFT_CTRL_DEFAULT 0x00000000 2573 #define mmGC_EDC_CTRL_DEFAULT 0x00003c00 2574 #define mmGC_EDC_THRESHOLD_DEFAULT 0x00000000 2575 #define mmGC_EDC_STATUS_DEFAULT 0x00000000 2576 #define mmGC_EDC_OVERFLOW_DEFAULT 0x00000000 2577 #define mmGC_EDC_ROLLING_POWER_DELTA_DEFAULT 0x00000000 2578 #define mmGC_THROTTLE_CTRL_DEFAULT 0x00002040 2579 #define mmGC_THROTTLE_CTRL1_DEFAULT 0x00cc0660 2580 #define mmGC_THROTTLE_STATUS_DEFAULT 0x00000000 2581 #define mmEDC_PERF_COUNTER_DEFAULT 0x00000000 2582 #define mmPCC_PERF_COUNTER_DEFAULT 0x00000000 2583 #define mmPWRBRK_PERF_COUNTER_DEFAULT 0x00000000 2584 #define mmGC_EDC_STRETCH_CTRL_DEFAULT 0x00000000 2585 #define mmGC_EDC_STRETCH_THRESHOLD_DEFAULT 0x00000000 2586 #define mmEDC_HYSTERESIS_CNTL_DEFAULT 0x00000001 2587 #define mmEDC_HYSTERESIS_STAT_DEFAULT 0x00000000 2588 #define mmGC_CAC_IND_INDEX_DEFAULT 0x00000000 2589 #define mmGC_CAC_IND_DATA_DEFAULT 0x00000000 2590 #define mmSE_CAC_IND_INDEX_DEFAULT 0x00000000 2591 #define mmSE_CAC_IND_DATA_DEFAULT 0x00000000 2592 2593 2594 // addressBlock: gc_tcpdec 2595 #define mmTCP_WATCH0_ADDR_H_DEFAULT 0x00000000 2596 #define mmTCP_WATCH0_ADDR_L_DEFAULT 0x00000000 2597 #define mmTCP_WATCH0_CNTL_DEFAULT 0x00000000 2598 #define mmTCP_WATCH1_ADDR_H_DEFAULT 0x00000000 2599 #define mmTCP_WATCH1_ADDR_L_DEFAULT 0x00000000 2600 #define mmTCP_WATCH1_CNTL_DEFAULT 0x00000000 2601 #define mmTCP_WATCH2_ADDR_H_DEFAULT 0x00000000 2602 #define mmTCP_WATCH2_ADDR_L_DEFAULT 0x00000000 2603 #define mmTCP_WATCH2_CNTL_DEFAULT 0x00000000 2604 #define mmTCP_WATCH3_ADDR_H_DEFAULT 0x00000000 2605 #define mmTCP_WATCH3_ADDR_L_DEFAULT 0x00000000 2606 #define mmTCP_WATCH3_CNTL_DEFAULT 0x00000000 2607 #define mmTCP_PERFCOUNTER_FILTER_DEFAULT 0x00000000 2608 #define mmTCP_PERFCOUNTER_FILTER_EN_DEFAULT 0x00000000 2609 #define mmTCP_PERFCOUNTER_FILTER2_DEFAULT 0x00000000 2610 2611 2612 // addressBlock: gc_gdspdec 2613 #define mmGDS_VMID0_BASE_DEFAULT 0x00000000 2614 #define mmGDS_VMID0_SIZE_DEFAULT 0x00010000 2615 #define mmGDS_VMID1_BASE_DEFAULT 0x00000000 2616 #define mmGDS_VMID1_SIZE_DEFAULT 0x00010000 2617 #define mmGDS_VMID2_BASE_DEFAULT 0x00000000 2618 #define mmGDS_VMID2_SIZE_DEFAULT 0x00010000 2619 #define mmGDS_VMID3_BASE_DEFAULT 0x00000000 2620 #define mmGDS_VMID3_SIZE_DEFAULT 0x00010000 2621 #define mmGDS_VMID4_BASE_DEFAULT 0x00000000 2622 #define mmGDS_VMID4_SIZE_DEFAULT 0x00010000 2623 #define mmGDS_VMID5_BASE_DEFAULT 0x00000000 2624 #define mmGDS_VMID5_SIZE_DEFAULT 0x00010000 2625 #define mmGDS_VMID6_BASE_DEFAULT 0x00000000 2626 #define mmGDS_VMID6_SIZE_DEFAULT 0x00010000 2627 #define mmGDS_VMID7_BASE_DEFAULT 0x00000000 2628 #define mmGDS_VMID7_SIZE_DEFAULT 0x00010000 2629 #define mmGDS_VMID8_BASE_DEFAULT 0x00000000 2630 #define mmGDS_VMID8_SIZE_DEFAULT 0x00010000 2631 #define mmGDS_VMID9_BASE_DEFAULT 0x00000000 2632 #define mmGDS_VMID9_SIZE_DEFAULT 0x00010000 2633 #define mmGDS_VMID10_BASE_DEFAULT 0x00000000 2634 #define mmGDS_VMID10_SIZE_DEFAULT 0x00010000 2635 #define mmGDS_VMID11_BASE_DEFAULT 0x00000000 2636 #define mmGDS_VMID11_SIZE_DEFAULT 0x00010000 2637 #define mmGDS_VMID12_BASE_DEFAULT 0x00000000 2638 #define mmGDS_VMID12_SIZE_DEFAULT 0x00010000 2639 #define mmGDS_VMID13_BASE_DEFAULT 0x00000000 2640 #define mmGDS_VMID13_SIZE_DEFAULT 0x00010000 2641 #define mmGDS_VMID14_BASE_DEFAULT 0x00000000 2642 #define mmGDS_VMID14_SIZE_DEFAULT 0x00010000 2643 #define mmGDS_VMID15_BASE_DEFAULT 0x00000000 2644 #define mmGDS_VMID15_SIZE_DEFAULT 0x00010000 2645 #define mmGDS_GWS_VMID0_DEFAULT 0x00400000 2646 #define mmGDS_GWS_VMID1_DEFAULT 0x00400000 2647 #define mmGDS_GWS_VMID2_DEFAULT 0x00400000 2648 #define mmGDS_GWS_VMID3_DEFAULT 0x00400000 2649 #define mmGDS_GWS_VMID4_DEFAULT 0x00400000 2650 #define mmGDS_GWS_VMID5_DEFAULT 0x00400000 2651 #define mmGDS_GWS_VMID6_DEFAULT 0x00400000 2652 #define mmGDS_GWS_VMID7_DEFAULT 0x00400000 2653 #define mmGDS_GWS_VMID8_DEFAULT 0x00400000 2654 #define mmGDS_GWS_VMID9_DEFAULT 0x00400000 2655 #define mmGDS_GWS_VMID10_DEFAULT 0x00400000 2656 #define mmGDS_GWS_VMID11_DEFAULT 0x00400000 2657 #define mmGDS_GWS_VMID12_DEFAULT 0x00400000 2658 #define mmGDS_GWS_VMID13_DEFAULT 0x00400000 2659 #define mmGDS_GWS_VMID14_DEFAULT 0x00400000 2660 #define mmGDS_GWS_VMID15_DEFAULT 0x00400000 2661 #define mmGDS_OA_VMID0_DEFAULT 0x00000000 2662 #define mmGDS_OA_VMID1_DEFAULT 0x00000000 2663 #define mmGDS_OA_VMID2_DEFAULT 0x00000000 2664 #define mmGDS_OA_VMID3_DEFAULT 0x00000000 2665 #define mmGDS_OA_VMID4_DEFAULT 0x00000000 2666 #define mmGDS_OA_VMID5_DEFAULT 0x00000000 2667 #define mmGDS_OA_VMID6_DEFAULT 0x00000000 2668 #define mmGDS_OA_VMID7_DEFAULT 0x00000000 2669 #define mmGDS_OA_VMID8_DEFAULT 0x00000000 2670 #define mmGDS_OA_VMID9_DEFAULT 0x00000000 2671 #define mmGDS_OA_VMID10_DEFAULT 0x00000000 2672 #define mmGDS_OA_VMID11_DEFAULT 0x00000000 2673 #define mmGDS_OA_VMID12_DEFAULT 0x00000000 2674 #define mmGDS_OA_VMID13_DEFAULT 0x00000000 2675 #define mmGDS_OA_VMID14_DEFAULT 0x00000000 2676 #define mmGDS_OA_VMID15_DEFAULT 0x00000000 2677 #define mmGDS_GWS_RESET0_DEFAULT 0x00000000 2678 #define mmGDS_GWS_RESET1_DEFAULT 0x00000000 2679 #define mmGDS_GWS_RESOURCE_RESET_DEFAULT 0x00000000 2680 #define mmGDS_COMPUTE_MAX_WAVE_ID_DEFAULT 0x000009ff 2681 #define mmGDS_OA_RESET_MASK_DEFAULT 0x00000000 2682 #define mmGDS_OA_RESET_DEFAULT 0x00000000 2683 #define mmGDS_ENHANCE2_DEFAULT 0x00000000 2684 #define mmGDS_OA_CGPG_RESTORE_DEFAULT 0x00000000 2685 #define mmGDS_CS_CTXSW_STATUS_DEFAULT 0x00000000 2686 #define mmGDS_CS_CTXSW_CNT0_DEFAULT 0x00000000 2687 #define mmGDS_CS_CTXSW_CNT1_DEFAULT 0x00000000 2688 #define mmGDS_CS_CTXSW_CNT2_DEFAULT 0x00000000 2689 #define mmGDS_CS_CTXSW_CNT3_DEFAULT 0x00000000 2690 #define mmGDS_GFX_CTXSW_STATUS_DEFAULT 0x00000000 2691 #define mmGDS_VS_CTXSW_CNT0_DEFAULT 0x00000000 2692 #define mmGDS_VS_CTXSW_CNT1_DEFAULT 0x00000000 2693 #define mmGDS_VS_CTXSW_CNT2_DEFAULT 0x00000000 2694 #define mmGDS_VS_CTXSW_CNT3_DEFAULT 0x00000000 2695 #define mmGDS_PS_CTXSW_CNT0_DEFAULT 0x00000000 2696 #define mmGDS_PS_CTXSW_CNT1_DEFAULT 0x00000000 2697 #define mmGDS_PS_CTXSW_CNT2_DEFAULT 0x00000000 2698 #define mmGDS_PS_CTXSW_CNT3_DEFAULT 0x00000000 2699 #define mmGDS_PS_CTXSW_IDX_DEFAULT 0x00000000 2700 #define mmGDS_GS_CTXSW_CNT0_DEFAULT 0x00000000 2701 #define mmGDS_GS_CTXSW_CNT1_DEFAULT 0x00000000 2702 #define mmGDS_GS_CTXSW_CNT2_DEFAULT 0x00000000 2703 #define mmGDS_GS_CTXSW_CNT3_DEFAULT 0x00000000 2704 #define mmGDS_MEMORY_CLEAN_DEFAULT 0x00000000 2705 2706 2707 // addressBlock: gc_gfxdec0 2708 #define mmDB_RENDER_CONTROL_DEFAULT 0x00000000 2709 #define mmDB_COUNT_CONTROL_DEFAULT 0x00000000 2710 #define mmDB_DEPTH_VIEW_DEFAULT 0x00000000 2711 #define mmDB_RENDER_OVERRIDE_DEFAULT 0x00000000 2712 #define mmDB_RENDER_OVERRIDE2_DEFAULT 0x00000000 2713 #define mmDB_HTILE_DATA_BASE_DEFAULT 0x00000000 2714 #define mmDB_DEPTH_SIZE_XY_DEFAULT 0x00000000 2715 #define mmDB_DEPTH_BOUNDS_MIN_DEFAULT 0x00000000 2716 #define mmDB_DEPTH_BOUNDS_MAX_DEFAULT 0x00000000 2717 #define mmDB_STENCIL_CLEAR_DEFAULT 0x00000000 2718 #define mmDB_DEPTH_CLEAR_DEFAULT 0x00000000 2719 #define mmPA_SC_SCREEN_SCISSOR_TL_DEFAULT 0x00000000 2720 #define mmPA_SC_SCREEN_SCISSOR_BR_DEFAULT 0x00000000 2721 #define mmDB_DFSM_CONTROL_DEFAULT 0x00000000 2722 #define mmDB_RESERVED_REG_2_DEFAULT 0x00000000 2723 #define mmDB_Z_INFO_DEFAULT 0x00000000 2724 #define mmDB_STENCIL_INFO_DEFAULT 0x00000000 2725 #define mmDB_Z_READ_BASE_DEFAULT 0x00000000 2726 #define mmDB_STENCIL_READ_BASE_DEFAULT 0x00000000 2727 #define mmDB_Z_WRITE_BASE_DEFAULT 0x00000000 2728 #define mmDB_STENCIL_WRITE_BASE_DEFAULT 0x00000000 2729 #define mmDB_RESERVED_REG_1_DEFAULT 0x00000000 2730 #define mmDB_RESERVED_REG_3_DEFAULT 0x00000000 2731 #define mmDB_VRS_OVERRIDE_CNTL_DEFAULT 0x00000000 2732 #define mmDB_Z_READ_BASE_HI_DEFAULT 0x00000000 2733 #define mmDB_STENCIL_READ_BASE_HI_DEFAULT 0x00000000 2734 #define mmDB_Z_WRITE_BASE_HI_DEFAULT 0x00000000 2735 #define mmDB_STENCIL_WRITE_BASE_HI_DEFAULT 0x00000000 2736 #define mmDB_HTILE_DATA_BASE_HI_DEFAULT 0x00000000 2737 #define mmDB_RMI_L2_CACHE_CONTROL_DEFAULT 0x00000000 2738 #define mmTA_BC_BASE_ADDR_DEFAULT 0x00000000 2739 #define mmTA_BC_BASE_ADDR_HI_DEFAULT 0x00000000 2740 #define mmCOHER_DEST_BASE_HI_0_DEFAULT 0x00000000 2741 #define mmCOHER_DEST_BASE_HI_1_DEFAULT 0x00000000 2742 #define mmCOHER_DEST_BASE_HI_2_DEFAULT 0x00000000 2743 #define mmCOHER_DEST_BASE_HI_3_DEFAULT 0x00000000 2744 #define mmCOHER_DEST_BASE_2_DEFAULT 0x00000000 2745 #define mmCOHER_DEST_BASE_3_DEFAULT 0x00000000 2746 #define mmPA_SC_WINDOW_OFFSET_DEFAULT 0x00000000 2747 #define mmPA_SC_WINDOW_SCISSOR_TL_DEFAULT 0x00000000 2748 #define mmPA_SC_WINDOW_SCISSOR_BR_DEFAULT 0x00000000 2749 #define mmPA_SC_CLIPRECT_RULE_DEFAULT 0x00000000 2750 #define mmPA_SC_CLIPRECT_0_TL_DEFAULT 0x00000000 2751 #define mmPA_SC_CLIPRECT_0_BR_DEFAULT 0x00000000 2752 #define mmPA_SC_CLIPRECT_1_TL_DEFAULT 0x00000000 2753 #define mmPA_SC_CLIPRECT_1_BR_DEFAULT 0x00000000 2754 #define mmPA_SC_CLIPRECT_2_TL_DEFAULT 0x00000000 2755 #define mmPA_SC_CLIPRECT_2_BR_DEFAULT 0x00000000 2756 #define mmPA_SC_CLIPRECT_3_TL_DEFAULT 0x00000000 2757 #define mmPA_SC_CLIPRECT_3_BR_DEFAULT 0x00000000 2758 #define mmPA_SC_EDGERULE_DEFAULT 0x00000000 2759 #define mmPA_SU_HARDWARE_SCREEN_OFFSET_DEFAULT 0x00000000 2760 #define mmCB_TARGET_MASK_DEFAULT 0x00000000 2761 #define mmCB_SHADER_MASK_DEFAULT 0x00000000 2762 #define mmPA_SC_GENERIC_SCISSOR_TL_DEFAULT 0x00000000 2763 #define mmPA_SC_GENERIC_SCISSOR_BR_DEFAULT 0x00000000 2764 #define mmCOHER_DEST_BASE_0_DEFAULT 0x00000000 2765 #define mmCOHER_DEST_BASE_1_DEFAULT 0x00000000 2766 #define mmPA_SC_VPORT_SCISSOR_0_TL_DEFAULT 0x00000000 2767 #define mmPA_SC_VPORT_SCISSOR_0_BR_DEFAULT 0x00000000 2768 #define mmPA_SC_VPORT_SCISSOR_1_TL_DEFAULT 0x00000000 2769 #define mmPA_SC_VPORT_SCISSOR_1_BR_DEFAULT 0x00000000 2770 #define mmPA_SC_VPORT_SCISSOR_2_TL_DEFAULT 0x00000000 2771 #define mmPA_SC_VPORT_SCISSOR_2_BR_DEFAULT 0x00000000 2772 #define mmPA_SC_VPORT_SCISSOR_3_TL_DEFAULT 0x00000000 2773 #define mmPA_SC_VPORT_SCISSOR_3_BR_DEFAULT 0x00000000 2774 #define mmPA_SC_VPORT_SCISSOR_4_TL_DEFAULT 0x00000000 2775 #define mmPA_SC_VPORT_SCISSOR_4_BR_DEFAULT 0x00000000 2776 #define mmPA_SC_VPORT_SCISSOR_5_TL_DEFAULT 0x00000000 2777 #define mmPA_SC_VPORT_SCISSOR_5_BR_DEFAULT 0x00000000 2778 #define mmPA_SC_VPORT_SCISSOR_6_TL_DEFAULT 0x00000000 2779 #define mmPA_SC_VPORT_SCISSOR_6_BR_DEFAULT 0x00000000 2780 #define mmPA_SC_VPORT_SCISSOR_7_TL_DEFAULT 0x00000000 2781 #define mmPA_SC_VPORT_SCISSOR_7_BR_DEFAULT 0x00000000 2782 #define mmPA_SC_VPORT_SCISSOR_8_TL_DEFAULT 0x00000000 2783 #define mmPA_SC_VPORT_SCISSOR_8_BR_DEFAULT 0x00000000 2784 #define mmPA_SC_VPORT_SCISSOR_9_TL_DEFAULT 0x00000000 2785 #define mmPA_SC_VPORT_SCISSOR_9_BR_DEFAULT 0x00000000 2786 #define mmPA_SC_VPORT_SCISSOR_10_TL_DEFAULT 0x00000000 2787 #define mmPA_SC_VPORT_SCISSOR_10_BR_DEFAULT 0x00000000 2788 #define mmPA_SC_VPORT_SCISSOR_11_TL_DEFAULT 0x00000000 2789 #define mmPA_SC_VPORT_SCISSOR_11_BR_DEFAULT 0x00000000 2790 #define mmPA_SC_VPORT_SCISSOR_12_TL_DEFAULT 0x00000000 2791 #define mmPA_SC_VPORT_SCISSOR_12_BR_DEFAULT 0x00000000 2792 #define mmPA_SC_VPORT_SCISSOR_13_TL_DEFAULT 0x00000000 2793 #define mmPA_SC_VPORT_SCISSOR_13_BR_DEFAULT 0x00000000 2794 #define mmPA_SC_VPORT_SCISSOR_14_TL_DEFAULT 0x00000000 2795 #define mmPA_SC_VPORT_SCISSOR_14_BR_DEFAULT 0x00000000 2796 #define mmPA_SC_VPORT_SCISSOR_15_TL_DEFAULT 0x00000000 2797 #define mmPA_SC_VPORT_SCISSOR_15_BR_DEFAULT 0x00000000 2798 #define mmPA_SC_VPORT_ZMIN_0_DEFAULT 0x00000000 2799 #define mmPA_SC_VPORT_ZMAX_0_DEFAULT 0x00000000 2800 #define mmPA_SC_VPORT_ZMIN_1_DEFAULT 0x00000000 2801 #define mmPA_SC_VPORT_ZMAX_1_DEFAULT 0x00000000 2802 #define mmPA_SC_VPORT_ZMIN_2_DEFAULT 0x00000000 2803 #define mmPA_SC_VPORT_ZMAX_2_DEFAULT 0x00000000 2804 #define mmPA_SC_VPORT_ZMIN_3_DEFAULT 0x00000000 2805 #define mmPA_SC_VPORT_ZMAX_3_DEFAULT 0x00000000 2806 #define mmPA_SC_VPORT_ZMIN_4_DEFAULT 0x00000000 2807 #define mmPA_SC_VPORT_ZMAX_4_DEFAULT 0x00000000 2808 #define mmPA_SC_VPORT_ZMIN_5_DEFAULT 0x00000000 2809 #define mmPA_SC_VPORT_ZMAX_5_DEFAULT 0x00000000 2810 #define mmPA_SC_VPORT_ZMIN_6_DEFAULT 0x00000000 2811 #define mmPA_SC_VPORT_ZMAX_6_DEFAULT 0x00000000 2812 #define mmPA_SC_VPORT_ZMIN_7_DEFAULT 0x00000000 2813 #define mmPA_SC_VPORT_ZMAX_7_DEFAULT 0x00000000 2814 #define mmPA_SC_VPORT_ZMIN_8_DEFAULT 0x00000000 2815 #define mmPA_SC_VPORT_ZMAX_8_DEFAULT 0x00000000 2816 #define mmPA_SC_VPORT_ZMIN_9_DEFAULT 0x00000000 2817 #define mmPA_SC_VPORT_ZMAX_9_DEFAULT 0x00000000 2818 #define mmPA_SC_VPORT_ZMIN_10_DEFAULT 0x00000000 2819 #define mmPA_SC_VPORT_ZMAX_10_DEFAULT 0x00000000 2820 #define mmPA_SC_VPORT_ZMIN_11_DEFAULT 0x00000000 2821 #define mmPA_SC_VPORT_ZMAX_11_DEFAULT 0x00000000 2822 #define mmPA_SC_VPORT_ZMIN_12_DEFAULT 0x00000000 2823 #define mmPA_SC_VPORT_ZMAX_12_DEFAULT 0x00000000 2824 #define mmPA_SC_VPORT_ZMIN_13_DEFAULT 0x00000000 2825 #define mmPA_SC_VPORT_ZMAX_13_DEFAULT 0x00000000 2826 #define mmPA_SC_VPORT_ZMIN_14_DEFAULT 0x00000000 2827 #define mmPA_SC_VPORT_ZMAX_14_DEFAULT 0x00000000 2828 #define mmPA_SC_VPORT_ZMIN_15_DEFAULT 0x00000000 2829 #define mmPA_SC_VPORT_ZMAX_15_DEFAULT 0x00000000 2830 #define mmPA_SC_RASTER_CONFIG_DEFAULT 0x2a00126a 2831 #define mmPA_SC_RASTER_CONFIG_1_DEFAULT 0x00000000 2832 #define mmPA_SC_SCREEN_EXTENT_CONTROL_DEFAULT 0x00000000 2833 #define mmPA_SC_TILE_STEERING_OVERRIDE_DEFAULT 0x00000000 2834 #define mmCP_PERFMON_CNTX_CNTL_DEFAULT 0x00000000 2835 #define mmCP_PIPEID_DEFAULT 0x00000000 2836 #define mmCP_RINGID_DEFAULT 0x00000000 2837 #define mmCP_VMID_DEFAULT 0x00000000 2838 #define mmCONTEXT_RESERVED_REG0_DEFAULT 0x00000000 2839 #define mmCONTEXT_RESERVED_REG1_DEFAULT 0x00000000 2840 #define mmVGT_MAX_VTX_INDX_DEFAULT 0x00000000 2841 #define mmVGT_MIN_VTX_INDX_DEFAULT 0x00000000 2842 #define mmVGT_INDX_OFFSET_DEFAULT 0x00000000 2843 #define mmVGT_MULTI_PRIM_IB_RESET_INDX_DEFAULT 0x00000000 2844 #define mmCB_RMI_GL2_CACHE_CONTROL_DEFAULT 0x00000000 2845 #define mmCB_BLEND_RED_DEFAULT 0x00000000 2846 #define mmCB_BLEND_GREEN_DEFAULT 0x00000000 2847 #define mmCB_BLEND_BLUE_DEFAULT 0x00000000 2848 #define mmCB_BLEND_ALPHA_DEFAULT 0x00000000 2849 #define mmCB_DCC_CONTROL_DEFAULT 0x00000000 2850 #define mmCB_COVERAGE_OUT_CONTROL_DEFAULT 0x00000000 2851 #define mmDB_STENCIL_CONTROL_DEFAULT 0x00000000 2852 #define mmDB_STENCILREFMASK_DEFAULT 0x00000000 2853 #define mmDB_STENCILREFMASK_BF_DEFAULT 0x00000000 2854 #define mmPA_CL_VPORT_XSCALE_DEFAULT 0x00000000 2855 #define mmPA_CL_VPORT_XOFFSET_DEFAULT 0x00000000 2856 #define mmPA_CL_VPORT_YSCALE_DEFAULT 0x00000000 2857 #define mmPA_CL_VPORT_YOFFSET_DEFAULT 0x00000000 2858 #define mmPA_CL_VPORT_ZSCALE_DEFAULT 0x00000000 2859 #define mmPA_CL_VPORT_ZOFFSET_DEFAULT 0x00000000 2860 #define mmPA_CL_VPORT_XSCALE_1_DEFAULT 0x00000000 2861 #define mmPA_CL_VPORT_XOFFSET_1_DEFAULT 0x00000000 2862 #define mmPA_CL_VPORT_YSCALE_1_DEFAULT 0x00000000 2863 #define mmPA_CL_VPORT_YOFFSET_1_DEFAULT 0x00000000 2864 #define mmPA_CL_VPORT_ZSCALE_1_DEFAULT 0x00000000 2865 #define mmPA_CL_VPORT_ZOFFSET_1_DEFAULT 0x00000000 2866 #define mmPA_CL_VPORT_XSCALE_2_DEFAULT 0x00000000 2867 #define mmPA_CL_VPORT_XOFFSET_2_DEFAULT 0x00000000 2868 #define mmPA_CL_VPORT_YSCALE_2_DEFAULT 0x00000000 2869 #define mmPA_CL_VPORT_YOFFSET_2_DEFAULT 0x00000000 2870 #define mmPA_CL_VPORT_ZSCALE_2_DEFAULT 0x00000000 2871 #define mmPA_CL_VPORT_ZOFFSET_2_DEFAULT 0x00000000 2872 #define mmPA_CL_VPORT_XSCALE_3_DEFAULT 0x00000000 2873 #define mmPA_CL_VPORT_XOFFSET_3_DEFAULT 0x00000000 2874 #define mmPA_CL_VPORT_YSCALE_3_DEFAULT 0x00000000 2875 #define mmPA_CL_VPORT_YOFFSET_3_DEFAULT 0x00000000 2876 #define mmPA_CL_VPORT_ZSCALE_3_DEFAULT 0x00000000 2877 #define mmPA_CL_VPORT_ZOFFSET_3_DEFAULT 0x00000000 2878 #define mmPA_CL_VPORT_XSCALE_4_DEFAULT 0x00000000 2879 #define mmPA_CL_VPORT_XOFFSET_4_DEFAULT 0x00000000 2880 #define mmPA_CL_VPORT_YSCALE_4_DEFAULT 0x00000000 2881 #define mmPA_CL_VPORT_YOFFSET_4_DEFAULT 0x00000000 2882 #define mmPA_CL_VPORT_ZSCALE_4_DEFAULT 0x00000000 2883 #define mmPA_CL_VPORT_ZOFFSET_4_DEFAULT 0x00000000 2884 #define mmPA_CL_VPORT_XSCALE_5_DEFAULT 0x00000000 2885 #define mmPA_CL_VPORT_XOFFSET_5_DEFAULT 0x00000000 2886 #define mmPA_CL_VPORT_YSCALE_5_DEFAULT 0x00000000 2887 #define mmPA_CL_VPORT_YOFFSET_5_DEFAULT 0x00000000 2888 #define mmPA_CL_VPORT_ZSCALE_5_DEFAULT 0x00000000 2889 #define mmPA_CL_VPORT_ZOFFSET_5_DEFAULT 0x00000000 2890 #define mmPA_CL_VPORT_XSCALE_6_DEFAULT 0x00000000 2891 #define mmPA_CL_VPORT_XOFFSET_6_DEFAULT 0x00000000 2892 #define mmPA_CL_VPORT_YSCALE_6_DEFAULT 0x00000000 2893 #define mmPA_CL_VPORT_YOFFSET_6_DEFAULT 0x00000000 2894 #define mmPA_CL_VPORT_ZSCALE_6_DEFAULT 0x00000000 2895 #define mmPA_CL_VPORT_ZOFFSET_6_DEFAULT 0x00000000 2896 #define mmPA_CL_VPORT_XSCALE_7_DEFAULT 0x00000000 2897 #define mmPA_CL_VPORT_XOFFSET_7_DEFAULT 0x00000000 2898 #define mmPA_CL_VPORT_YSCALE_7_DEFAULT 0x00000000 2899 #define mmPA_CL_VPORT_YOFFSET_7_DEFAULT 0x00000000 2900 #define mmPA_CL_VPORT_ZSCALE_7_DEFAULT 0x00000000 2901 #define mmPA_CL_VPORT_ZOFFSET_7_DEFAULT 0x00000000 2902 #define mmPA_CL_VPORT_XSCALE_8_DEFAULT 0x00000000 2903 #define mmPA_CL_VPORT_XOFFSET_8_DEFAULT 0x00000000 2904 #define mmPA_CL_VPORT_YSCALE_8_DEFAULT 0x00000000 2905 #define mmPA_CL_VPORT_YOFFSET_8_DEFAULT 0x00000000 2906 #define mmPA_CL_VPORT_ZSCALE_8_DEFAULT 0x00000000 2907 #define mmPA_CL_VPORT_ZOFFSET_8_DEFAULT 0x00000000 2908 #define mmPA_CL_VPORT_XSCALE_9_DEFAULT 0x00000000 2909 #define mmPA_CL_VPORT_XOFFSET_9_DEFAULT 0x00000000 2910 #define mmPA_CL_VPORT_YSCALE_9_DEFAULT 0x00000000 2911 #define mmPA_CL_VPORT_YOFFSET_9_DEFAULT 0x00000000 2912 #define mmPA_CL_VPORT_ZSCALE_9_DEFAULT 0x00000000 2913 #define mmPA_CL_VPORT_ZOFFSET_9_DEFAULT 0x00000000 2914 #define mmPA_CL_VPORT_XSCALE_10_DEFAULT 0x00000000 2915 #define mmPA_CL_VPORT_XOFFSET_10_DEFAULT 0x00000000 2916 #define mmPA_CL_VPORT_YSCALE_10_DEFAULT 0x00000000 2917 #define mmPA_CL_VPORT_YOFFSET_10_DEFAULT 0x00000000 2918 #define mmPA_CL_VPORT_ZSCALE_10_DEFAULT 0x00000000 2919 #define mmPA_CL_VPORT_ZOFFSET_10_DEFAULT 0x00000000 2920 #define mmPA_CL_VPORT_XSCALE_11_DEFAULT 0x00000000 2921 #define mmPA_CL_VPORT_XOFFSET_11_DEFAULT 0x00000000 2922 #define mmPA_CL_VPORT_YSCALE_11_DEFAULT 0x00000000 2923 #define mmPA_CL_VPORT_YOFFSET_11_DEFAULT 0x00000000 2924 #define mmPA_CL_VPORT_ZSCALE_11_DEFAULT 0x00000000 2925 #define mmPA_CL_VPORT_ZOFFSET_11_DEFAULT 0x00000000 2926 #define mmPA_CL_VPORT_XSCALE_12_DEFAULT 0x00000000 2927 #define mmPA_CL_VPORT_XOFFSET_12_DEFAULT 0x00000000 2928 #define mmPA_CL_VPORT_YSCALE_12_DEFAULT 0x00000000 2929 #define mmPA_CL_VPORT_YOFFSET_12_DEFAULT 0x00000000 2930 #define mmPA_CL_VPORT_ZSCALE_12_DEFAULT 0x00000000 2931 #define mmPA_CL_VPORT_ZOFFSET_12_DEFAULT 0x00000000 2932 #define mmPA_CL_VPORT_XSCALE_13_DEFAULT 0x00000000 2933 #define mmPA_CL_VPORT_XOFFSET_13_DEFAULT 0x00000000 2934 #define mmPA_CL_VPORT_YSCALE_13_DEFAULT 0x00000000 2935 #define mmPA_CL_VPORT_YOFFSET_13_DEFAULT 0x00000000 2936 #define mmPA_CL_VPORT_ZSCALE_13_DEFAULT 0x00000000 2937 #define mmPA_CL_VPORT_ZOFFSET_13_DEFAULT 0x00000000 2938 #define mmPA_CL_VPORT_XSCALE_14_DEFAULT 0x00000000 2939 #define mmPA_CL_VPORT_XOFFSET_14_DEFAULT 0x00000000 2940 #define mmPA_CL_VPORT_YSCALE_14_DEFAULT 0x00000000 2941 #define mmPA_CL_VPORT_YOFFSET_14_DEFAULT 0x00000000 2942 #define mmPA_CL_VPORT_ZSCALE_14_DEFAULT 0x00000000 2943 #define mmPA_CL_VPORT_ZOFFSET_14_DEFAULT 0x00000000 2944 #define mmPA_CL_VPORT_XSCALE_15_DEFAULT 0x00000000 2945 #define mmPA_CL_VPORT_XOFFSET_15_DEFAULT 0x00000000 2946 #define mmPA_CL_VPORT_YSCALE_15_DEFAULT 0x00000000 2947 #define mmPA_CL_VPORT_YOFFSET_15_DEFAULT 0x00000000 2948 #define mmPA_CL_VPORT_ZSCALE_15_DEFAULT 0x00000000 2949 #define mmPA_CL_VPORT_ZOFFSET_15_DEFAULT 0x00000000 2950 #define mmPA_CL_UCP_0_X_DEFAULT 0x00000000 2951 #define mmPA_CL_UCP_0_Y_DEFAULT 0x00000000 2952 #define mmPA_CL_UCP_0_Z_DEFAULT 0x00000000 2953 #define mmPA_CL_UCP_0_W_DEFAULT 0x00000000 2954 #define mmPA_CL_UCP_1_X_DEFAULT 0x00000000 2955 #define mmPA_CL_UCP_1_Y_DEFAULT 0x00000000 2956 #define mmPA_CL_UCP_1_Z_DEFAULT 0x00000000 2957 #define mmPA_CL_UCP_1_W_DEFAULT 0x00000000 2958 #define mmPA_CL_UCP_2_X_DEFAULT 0x00000000 2959 #define mmPA_CL_UCP_2_Y_DEFAULT 0x00000000 2960 #define mmPA_CL_UCP_2_Z_DEFAULT 0x00000000 2961 #define mmPA_CL_UCP_2_W_DEFAULT 0x00000000 2962 #define mmPA_CL_UCP_3_X_DEFAULT 0x00000000 2963 #define mmPA_CL_UCP_3_Y_DEFAULT 0x00000000 2964 #define mmPA_CL_UCP_3_Z_DEFAULT 0x00000000 2965 #define mmPA_CL_UCP_3_W_DEFAULT 0x00000000 2966 #define mmPA_CL_UCP_4_X_DEFAULT 0x00000000 2967 #define mmPA_CL_UCP_4_Y_DEFAULT 0x00000000 2968 #define mmPA_CL_UCP_4_Z_DEFAULT 0x00000000 2969 #define mmPA_CL_UCP_4_W_DEFAULT 0x00000000 2970 #define mmPA_CL_UCP_5_X_DEFAULT 0x00000000 2971 #define mmPA_CL_UCP_5_Y_DEFAULT 0x00000000 2972 #define mmPA_CL_UCP_5_Z_DEFAULT 0x00000000 2973 #define mmPA_CL_UCP_5_W_DEFAULT 0x00000000 2974 #define mmPA_CL_PROG_NEAR_CLIP_Z_DEFAULT 0x00000000 2975 #define mmSPI_PS_INPUT_CNTL_0_DEFAULT 0x00000000 2976 #define mmSPI_PS_INPUT_CNTL_1_DEFAULT 0x00000000 2977 #define mmSPI_PS_INPUT_CNTL_2_DEFAULT 0x00000000 2978 #define mmSPI_PS_INPUT_CNTL_3_DEFAULT 0x00000000 2979 #define mmSPI_PS_INPUT_CNTL_4_DEFAULT 0x00000000 2980 #define mmSPI_PS_INPUT_CNTL_5_DEFAULT 0x00000000 2981 #define mmSPI_PS_INPUT_CNTL_6_DEFAULT 0x00000000 2982 #define mmSPI_PS_INPUT_CNTL_7_DEFAULT 0x00000000 2983 #define mmSPI_PS_INPUT_CNTL_8_DEFAULT 0x00000000 2984 #define mmSPI_PS_INPUT_CNTL_9_DEFAULT 0x00000000 2985 #define mmSPI_PS_INPUT_CNTL_10_DEFAULT 0x00000000 2986 #define mmSPI_PS_INPUT_CNTL_11_DEFAULT 0x00000000 2987 #define mmSPI_PS_INPUT_CNTL_12_DEFAULT 0x00000000 2988 #define mmSPI_PS_INPUT_CNTL_13_DEFAULT 0x00000000 2989 #define mmSPI_PS_INPUT_CNTL_14_DEFAULT 0x00000000 2990 #define mmSPI_PS_INPUT_CNTL_15_DEFAULT 0x00000000 2991 #define mmSPI_PS_INPUT_CNTL_16_DEFAULT 0x00000000 2992 #define mmSPI_PS_INPUT_CNTL_17_DEFAULT 0x00000000 2993 #define mmSPI_PS_INPUT_CNTL_18_DEFAULT 0x00000000 2994 #define mmSPI_PS_INPUT_CNTL_19_DEFAULT 0x00000000 2995 #define mmSPI_PS_INPUT_CNTL_20_DEFAULT 0x00000000 2996 #define mmSPI_PS_INPUT_CNTL_21_DEFAULT 0x00000000 2997 #define mmSPI_PS_INPUT_CNTL_22_DEFAULT 0x00000000 2998 #define mmSPI_PS_INPUT_CNTL_23_DEFAULT 0x00000000 2999 #define mmSPI_PS_INPUT_CNTL_24_DEFAULT 0x00000000 3000 #define mmSPI_PS_INPUT_CNTL_25_DEFAULT 0x00000000 3001 #define mmSPI_PS_INPUT_CNTL_26_DEFAULT 0x00000000 3002 #define mmSPI_PS_INPUT_CNTL_27_DEFAULT 0x00000000 3003 #define mmSPI_PS_INPUT_CNTL_28_DEFAULT 0x00000000 3004 #define mmSPI_PS_INPUT_CNTL_29_DEFAULT 0x00000000 3005 #define mmSPI_PS_INPUT_CNTL_30_DEFAULT 0x00000000 3006 #define mmSPI_PS_INPUT_CNTL_31_DEFAULT 0x00000000 3007 #define mmSPI_VS_OUT_CONFIG_DEFAULT 0x00000000 3008 #define mmSPI_PS_INPUT_ENA_DEFAULT 0x00000000 3009 #define mmSPI_PS_INPUT_ADDR_DEFAULT 0x00000000 3010 #define mmSPI_INTERP_CONTROL_0_DEFAULT 0x00000000 3011 #define mmSPI_PS_IN_CONTROL_DEFAULT 0x00000000 3012 #define mmSPI_BARYC_CNTL_DEFAULT 0x00000000 3013 #define mmSPI_TMPRING_SIZE_DEFAULT 0x00000000 3014 #define mmSPI_SHADER_IDX_FORMAT_DEFAULT 0x00000000 3015 #define mmSPI_SHADER_POS_FORMAT_DEFAULT 0x00000000 3016 #define mmSPI_SHADER_Z_FORMAT_DEFAULT 0x00000000 3017 #define mmSPI_SHADER_COL_FORMAT_DEFAULT 0x00000000 3018 #define mmSX_PS_DOWNCONVERT_CONTROL_DEFAULT 0x00000000 3019 #define mmSX_PS_DOWNCONVERT_DEFAULT 0x00000000 3020 #define mmSX_BLEND_OPT_EPSILON_DEFAULT 0x00000000 3021 #define mmSX_BLEND_OPT_CONTROL_DEFAULT 0x00000000 3022 #define mmSX_MRT0_BLEND_OPT_DEFAULT 0x00000000 3023 #define mmSX_MRT1_BLEND_OPT_DEFAULT 0x00000000 3024 #define mmSX_MRT2_BLEND_OPT_DEFAULT 0x00000000 3025 #define mmSX_MRT3_BLEND_OPT_DEFAULT 0x00000000 3026 #define mmSX_MRT4_BLEND_OPT_DEFAULT 0x00000000 3027 #define mmSX_MRT5_BLEND_OPT_DEFAULT 0x00000000 3028 #define mmSX_MRT6_BLEND_OPT_DEFAULT 0x00000000 3029 #define mmSX_MRT7_BLEND_OPT_DEFAULT 0x00000000 3030 #define mmCB_BLEND0_CONTROL_DEFAULT 0x00000000 3031 #define mmCB_BLEND1_CONTROL_DEFAULT 0x00000000 3032 #define mmCB_BLEND2_CONTROL_DEFAULT 0x00000000 3033 #define mmCB_BLEND3_CONTROL_DEFAULT 0x00000000 3034 #define mmCB_BLEND4_CONTROL_DEFAULT 0x00000000 3035 #define mmCB_BLEND5_CONTROL_DEFAULT 0x00000000 3036 #define mmCB_BLEND6_CONTROL_DEFAULT 0x00000000 3037 #define mmCB_BLEND7_CONTROL_DEFAULT 0x00000000 3038 #define mmCS_COPY_STATE_DEFAULT 0x00000000 3039 #define mmGFX_COPY_STATE_DEFAULT 0x00000000 3040 #define mmPA_CL_POINT_X_RAD_DEFAULT 0x00000000 3041 #define mmPA_CL_POINT_Y_RAD_DEFAULT 0x00000000 3042 #define mmPA_CL_POINT_SIZE_DEFAULT 0x00000000 3043 #define mmPA_CL_POINT_CULL_RAD_DEFAULT 0x00000000 3044 #define mmVGT_DMA_BASE_HI_DEFAULT 0x00000000 3045 #define mmVGT_DMA_BASE_DEFAULT 0x00000000 3046 #define mmVGT_DRAW_INITIATOR_DEFAULT 0x00000000 3047 #define mmVGT_IMMED_DATA_DEFAULT 0x00000000 3048 #define mmVGT_EVENT_ADDRESS_REG_DEFAULT 0x00000000 3049 #define mmGE_MAX_OUTPUT_PER_SUBGROUP_DEFAULT 0x00000000 3050 #define mmDB_DEPTH_CONTROL_DEFAULT 0x00000000 3051 #define mmDB_EQAA_DEFAULT 0x00000000 3052 #define mmCB_COLOR_CONTROL_DEFAULT 0x00000000 3053 #define mmDB_SHADER_CONTROL_DEFAULT 0x00000000 3054 #define mmPA_CL_CLIP_CNTL_DEFAULT 0x00000000 3055 #define mmPA_SU_SC_MODE_CNTL_DEFAULT 0x00000000 3056 #define mmPA_CL_VTE_CNTL_DEFAULT 0x00000000 3057 #define mmPA_CL_VS_OUT_CNTL_DEFAULT 0x00000000 3058 #define mmPA_CL_NANINF_CNTL_DEFAULT 0x00000000 3059 #define mmPA_SU_LINE_STIPPLE_CNTL_DEFAULT 0x00000000 3060 #define mmPA_SU_LINE_STIPPLE_SCALE_DEFAULT 0x00000000 3061 #define mmPA_SU_PRIM_FILTER_CNTL_DEFAULT 0x00000000 3062 #define mmPA_SU_SMALL_PRIM_FILTER_CNTL_DEFAULT 0x00000000 3063 #define mmPA_CL_NGG_CNTL_DEFAULT 0x00000000 3064 #define mmPA_SU_OVER_RASTERIZATION_CNTL_DEFAULT 0x00000000 3065 #define mmPA_STEREO_CNTL_DEFAULT 0x00000000 3066 #define mmPA_STATE_STEREO_X_DEFAULT 0x00000000 3067 #define mmPA_CL_VRS_CNTL_DEFAULT 0x00000000 3068 #define mmPA_SU_POINT_SIZE_DEFAULT 0x00000000 3069 #define mmPA_SU_POINT_MINMAX_DEFAULT 0x00000000 3070 #define mmPA_SU_LINE_CNTL_DEFAULT 0x00000000 3071 #define mmPA_SC_LINE_STIPPLE_DEFAULT 0x00000000 3072 #define mmVGT_OUTPUT_PATH_CNTL_DEFAULT 0x00000000 3073 #define mmVGT_HOS_CNTL_DEFAULT 0x00000000 3074 #define mmVGT_HOS_MAX_TESS_LEVEL_DEFAULT 0x00000000 3075 #define mmVGT_HOS_MIN_TESS_LEVEL_DEFAULT 0x00000000 3076 #define mmVGT_HOS_REUSE_DEPTH_DEFAULT 0x00000000 3077 #define mmVGT_GROUP_PRIM_TYPE_DEFAULT 0x00000000 3078 #define mmVGT_GROUP_FIRST_DECR_DEFAULT 0x00000000 3079 #define mmVGT_GROUP_DECR_DEFAULT 0x00000000 3080 #define mmVGT_GROUP_VECT_0_CNTL_DEFAULT 0x00000000 3081 #define mmVGT_GROUP_VECT_1_CNTL_DEFAULT 0x00000000 3082 #define mmVGT_GROUP_VECT_0_FMT_CNTL_DEFAULT 0x00000000 3083 #define mmVGT_GROUP_VECT_1_FMT_CNTL_DEFAULT 0x00000000 3084 #define mmVGT_GS_MODE_DEFAULT 0x00000000 3085 #define mmVGT_GS_ONCHIP_CNTL_DEFAULT 0x00000000 3086 #define mmPA_SC_MODE_CNTL_0_DEFAULT 0x00000000 3087 #define mmPA_SC_MODE_CNTL_1_DEFAULT 0x06000000 3088 #define mmVGT_ENHANCE_DEFAULT 0x00000000 3089 #define mmVGT_GS_PER_ES_DEFAULT 0x00000000 3090 #define mmVGT_ES_PER_GS_DEFAULT 0x00000000 3091 #define mmVGT_GS_PER_VS_DEFAULT 0x00000000 3092 #define mmVGT_GSVS_RING_OFFSET_1_DEFAULT 0x00000000 3093 #define mmVGT_GSVS_RING_OFFSET_2_DEFAULT 0x00000000 3094 #define mmVGT_GSVS_RING_OFFSET_3_DEFAULT 0x00000000 3095 #define mmVGT_GS_OUT_PRIM_TYPE_DEFAULT 0x00000000 3096 #define mmIA_ENHANCE_DEFAULT 0x00000000 3097 #define mmVGT_DMA_SIZE_DEFAULT 0x00000000 3098 #define mmVGT_DMA_MAX_SIZE_DEFAULT 0x00000000 3099 #define mmVGT_DMA_INDEX_TYPE_DEFAULT 0x00000000 3100 #define mmWD_ENHANCE_DEFAULT 0x00000000 3101 #define mmVGT_PRIMITIVEID_EN_DEFAULT 0x00000000 3102 #define mmVGT_DMA_NUM_INSTANCES_DEFAULT 0x00000000 3103 #define mmVGT_PRIMITIVEID_RESET_DEFAULT 0x00000000 3104 #define mmVGT_EVENT_INITIATOR_DEFAULT 0x00000000 3105 #define mmVGT_MULTI_PRIM_IB_RESET_EN_DEFAULT 0x00000000 3106 #define mmVGT_DRAW_PAYLOAD_CNTL_DEFAULT 0x00000000 3107 #define mmVGT_INSTANCE_STEP_RATE_0_DEFAULT 0x00000000 3108 #define mmVGT_INSTANCE_STEP_RATE_1_DEFAULT 0x00000000 3109 #define mmIA_MULTI_VGT_PARAM_DEFAULT 0x000000ff 3110 #define mmVGT_ESGS_RING_ITEMSIZE_DEFAULT 0x00000000 3111 #define mmVGT_GSVS_RING_ITEMSIZE_DEFAULT 0x00000000 3112 #define mmVGT_REUSE_OFF_DEFAULT 0x00000000 3113 #define mmVGT_VTX_CNT_EN_DEFAULT 0x00000000 3114 #define mmDB_HTILE_SURFACE_DEFAULT 0x00000000 3115 #define mmDB_SRESULTS_COMPARE_STATE0_DEFAULT 0x00000000 3116 #define mmDB_SRESULTS_COMPARE_STATE1_DEFAULT 0x00000000 3117 #define mmDB_PRELOAD_CONTROL_DEFAULT 0x00000000 3118 #define mmVGT_STRMOUT_BUFFER_SIZE_0_DEFAULT 0x00000000 3119 #define mmVGT_STRMOUT_VTX_STRIDE_0_DEFAULT 0x00000000 3120 #define mmVGT_STRMOUT_BUFFER_OFFSET_0_DEFAULT 0x00000000 3121 #define mmVGT_STRMOUT_BUFFER_SIZE_1_DEFAULT 0x00000000 3122 #define mmVGT_STRMOUT_VTX_STRIDE_1_DEFAULT 0x00000000 3123 #define mmVGT_STRMOUT_BUFFER_OFFSET_1_DEFAULT 0x00000000 3124 #define mmVGT_STRMOUT_BUFFER_SIZE_2_DEFAULT 0x00000000 3125 #define mmVGT_STRMOUT_VTX_STRIDE_2_DEFAULT 0x00000000 3126 #define mmVGT_STRMOUT_BUFFER_OFFSET_2_DEFAULT 0x00000000 3127 #define mmVGT_STRMOUT_BUFFER_SIZE_3_DEFAULT 0x00000000 3128 #define mmVGT_STRMOUT_VTX_STRIDE_3_DEFAULT 0x00000000 3129 #define mmVGT_STRMOUT_BUFFER_OFFSET_3_DEFAULT 0x00000000 3130 #define mmVGT_STRMOUT_DRAW_OPAQUE_OFFSET_DEFAULT 0x00000000 3131 #define mmVGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE_DEFAULT 0x00000000 3132 #define mmVGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE_DEFAULT 0x00000000 3133 #define mmVGT_GS_MAX_VERT_OUT_DEFAULT 0x00000000 3134 #define mmGE_NGG_SUBGRP_CNTL_DEFAULT 0x00000000 3135 #define mmVGT_TESS_DISTRIBUTION_DEFAULT 0x00000000 3136 #define mmVGT_SHADER_STAGES_EN_DEFAULT 0x00000000 3137 #define mmVGT_LS_HS_CONFIG_DEFAULT 0x00000000 3138 #define mmVGT_GS_VERT_ITEMSIZE_DEFAULT 0x00000000 3139 #define mmVGT_GS_VERT_ITEMSIZE_1_DEFAULT 0x00000000 3140 #define mmVGT_GS_VERT_ITEMSIZE_2_DEFAULT 0x00000000 3141 #define mmVGT_GS_VERT_ITEMSIZE_3_DEFAULT 0x00000000 3142 #define mmVGT_TF_PARAM_DEFAULT 0x00000000 3143 #define mmDB_ALPHA_TO_MASK_DEFAULT 0x00000000 3144 #define mmVGT_DISPATCH_DRAW_INDEX_DEFAULT 0x00000000 3145 #define mmPA_SU_POLY_OFFSET_DB_FMT_CNTL_DEFAULT 0x00000000 3146 #define mmPA_SU_POLY_OFFSET_CLAMP_DEFAULT 0x00000000 3147 #define mmPA_SU_POLY_OFFSET_FRONT_SCALE_DEFAULT 0x00000000 3148 #define mmPA_SU_POLY_OFFSET_FRONT_OFFSET_DEFAULT 0x00000000 3149 #define mmPA_SU_POLY_OFFSET_BACK_SCALE_DEFAULT 0x00000000 3150 #define mmPA_SU_POLY_OFFSET_BACK_OFFSET_DEFAULT 0x00000000 3151 #define mmVGT_GS_INSTANCE_CNT_DEFAULT 0x00000000 3152 #define mmVGT_STRMOUT_CONFIG_DEFAULT 0x00000000 3153 #define mmVGT_STRMOUT_BUFFER_CONFIG_DEFAULT 0x00000000 3154 #define mmVGT_DMA_EVENT_INITIATOR_DEFAULT 0x00000000 3155 #define mmPA_SC_CENTROID_PRIORITY_0_DEFAULT 0x00000000 3156 #define mmPA_SC_CENTROID_PRIORITY_1_DEFAULT 0x00000000 3157 #define mmPA_SC_LINE_CNTL_DEFAULT 0x00000000 3158 #define mmPA_SC_AA_CONFIG_DEFAULT 0x00000000 3159 #define mmPA_SU_VTX_CNTL_DEFAULT 0x00000000 3160 #define mmPA_CL_GB_VERT_CLIP_ADJ_DEFAULT 0x00000000 3161 #define mmPA_CL_GB_VERT_DISC_ADJ_DEFAULT 0x00000000 3162 #define mmPA_CL_GB_HORZ_CLIP_ADJ_DEFAULT 0x00000000 3163 #define mmPA_CL_GB_HORZ_DISC_ADJ_DEFAULT 0x00000000 3164 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0_DEFAULT 0x00000000 3165 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1_DEFAULT 0x00000000 3166 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2_DEFAULT 0x00000000 3167 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3_DEFAULT 0x00000000 3168 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0_DEFAULT 0x00000000 3169 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1_DEFAULT 0x00000000 3170 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2_DEFAULT 0x00000000 3171 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3_DEFAULT 0x00000000 3172 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0_DEFAULT 0x00000000 3173 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1_DEFAULT 0x00000000 3174 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2_DEFAULT 0x00000000 3175 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3_DEFAULT 0x00000000 3176 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0_DEFAULT 0x00000000 3177 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1_DEFAULT 0x00000000 3178 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2_DEFAULT 0x00000000 3179 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3_DEFAULT 0x00000000 3180 #define mmPA_SC_AA_MASK_X0Y0_X1Y0_DEFAULT 0x00000000 3181 #define mmPA_SC_AA_MASK_X0Y1_X1Y1_DEFAULT 0x00000000 3182 #define mmPA_SC_SHADER_CONTROL_DEFAULT 0x00000000 3183 #define mmPA_SC_BINNER_CNTL_0_DEFAULT 0x00000000 3184 #define mmPA_SC_BINNER_CNTL_1_DEFAULT 0x00000000 3185 #define mmPA_SC_CONSERVATIVE_RASTERIZATION_CNTL_DEFAULT 0x00000000 3186 #define mmPA_SC_NGG_MODE_CNTL_DEFAULT 0x00000000 3187 #define mmVGT_VERTEX_REUSE_BLOCK_CNTL_DEFAULT 0x00000000 3188 #define mmVGT_OUT_DEALLOC_CNTL_DEFAULT 0x00000000 3189 #define mmCB_COLOR0_BASE_DEFAULT 0x00000000 3190 #define mmCB_COLOR0_PITCH_DEFAULT 0x00000000 3191 #define mmCB_COLOR0_SLICE_DEFAULT 0x00000000 3192 #define mmCB_COLOR0_VIEW_DEFAULT 0x00000000 3193 #define mmCB_COLOR0_INFO_DEFAULT 0x00000000 3194 #define mmCB_COLOR0_ATTRIB_DEFAULT 0x00000000 3195 #define mmCB_COLOR0_DCC_CONTROL_DEFAULT 0x00000000 3196 #define mmCB_COLOR0_CMASK_DEFAULT 0x00000000 3197 #define mmCB_COLOR0_CMASK_SLICE_DEFAULT 0x00000000 3198 #define mmCB_COLOR0_FMASK_DEFAULT 0x00000000 3199 #define mmCB_COLOR0_FMASK_SLICE_DEFAULT 0x00000000 3200 #define mmCB_COLOR0_CLEAR_WORD0_DEFAULT 0x00000000 3201 #define mmCB_COLOR0_CLEAR_WORD1_DEFAULT 0x00000000 3202 #define mmCB_COLOR0_DCC_BASE_DEFAULT 0x00000000 3203 #define mmCB_COLOR1_BASE_DEFAULT 0x00000000 3204 #define mmCB_COLOR1_PITCH_DEFAULT 0x00000000 3205 #define mmCB_COLOR1_SLICE_DEFAULT 0x00000000 3206 #define mmCB_COLOR1_VIEW_DEFAULT 0x00000000 3207 #define mmCB_COLOR1_INFO_DEFAULT 0x00000000 3208 #define mmCB_COLOR1_ATTRIB_DEFAULT 0x00000000 3209 #define mmCB_COLOR1_DCC_CONTROL_DEFAULT 0x00000000 3210 #define mmCB_COLOR1_CMASK_DEFAULT 0x00000000 3211 #define mmCB_COLOR1_CMASK_SLICE_DEFAULT 0x00000000 3212 #define mmCB_COLOR1_FMASK_DEFAULT 0x00000000 3213 #define mmCB_COLOR1_FMASK_SLICE_DEFAULT 0x00000000 3214 #define mmCB_COLOR1_CLEAR_WORD0_DEFAULT 0x00000000 3215 #define mmCB_COLOR1_CLEAR_WORD1_DEFAULT 0x00000000 3216 #define mmCB_COLOR1_DCC_BASE_DEFAULT 0x00000000 3217 #define mmCB_COLOR2_BASE_DEFAULT 0x00000000 3218 #define mmCB_COLOR2_PITCH_DEFAULT 0x00000000 3219 #define mmCB_COLOR2_SLICE_DEFAULT 0x00000000 3220 #define mmCB_COLOR2_VIEW_DEFAULT 0x00000000 3221 #define mmCB_COLOR2_INFO_DEFAULT 0x00000000 3222 #define mmCB_COLOR2_ATTRIB_DEFAULT 0x00000000 3223 #define mmCB_COLOR2_DCC_CONTROL_DEFAULT 0x00000000 3224 #define mmCB_COLOR2_CMASK_DEFAULT 0x00000000 3225 #define mmCB_COLOR2_CMASK_SLICE_DEFAULT 0x00000000 3226 #define mmCB_COLOR2_FMASK_DEFAULT 0x00000000 3227 #define mmCB_COLOR2_FMASK_SLICE_DEFAULT 0x00000000 3228 #define mmCB_COLOR2_CLEAR_WORD0_DEFAULT 0x00000000 3229 #define mmCB_COLOR2_CLEAR_WORD1_DEFAULT 0x00000000 3230 #define mmCB_COLOR2_DCC_BASE_DEFAULT 0x00000000 3231 #define mmCB_COLOR3_BASE_DEFAULT 0x00000000 3232 #define mmCB_COLOR3_PITCH_DEFAULT 0x00000000 3233 #define mmCB_COLOR3_SLICE_DEFAULT 0x00000000 3234 #define mmCB_COLOR3_VIEW_DEFAULT 0x00000000 3235 #define mmCB_COLOR3_INFO_DEFAULT 0x00000000 3236 #define mmCB_COLOR3_ATTRIB_DEFAULT 0x00000000 3237 #define mmCB_COLOR3_DCC_CONTROL_DEFAULT 0x00000000 3238 #define mmCB_COLOR3_CMASK_DEFAULT 0x00000000 3239 #define mmCB_COLOR3_CMASK_SLICE_DEFAULT 0x00000000 3240 #define mmCB_COLOR3_FMASK_DEFAULT 0x00000000 3241 #define mmCB_COLOR3_FMASK_SLICE_DEFAULT 0x00000000 3242 #define mmCB_COLOR3_CLEAR_WORD0_DEFAULT 0x00000000 3243 #define mmCB_COLOR3_CLEAR_WORD1_DEFAULT 0x00000000 3244 #define mmCB_COLOR3_DCC_BASE_DEFAULT 0x00000000 3245 #define mmCB_COLOR4_BASE_DEFAULT 0x00000000 3246 #define mmCB_COLOR4_PITCH_DEFAULT 0x00000000 3247 #define mmCB_COLOR4_SLICE_DEFAULT 0x00000000 3248 #define mmCB_COLOR4_VIEW_DEFAULT 0x00000000 3249 #define mmCB_COLOR4_INFO_DEFAULT 0x00000000 3250 #define mmCB_COLOR4_ATTRIB_DEFAULT 0x00000000 3251 #define mmCB_COLOR4_DCC_CONTROL_DEFAULT 0x00000000 3252 #define mmCB_COLOR4_CMASK_DEFAULT 0x00000000 3253 #define mmCB_COLOR4_CMASK_SLICE_DEFAULT 0x00000000 3254 #define mmCB_COLOR4_FMASK_DEFAULT 0x00000000 3255 #define mmCB_COLOR4_FMASK_SLICE_DEFAULT 0x00000000 3256 #define mmCB_COLOR4_CLEAR_WORD0_DEFAULT 0x00000000 3257 #define mmCB_COLOR4_CLEAR_WORD1_DEFAULT 0x00000000 3258 #define mmCB_COLOR4_DCC_BASE_DEFAULT 0x00000000 3259 #define mmCB_COLOR5_BASE_DEFAULT 0x00000000 3260 #define mmCB_COLOR5_PITCH_DEFAULT 0x00000000 3261 #define mmCB_COLOR5_SLICE_DEFAULT 0x00000000 3262 #define mmCB_COLOR5_VIEW_DEFAULT 0x00000000 3263 #define mmCB_COLOR5_INFO_DEFAULT 0x00000000 3264 #define mmCB_COLOR5_ATTRIB_DEFAULT 0x00000000 3265 #define mmCB_COLOR5_DCC_CONTROL_DEFAULT 0x00000000 3266 #define mmCB_COLOR5_CMASK_DEFAULT 0x00000000 3267 #define mmCB_COLOR5_CMASK_SLICE_DEFAULT 0x00000000 3268 #define mmCB_COLOR5_FMASK_DEFAULT 0x00000000 3269 #define mmCB_COLOR5_FMASK_SLICE_DEFAULT 0x00000000 3270 #define mmCB_COLOR5_CLEAR_WORD0_DEFAULT 0x00000000 3271 #define mmCB_COLOR5_CLEAR_WORD1_DEFAULT 0x00000000 3272 #define mmCB_COLOR5_DCC_BASE_DEFAULT 0x00000000 3273 #define mmCB_COLOR6_BASE_DEFAULT 0x00000000 3274 #define mmCB_COLOR6_PITCH_DEFAULT 0x00000000 3275 #define mmCB_COLOR6_SLICE_DEFAULT 0x00000000 3276 #define mmCB_COLOR6_VIEW_DEFAULT 0x00000000 3277 #define mmCB_COLOR6_INFO_DEFAULT 0x00000000 3278 #define mmCB_COLOR6_ATTRIB_DEFAULT 0x00000000 3279 #define mmCB_COLOR6_DCC_CONTROL_DEFAULT 0x00000000 3280 #define mmCB_COLOR6_CMASK_DEFAULT 0x00000000 3281 #define mmCB_COLOR6_CMASK_SLICE_DEFAULT 0x00000000 3282 #define mmCB_COLOR6_FMASK_DEFAULT 0x00000000 3283 #define mmCB_COLOR6_FMASK_SLICE_DEFAULT 0x00000000 3284 #define mmCB_COLOR6_CLEAR_WORD0_DEFAULT 0x00000000 3285 #define mmCB_COLOR6_CLEAR_WORD1_DEFAULT 0x00000000 3286 #define mmCB_COLOR6_DCC_BASE_DEFAULT 0x00000000 3287 #define mmCB_COLOR7_BASE_DEFAULT 0x00000000 3288 #define mmCB_COLOR7_PITCH_DEFAULT 0x00000000 3289 #define mmCB_COLOR7_SLICE_DEFAULT 0x00000000 3290 #define mmCB_COLOR7_VIEW_DEFAULT 0x00000000 3291 #define mmCB_COLOR7_INFO_DEFAULT 0x00000000 3292 #define mmCB_COLOR7_ATTRIB_DEFAULT 0x00000000 3293 #define mmCB_COLOR7_DCC_CONTROL_DEFAULT 0x00000000 3294 #define mmCB_COLOR7_CMASK_DEFAULT 0x00000000 3295 #define mmCB_COLOR7_CMASK_SLICE_DEFAULT 0x00000000 3296 #define mmCB_COLOR7_FMASK_DEFAULT 0x00000000 3297 #define mmCB_COLOR7_FMASK_SLICE_DEFAULT 0x00000000 3298 #define mmCB_COLOR7_CLEAR_WORD0_DEFAULT 0x00000000 3299 #define mmCB_COLOR7_CLEAR_WORD1_DEFAULT 0x00000000 3300 #define mmCB_COLOR7_DCC_BASE_DEFAULT 0x00000000 3301 #define mmCB_COLOR0_BASE_EXT_DEFAULT 0x00000000 3302 #define mmCB_COLOR1_BASE_EXT_DEFAULT 0x00000000 3303 #define mmCB_COLOR2_BASE_EXT_DEFAULT 0x00000000 3304 #define mmCB_COLOR3_BASE_EXT_DEFAULT 0x00000000 3305 #define mmCB_COLOR4_BASE_EXT_DEFAULT 0x00000000 3306 #define mmCB_COLOR5_BASE_EXT_DEFAULT 0x00000000 3307 #define mmCB_COLOR6_BASE_EXT_DEFAULT 0x00000000 3308 #define mmCB_COLOR7_BASE_EXT_DEFAULT 0x00000000 3309 #define mmCB_COLOR0_CMASK_BASE_EXT_DEFAULT 0x00000000 3310 #define mmCB_COLOR1_CMASK_BASE_EXT_DEFAULT 0x00000000 3311 #define mmCB_COLOR2_CMASK_BASE_EXT_DEFAULT 0x00000000 3312 #define mmCB_COLOR3_CMASK_BASE_EXT_DEFAULT 0x00000000 3313 #define mmCB_COLOR4_CMASK_BASE_EXT_DEFAULT 0x00000000 3314 #define mmCB_COLOR5_CMASK_BASE_EXT_DEFAULT 0x00000000 3315 #define mmCB_COLOR6_CMASK_BASE_EXT_DEFAULT 0x00000000 3316 #define mmCB_COLOR7_CMASK_BASE_EXT_DEFAULT 0x00000000 3317 #define mmCB_COLOR0_FMASK_BASE_EXT_DEFAULT 0x00000000 3318 #define mmCB_COLOR1_FMASK_BASE_EXT_DEFAULT 0x00000000 3319 #define mmCB_COLOR2_FMASK_BASE_EXT_DEFAULT 0x00000000 3320 #define mmCB_COLOR3_FMASK_BASE_EXT_DEFAULT 0x00000000 3321 #define mmCB_COLOR4_FMASK_BASE_EXT_DEFAULT 0x00000000 3322 #define mmCB_COLOR5_FMASK_BASE_EXT_DEFAULT 0x00000000 3323 #define mmCB_COLOR6_FMASK_BASE_EXT_DEFAULT 0x00000000 3324 #define mmCB_COLOR7_FMASK_BASE_EXT_DEFAULT 0x00000000 3325 #define mmCB_COLOR0_DCC_BASE_EXT_DEFAULT 0x00000000 3326 #define mmCB_COLOR1_DCC_BASE_EXT_DEFAULT 0x00000000 3327 #define mmCB_COLOR2_DCC_BASE_EXT_DEFAULT 0x00000000 3328 #define mmCB_COLOR3_DCC_BASE_EXT_DEFAULT 0x00000000 3329 #define mmCB_COLOR4_DCC_BASE_EXT_DEFAULT 0x00000000 3330 #define mmCB_COLOR5_DCC_BASE_EXT_DEFAULT 0x00000000 3331 #define mmCB_COLOR6_DCC_BASE_EXT_DEFAULT 0x00000000 3332 #define mmCB_COLOR7_DCC_BASE_EXT_DEFAULT 0x00000000 3333 #define mmCB_COLOR0_ATTRIB2_DEFAULT 0x00000000 3334 #define mmCB_COLOR1_ATTRIB2_DEFAULT 0x00000000 3335 #define mmCB_COLOR2_ATTRIB2_DEFAULT 0x00000000 3336 #define mmCB_COLOR3_ATTRIB2_DEFAULT 0x00000000 3337 #define mmCB_COLOR4_ATTRIB2_DEFAULT 0x00000000 3338 #define mmCB_COLOR5_ATTRIB2_DEFAULT 0x00000000 3339 #define mmCB_COLOR6_ATTRIB2_DEFAULT 0x00000000 3340 #define mmCB_COLOR7_ATTRIB2_DEFAULT 0x00000000 3341 #define mmCB_COLOR0_ATTRIB3_DEFAULT 0x00000000 3342 #define mmCB_COLOR1_ATTRIB3_DEFAULT 0x00000000 3343 #define mmCB_COLOR2_ATTRIB3_DEFAULT 0x00000000 3344 #define mmCB_COLOR3_ATTRIB3_DEFAULT 0x00000000 3345 #define mmCB_COLOR4_ATTRIB3_DEFAULT 0x00000000 3346 #define mmCB_COLOR5_ATTRIB3_DEFAULT 0x00000000 3347 #define mmCB_COLOR6_ATTRIB3_DEFAULT 0x00000000 3348 #define mmCB_COLOR7_ATTRIB3_DEFAULT 0x00000000 3349 3350 3351 // addressBlock: gc_gfxudec 3352 #define mmCP_EOP_DONE_ADDR_LO_DEFAULT 0x00000000 3353 #define mmCP_EOP_DONE_ADDR_HI_DEFAULT 0x00000000 3354 #define mmCP_EOP_DONE_DATA_LO_DEFAULT 0x00000000 3355 #define mmCP_EOP_DONE_DATA_HI_DEFAULT 0x00000000 3356 #define mmCP_EOP_LAST_FENCE_LO_DEFAULT 0x00000000 3357 #define mmCP_EOP_LAST_FENCE_HI_DEFAULT 0x00000000 3358 #define mmCP_STREAM_OUT_ADDR_LO_DEFAULT 0x00000000 3359 #define mmCP_STREAM_OUT_ADDR_HI_DEFAULT 0x00000000 3360 #define mmCP_NUM_PRIM_WRITTEN_COUNT0_LO_DEFAULT 0x00000000 3361 #define mmCP_NUM_PRIM_WRITTEN_COUNT0_HI_DEFAULT 0x00000000 3362 #define mmCP_NUM_PRIM_NEEDED_COUNT0_LO_DEFAULT 0x00000000 3363 #define mmCP_NUM_PRIM_NEEDED_COUNT0_HI_DEFAULT 0x00000000 3364 #define mmCP_NUM_PRIM_WRITTEN_COUNT1_LO_DEFAULT 0x00000000 3365 #define mmCP_NUM_PRIM_WRITTEN_COUNT1_HI_DEFAULT 0x00000000 3366 #define mmCP_NUM_PRIM_NEEDED_COUNT1_LO_DEFAULT 0x00000000 3367 #define mmCP_NUM_PRIM_NEEDED_COUNT1_HI_DEFAULT 0x00000000 3368 #define mmCP_NUM_PRIM_WRITTEN_COUNT2_LO_DEFAULT 0x00000000 3369 #define mmCP_NUM_PRIM_WRITTEN_COUNT2_HI_DEFAULT 0x00000000 3370 #define mmCP_NUM_PRIM_NEEDED_COUNT2_LO_DEFAULT 0x00000000 3371 #define mmCP_NUM_PRIM_NEEDED_COUNT2_HI_DEFAULT 0x00000000 3372 #define mmCP_NUM_PRIM_WRITTEN_COUNT3_LO_DEFAULT 0x00000000 3373 #define mmCP_NUM_PRIM_WRITTEN_COUNT3_HI_DEFAULT 0x00000000 3374 #define mmCP_NUM_PRIM_NEEDED_COUNT3_LO_DEFAULT 0x00000000 3375 #define mmCP_NUM_PRIM_NEEDED_COUNT3_HI_DEFAULT 0x00000000 3376 #define mmCP_PIPE_STATS_ADDR_LO_DEFAULT 0x00000000 3377 #define mmCP_PIPE_STATS_ADDR_HI_DEFAULT 0x00000000 3378 #define mmCP_VGT_IAVERT_COUNT_LO_DEFAULT 0x00000000 3379 #define mmCP_VGT_IAVERT_COUNT_HI_DEFAULT 0x00000000 3380 #define mmCP_VGT_IAPRIM_COUNT_LO_DEFAULT 0x00000000 3381 #define mmCP_VGT_IAPRIM_COUNT_HI_DEFAULT 0x00000000 3382 #define mmCP_VGT_GSPRIM_COUNT_LO_DEFAULT 0x00000000 3383 #define mmCP_VGT_GSPRIM_COUNT_HI_DEFAULT 0x00000000 3384 #define mmCP_VGT_VSINVOC_COUNT_LO_DEFAULT 0x00000000 3385 #define mmCP_VGT_VSINVOC_COUNT_HI_DEFAULT 0x00000000 3386 #define mmCP_VGT_GSINVOC_COUNT_LO_DEFAULT 0x00000000 3387 #define mmCP_VGT_GSINVOC_COUNT_HI_DEFAULT 0x00000000 3388 #define mmCP_VGT_HSINVOC_COUNT_LO_DEFAULT 0x00000000 3389 #define mmCP_VGT_HSINVOC_COUNT_HI_DEFAULT 0x00000000 3390 #define mmCP_VGT_DSINVOC_COUNT_LO_DEFAULT 0x00000000 3391 #define mmCP_VGT_DSINVOC_COUNT_HI_DEFAULT 0x00000000 3392 #define mmCP_PA_CINVOC_COUNT_LO_DEFAULT 0x00000000 3393 #define mmCP_PA_CINVOC_COUNT_HI_DEFAULT 0x00000000 3394 #define mmCP_PA_CPRIM_COUNT_LO_DEFAULT 0x00000000 3395 #define mmCP_PA_CPRIM_COUNT_HI_DEFAULT 0x00000000 3396 #define mmCP_SC_PSINVOC_COUNT0_LO_DEFAULT 0x00000000 3397 #define mmCP_SC_PSINVOC_COUNT0_HI_DEFAULT 0x00000000 3398 #define mmCP_SC_PSINVOC_COUNT1_LO_DEFAULT 0x00000000 3399 #define mmCP_SC_PSINVOC_COUNT1_HI_DEFAULT 0x00000000 3400 #define mmCP_VGT_CSINVOC_COUNT_LO_DEFAULT 0x00000000 3401 #define mmCP_VGT_CSINVOC_COUNT_HI_DEFAULT 0x00000000 3402 #define mmCP_PIPE_STATS_CONTROL_DEFAULT 0x00000000 3403 #define mmCP_STREAM_OUT_CONTROL_DEFAULT 0x00000000 3404 #define mmCP_STRMOUT_CNTL_DEFAULT 0x00000000 3405 #define mmSCRATCH_REG0_DEFAULT 0x00000000 3406 #define mmSCRATCH_REG1_DEFAULT 0x00000000 3407 #define mmSCRATCH_REG2_DEFAULT 0x00000000 3408 #define mmSCRATCH_REG3_DEFAULT 0x00000000 3409 #define mmSCRATCH_REG4_DEFAULT 0x00000000 3410 #define mmSCRATCH_REG5_DEFAULT 0x00000000 3411 #define mmSCRATCH_REG6_DEFAULT 0x00000000 3412 #define mmSCRATCH_REG7_DEFAULT 0x00000000 3413 #define mmSCRATCH_REG_ATOMIC_DEFAULT 0x00000000 3414 #define mmSCRATCH_REG_CMPSWAP_ATOMIC_DEFAULT 0x00000000 3415 #define mmCP_APPEND_DDID_CNT_DEFAULT 0x00000000 3416 #define mmCP_APPEND_DATA_HI_DEFAULT 0x00000000 3417 #define mmCP_APPEND_LAST_CS_FENCE_HI_DEFAULT 0x00000000 3418 #define mmCP_APPEND_LAST_PS_FENCE_HI_DEFAULT 0x00000000 3419 #define mmSCRATCH_UMSK_DEFAULT 0x00000000 3420 #define mmSCRATCH_ADDR_DEFAULT 0x00000000 3421 #define mmCP_PFP_ATOMIC_PREOP_LO_DEFAULT 0x00000000 3422 #define mmCP_PFP_ATOMIC_PREOP_HI_DEFAULT 0x00000000 3423 #define mmCP_PFP_GDS_ATOMIC0_PREOP_LO_DEFAULT 0x00000000 3424 #define mmCP_PFP_GDS_ATOMIC0_PREOP_HI_DEFAULT 0x00000000 3425 #define mmCP_PFP_GDS_ATOMIC1_PREOP_LO_DEFAULT 0x00000000 3426 #define mmCP_PFP_GDS_ATOMIC1_PREOP_HI_DEFAULT 0x00000000 3427 #define mmCP_APPEND_ADDR_LO_DEFAULT 0x00000000 3428 #define mmCP_APPEND_ADDR_HI_DEFAULT 0x00000000 3429 #define mmCP_APPEND_DATA_DEFAULT 0x00000000 3430 #define mmCP_APPEND_DATA_LO_DEFAULT 0x00000000 3431 #define mmCP_APPEND_LAST_CS_FENCE_DEFAULT 0x00000000 3432 #define mmCP_APPEND_LAST_CS_FENCE_LO_DEFAULT 0x00000000 3433 #define mmCP_APPEND_LAST_PS_FENCE_DEFAULT 0x00000000 3434 #define mmCP_APPEND_LAST_PS_FENCE_LO_DEFAULT 0x00000000 3435 #define mmCP_ATOMIC_PREOP_LO_DEFAULT 0x00000000 3436 #define mmCP_ME_ATOMIC_PREOP_LO_DEFAULT 0x00000000 3437 #define mmCP_ATOMIC_PREOP_HI_DEFAULT 0x00000000 3438 #define mmCP_ME_ATOMIC_PREOP_HI_DEFAULT 0x00000000 3439 #define mmCP_GDS_ATOMIC0_PREOP_LO_DEFAULT 0x00000000 3440 #define mmCP_ME_GDS_ATOMIC0_PREOP_LO_DEFAULT 0x00000000 3441 #define mmCP_GDS_ATOMIC0_PREOP_HI_DEFAULT 0x00000000 3442 #define mmCP_ME_GDS_ATOMIC0_PREOP_HI_DEFAULT 0x00000000 3443 #define mmCP_GDS_ATOMIC1_PREOP_LO_DEFAULT 0x00000000 3444 #define mmCP_ME_GDS_ATOMIC1_PREOP_LO_DEFAULT 0x00000000 3445 #define mmCP_GDS_ATOMIC1_PREOP_HI_DEFAULT 0x00000000 3446 #define mmCP_ME_GDS_ATOMIC1_PREOP_HI_DEFAULT 0x00000000 3447 #define mmCP_ME_MC_WADDR_LO_DEFAULT 0x00000000 3448 #define mmCP_ME_MC_WADDR_HI_DEFAULT 0x00000000 3449 #define mmCP_ME_MC_WDATA_LO_DEFAULT 0x00000000 3450 #define mmCP_ME_MC_WDATA_HI_DEFAULT 0x00000000 3451 #define mmCP_ME_MC_RADDR_LO_DEFAULT 0x00000000 3452 #define mmCP_ME_MC_RADDR_HI_DEFAULT 0x00000000 3453 #define mmCP_SEM_WAIT_TIMER_DEFAULT 0x00000000 3454 #define mmCP_SIG_SEM_ADDR_LO_DEFAULT 0x00000000 3455 #define mmCP_SIG_SEM_ADDR_HI_DEFAULT 0x00000000 3456 #define mmCP_WAIT_REG_MEM_TIMEOUT_DEFAULT 0x00000000 3457 #define mmCP_WAIT_SEM_ADDR_LO_DEFAULT 0x00000000 3458 #define mmCP_WAIT_SEM_ADDR_HI_DEFAULT 0x00000000 3459 #define mmCP_DMA_PFP_CONTROL_DEFAULT 0x00000000 3460 #define mmCP_DMA_ME_CONTROL_DEFAULT 0x00000000 3461 #define mmCP_COHER_BASE_HI_DEFAULT 0x00000000 3462 #define mmCP_COHER_START_DELAY_DEFAULT 0x00000020 3463 #define mmCP_COHER_CNTL_DEFAULT 0x00000000 3464 #define mmCP_COHER_SIZE_DEFAULT 0x00000000 3465 #define mmCP_COHER_BASE_DEFAULT 0x00000000 3466 #define mmCP_COHER_STATUS_DEFAULT 0x00000000 3467 #define mmCP_DMA_ME_SRC_ADDR_DEFAULT 0x00000000 3468 #define mmCP_DMA_ME_SRC_ADDR_HI_DEFAULT 0x00000000 3469 #define mmCP_DMA_ME_DST_ADDR_DEFAULT 0x00000000 3470 #define mmCP_DMA_ME_DST_ADDR_HI_DEFAULT 0x00000000 3471 #define mmCP_DMA_ME_COMMAND_DEFAULT 0x00000000 3472 #define mmCP_DMA_PFP_SRC_ADDR_DEFAULT 0x00000000 3473 #define mmCP_DMA_PFP_SRC_ADDR_HI_DEFAULT 0x00000000 3474 #define mmCP_DMA_PFP_DST_ADDR_DEFAULT 0x00000000 3475 #define mmCP_DMA_PFP_DST_ADDR_HI_DEFAULT 0x00000000 3476 #define mmCP_DMA_PFP_COMMAND_DEFAULT 0x00000000 3477 #define mmCP_DMA_CNTL_DEFAULT 0x00100020 3478 #define mmCP_DMA_READ_TAGS_DEFAULT 0x00000000 3479 #define mmCP_COHER_SIZE_HI_DEFAULT 0x00000000 3480 #define mmCP_PFP_IB_CONTROL_DEFAULT 0x00000000 3481 #define mmCP_PFP_LOAD_CONTROL_DEFAULT 0x00000000 3482 #define mmCP_SCRATCH_INDEX_DEFAULT 0x00000000 3483 #define mmCP_SCRATCH_DATA_DEFAULT 0x00000000 3484 #define mmCP_RB_OFFSET_DEFAULT 0x00000000 3485 #define mmCP_IB2_OFFSET_DEFAULT 0x00000000 3486 #define mmCP_IB2_PREAMBLE_BEGIN_DEFAULT 0x00000000 3487 #define mmCP_IB2_PREAMBLE_END_DEFAULT 0x00000000 3488 #define mmCP_CE_IB1_OFFSET_DEFAULT 0x00000000 3489 #define mmCP_CE_IB2_OFFSET_DEFAULT 0x00000000 3490 #define mmCP_CE_COUNTER_DEFAULT 0x00000000 3491 #define mmCP_DMA_ME_CMD_ADDR_LO_DEFAULT 0x00000000 3492 #define mmCP_DMA_ME_CMD_ADDR_HI_DEFAULT 0x00000000 3493 #define mmCP_DMA_PFP_CMD_ADDR_LO_DEFAULT 0x00000000 3494 #define mmCP_DMA_PFP_CMD_ADDR_HI_DEFAULT 0x00000000 3495 #define mmCP_APPEND_CMD_ADDR_LO_DEFAULT 0x00000000 3496 #define mmCP_APPEND_CMD_ADDR_HI_DEFAULT 0x00000000 3497 #define mmUCONFIG_RESERVED_REG0_DEFAULT 0x00000000 3498 #define mmUCONFIG_RESERVED_REG1_DEFAULT 0x00000000 3499 #define mmCP_CE_ATOMIC_PREOP_LO_DEFAULT 0x00000000 3500 #define mmCP_CE_ATOMIC_PREOP_HI_DEFAULT 0x00000000 3501 #define mmCP_CE_GDS_ATOMIC0_PREOP_LO_DEFAULT 0x00000000 3502 #define mmCP_CE_GDS_ATOMIC0_PREOP_HI_DEFAULT 0x00000000 3503 #define mmCP_CE_GDS_ATOMIC1_PREOP_LO_DEFAULT 0x00000000 3504 #define mmCP_CE_GDS_ATOMIC1_PREOP_HI_DEFAULT 0x00000000 3505 #define mmCP_CE_INIT_CMD_BUFSZ_DEFAULT 0x00000000 3506 #define mmCP_CE_IB1_CMD_BUFSZ_DEFAULT 0x00000000 3507 #define mmCP_CE_IB2_CMD_BUFSZ_DEFAULT 0x00000000 3508 #define mmCP_IB2_CMD_BUFSZ_DEFAULT 0x00000000 3509 #define mmCP_ST_CMD_BUFSZ_DEFAULT 0x00000000 3510 #define mmCP_CE_INIT_BASE_LO_DEFAULT 0x00000000 3511 #define mmCP_CE_INIT_BASE_HI_DEFAULT 0x00000000 3512 #define mmCP_CE_INIT_BUFSZ_DEFAULT 0x00000000 3513 #define mmCP_CE_IB1_BASE_LO_DEFAULT 0x00000000 3514 #define mmCP_CE_IB1_BASE_HI_DEFAULT 0x00000000 3515 #define mmCP_CE_IB1_BUFSZ_DEFAULT 0x00000000 3516 #define mmCP_CE_IB2_BASE_LO_DEFAULT 0x00000000 3517 #define mmCP_CE_IB2_BASE_HI_DEFAULT 0x00000000 3518 #define mmCP_CE_IB2_BUFSZ_DEFAULT 0x00000000 3519 #define mmCP_IB2_BASE_LO_DEFAULT 0x00000000 3520 #define mmCP_IB2_BASE_HI_DEFAULT 0x00000000 3521 #define mmCP_IB2_BUFSZ_DEFAULT 0x00000000 3522 #define mmCP_ST_BASE_LO_DEFAULT 0x00000000 3523 #define mmCP_ST_BASE_HI_DEFAULT 0x00000000 3524 #define mmCP_ST_BUFSZ_DEFAULT 0x00000000 3525 #define mmCP_EOP_DONE_EVENT_CNTL_DEFAULT 0x00000000 3526 #define mmCP_EOP_DONE_DATA_CNTL_DEFAULT 0x00000000 3527 #define mmCP_EOP_DONE_CNTX_ID_DEFAULT 0x00000000 3528 #define mmCP_DB_BASE_LO_DEFAULT 0x00000000 3529 #define mmCP_DB_BASE_HI_DEFAULT 0x00000000 3530 #define mmCP_DB_BUFSZ_DEFAULT 0x00000000 3531 #define mmCP_DB_CMD_BUFSZ_DEFAULT 0x00000000 3532 #define mmCP_CE_DB_BASE_LO_DEFAULT 0x00000000 3533 #define mmCP_CE_DB_BASE_HI_DEFAULT 0x00000000 3534 #define mmCP_CE_DB_BUFSZ_DEFAULT 0x00000000 3535 #define mmCP_CE_DB_CMD_BUFSZ_DEFAULT 0x00000000 3536 #define mmCP_PFP_COMPLETION_STATUS_DEFAULT 0x00000000 3537 #define mmCP_CE_COMPLETION_STATUS_DEFAULT 0x00000000 3538 #define mmCP_PRED_NOT_VISIBLE_DEFAULT 0x00000000 3539 #define mmCP_PFP_METADATA_BASE_ADDR_DEFAULT 0x00000000 3540 #define mmCP_PFP_METADATA_BASE_ADDR_HI_DEFAULT 0x00000000 3541 #define mmCP_CE_METADATA_BASE_ADDR_DEFAULT 0x00000000 3542 #define mmCP_CE_METADATA_BASE_ADDR_HI_DEFAULT 0x00000000 3543 #define mmCP_DRAW_INDX_INDR_ADDR_DEFAULT 0x00000000 3544 #define mmCP_DRAW_INDX_INDR_ADDR_HI_DEFAULT 0x00000000 3545 #define mmCP_DISPATCH_INDR_ADDR_DEFAULT 0x00000000 3546 #define mmCP_DISPATCH_INDR_ADDR_HI_DEFAULT 0x00000000 3547 #define mmCP_INDEX_BASE_ADDR_DEFAULT 0x00000000 3548 #define mmCP_INDEX_BASE_ADDR_HI_DEFAULT 0x00000000 3549 #define mmCP_INDEX_TYPE_DEFAULT 0x00000000 3550 #define mmCP_GDS_BKUP_ADDR_DEFAULT 0x00000000 3551 #define mmCP_GDS_BKUP_ADDR_HI_DEFAULT 0x00000000 3552 #define mmCP_SAMPLE_STATUS_DEFAULT 0x00000000 3553 #define mmCP_ME_COHER_CNTL_DEFAULT 0x00000000 3554 #define mmCP_ME_COHER_SIZE_DEFAULT 0x00000000 3555 #define mmCP_ME_COHER_SIZE_HI_DEFAULT 0x00000000 3556 #define mmCP_ME_COHER_BASE_DEFAULT 0x00000000 3557 #define mmCP_ME_COHER_BASE_HI_DEFAULT 0x00000000 3558 #define mmCP_ME_COHER_STATUS_DEFAULT 0x00000000 3559 #define mmRLC_GPM_PERF_COUNT_0_DEFAULT 0x00000000 3560 #define mmRLC_GPM_PERF_COUNT_1_DEFAULT 0x00000000 3561 #define mmGRBM_GFX_INDEX_DEFAULT 0xe0000000 3562 #define mmVGT_ESGS_RING_SIZE_UMD_DEFAULT 0x00000000 3563 #define mmVGT_GSVS_RING_SIZE_UMD_DEFAULT 0x00000000 3564 #define mmVGT_PRIMITIVE_TYPE_DEFAULT 0x00000000 3565 #define mmVGT_INDEX_TYPE_DEFAULT 0x00000000 3566 #define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_0_DEFAULT 0x00000000 3567 #define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_1_DEFAULT 0x00000000 3568 #define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_2_DEFAULT 0x00000000 3569 #define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_3_DEFAULT 0x00000000 3570 #define mmGE_MIN_VTX_INDX_DEFAULT 0x00000000 3571 #define mmGE_INDX_OFFSET_DEFAULT 0x00000000 3572 #define mmGE_MULTI_PRIM_IB_RESET_EN_DEFAULT 0x00000000 3573 #define mmVGT_NUM_INDICES_DEFAULT 0x00000000 3574 #define mmVGT_NUM_INSTANCES_DEFAULT 0x00000000 3575 #define mmVGT_TF_RING_SIZE_UMD_DEFAULT 0x0000c000 3576 #define mmVGT_HS_OFFCHIP_PARAM_UMD_DEFAULT 0x00000000 3577 #define mmVGT_TF_MEMORY_BASE_UMD_DEFAULT 0x00000000 3578 #define mmGE_DMA_FIRST_INDEX_DEFAULT 0x00000000 3579 #define mmWD_POS_BUF_BASE_DEFAULT 0x00000000 3580 #define mmWD_POS_BUF_BASE_HI_DEFAULT 0x00000000 3581 #define mmWD_CNTL_SB_BUF_BASE_DEFAULT 0x00000000 3582 #define mmWD_CNTL_SB_BUF_BASE_HI_DEFAULT 0x00000000 3583 #define mmWD_INDEX_BUF_BASE_DEFAULT 0x00000000 3584 #define mmWD_INDEX_BUF_BASE_HI_DEFAULT 0x00000000 3585 #define mmIA_MULTI_VGT_PARAM_PIPED_DEFAULT 0x006000ff 3586 #define mmGE_MAX_VTX_INDX_DEFAULT 0x00000000 3587 #define mmVGT_INSTANCE_BASE_ID_DEFAULT 0x00000000 3588 #define mmGE_CNTL_DEFAULT 0x00000000 3589 #define mmGE_USER_VGPR1_DEFAULT 0x00000000 3590 #define mmGE_USER_VGPR2_DEFAULT 0x00000000 3591 #define mmGE_USER_VGPR3_DEFAULT 0x00000000 3592 #define mmGE_STEREO_CNTL_DEFAULT 0x00000000 3593 #define mmGE_PC_ALLOC_DEFAULT 0x00000000 3594 #define mmVGT_TF_MEMORY_BASE_HI_UMD_DEFAULT 0x00000000 3595 #define mmGE_USER_VGPR_EN_DEFAULT 0x00000000 3596 #define mmPA_SU_LINE_STIPPLE_VALUE_DEFAULT 0x00000000 3597 #define mmPA_SC_LINE_STIPPLE_STATE_DEFAULT 0x00000000 3598 #define mmPA_SC_SCREEN_EXTENT_MIN_0_DEFAULT 0x7fff7fff 3599 #define mmPA_SC_SCREEN_EXTENT_MAX_0_DEFAULT 0x80008000 3600 #define mmPA_SC_SCREEN_EXTENT_MIN_1_DEFAULT 0x7fff7fff 3601 #define mmPA_SC_SCREEN_EXTENT_MAX_1_DEFAULT 0x80008000 3602 #define mmPA_SC_P3D_TRAP_SCREEN_HV_EN_DEFAULT 0x00000000 3603 #define mmPA_SC_P3D_TRAP_SCREEN_H_DEFAULT 0x00000000 3604 #define mmPA_SC_P3D_TRAP_SCREEN_V_DEFAULT 0x00000000 3605 #define mmPA_SC_P3D_TRAP_SCREEN_OCCURRENCE_DEFAULT 0x00000000 3606 #define mmPA_SC_P3D_TRAP_SCREEN_COUNT_DEFAULT 0x00000000 3607 #define mmPA_SC_HP3D_TRAP_SCREEN_HV_EN_DEFAULT 0x00000000 3608 #define mmPA_SC_HP3D_TRAP_SCREEN_H_DEFAULT 0x00000000 3609 #define mmPA_SC_HP3D_TRAP_SCREEN_V_DEFAULT 0x00000000 3610 #define mmPA_SC_HP3D_TRAP_SCREEN_OCCURRENCE_DEFAULT 0x00000000 3611 #define mmPA_SC_HP3D_TRAP_SCREEN_COUNT_DEFAULT 0x00000000 3612 #define mmPA_SC_TRAP_SCREEN_HV_EN_DEFAULT 0x00000000 3613 #define mmPA_SC_TRAP_SCREEN_H_DEFAULT 0x00000000 3614 #define mmPA_SC_TRAP_SCREEN_V_DEFAULT 0x00000000 3615 #define mmPA_SC_TRAP_SCREEN_OCCURRENCE_DEFAULT 0x00000000 3616 #define mmPA_SC_TRAP_SCREEN_COUNT_DEFAULT 0x00000000 3617 #define mmSQ_THREAD_TRACE_USERDATA_0_DEFAULT 0x00000000 3618 #define mmSQ_THREAD_TRACE_USERDATA_1_DEFAULT 0x00000000 3619 #define mmSQ_THREAD_TRACE_USERDATA_2_DEFAULT 0x00000000 3620 #define mmSQ_THREAD_TRACE_USERDATA_3_DEFAULT 0x00000000 3621 #define mmSQ_THREAD_TRACE_USERDATA_4_DEFAULT 0x00000000 3622 #define mmSQ_THREAD_TRACE_USERDATA_5_DEFAULT 0x00000000 3623 #define mmSQ_THREAD_TRACE_USERDATA_6_DEFAULT 0x00000000 3624 #define mmSQ_THREAD_TRACE_USERDATA_7_DEFAULT 0x00000000 3625 #define mmSQC_CACHES_DEFAULT 0x00000000 3626 #define mmTA_CS_BC_BASE_ADDR_DEFAULT 0x00000000 3627 #define mmTA_CS_BC_BASE_ADDR_HI_DEFAULT 0x00000000 3628 #define mmDB_OCCLUSION_COUNT0_LOW_DEFAULT 0x00000000 3629 #define mmDB_OCCLUSION_COUNT0_HI_DEFAULT 0x00000000 3630 #define mmDB_OCCLUSION_COUNT1_LOW_DEFAULT 0x00000000 3631 #define mmDB_OCCLUSION_COUNT1_HI_DEFAULT 0x00000000 3632 #define mmDB_OCCLUSION_COUNT2_LOW_DEFAULT 0x00000000 3633 #define mmDB_OCCLUSION_COUNT2_HI_DEFAULT 0x00000000 3634 #define mmDB_OCCLUSION_COUNT3_LOW_DEFAULT 0x00000000 3635 #define mmDB_OCCLUSION_COUNT3_HI_DEFAULT 0x00000000 3636 #define mmDB_ZPASS_COUNT_LOW_DEFAULT 0x00000000 3637 #define mmDB_ZPASS_COUNT_HI_DEFAULT 0x00000000 3638 #define mmGDS_RD_ADDR_DEFAULT 0x00000000 3639 #define mmGDS_RD_DATA_DEFAULT 0x00000000 3640 #define mmGDS_RD_BURST_ADDR_DEFAULT 0x00000000 3641 #define mmGDS_RD_BURST_COUNT_DEFAULT 0x00000000 3642 #define mmGDS_RD_BURST_DATA_DEFAULT 0x00000000 3643 #define mmGDS_WR_ADDR_DEFAULT 0x00000000 3644 #define mmGDS_WR_DATA_DEFAULT 0x00000000 3645 #define mmGDS_WR_BURST_ADDR_DEFAULT 0x00000000 3646 #define mmGDS_WR_BURST_DATA_DEFAULT 0x00000000 3647 #define mmGDS_WRITE_COMPLETE_DEFAULT 0x00000000 3648 #define mmGDS_ATOM_CNTL_DEFAULT 0x00000000 3649 #define mmGDS_ATOM_COMPLETE_DEFAULT 0x00000001 3650 #define mmGDS_ATOM_BASE_DEFAULT 0x00000000 3651 #define mmGDS_ATOM_SIZE_DEFAULT 0x00000000 3652 #define mmGDS_ATOM_OFFSET0_DEFAULT 0x00000000 3653 #define mmGDS_ATOM_OFFSET1_DEFAULT 0x00000000 3654 #define mmGDS_ATOM_DST_DEFAULT 0x00000000 3655 #define mmGDS_ATOM_OP_DEFAULT 0x00000000 3656 #define mmGDS_ATOM_SRC0_DEFAULT 0x00000000 3657 #define mmGDS_ATOM_SRC0_U_DEFAULT 0x00000000 3658 #define mmGDS_ATOM_SRC1_DEFAULT 0x00000000 3659 #define mmGDS_ATOM_SRC1_U_DEFAULT 0x00000000 3660 #define mmGDS_ATOM_READ0_DEFAULT 0x00000000 3661 #define mmGDS_ATOM_READ0_U_DEFAULT 0x00000000 3662 #define mmGDS_ATOM_READ1_DEFAULT 0x00000000 3663 #define mmGDS_ATOM_READ1_U_DEFAULT 0x00000000 3664 #define mmGDS_GWS_RESOURCE_CNTL_DEFAULT 0x00000000 3665 #define mmGDS_GWS_RESOURCE_DEFAULT 0x00000000 3666 #define mmGDS_GWS_RESOURCE_CNT_DEFAULT 0x00000000 3667 #define mmGDS_OA_CNTL_DEFAULT 0x00000000 3668 #define mmGDS_OA_COUNTER_DEFAULT 0x00000000 3669 #define mmGDS_OA_ADDRESS_DEFAULT 0x00000000 3670 #define mmGDS_OA_INCDEC_DEFAULT 0x00000000 3671 #define mmGDS_OA_RING_SIZE_DEFAULT 0x00000000 3672 #define mmSPI_CONFIG_CNTL_REMAP_DEFAULT 0x00000000 3673 #define mmSPI_CONFIG_CNTL_1_REMAP_DEFAULT 0x00000000 3674 #define mmSPI_CONFIG_CNTL_2_REMAP_DEFAULT 0x00000000 3675 #define mmSPI_WAVE_LIMIT_CNTL_REMAP_DEFAULT 0x00000000 3676 3677 3678 // addressBlock: gc_cprs64dec 3679 #define mmCP_MES_PRGRM_CNTR_START_DEFAULT 0x00000800 3680 #define mmCP_MES_INTR_ROUTINE_START_DEFAULT 0x00000000 3681 #define mmCP_MES_MTVEC_LO_DEFAULT 0x00000000 3682 #define mmCP_MES_MTVEC_HI_DEFAULT 0x00000000 3683 #define mmCP_MES_CNTL_DEFAULT 0x40000000 3684 #define mmCP_MES_PIPE_PRIORITY_CNTS_DEFAULT 0x08081020 3685 #define mmCP_MES_PIPE0_PRIORITY_DEFAULT 0x00000002 3686 #define mmCP_MES_PIPE1_PRIORITY_DEFAULT 0x00000002 3687 #define mmCP_MES_PIPE2_PRIORITY_DEFAULT 0x00000002 3688 #define mmCP_MES_PIPE3_PRIORITY_DEFAULT 0x00000002 3689 #define mmCP_MES_HEADER_DUMP_DEFAULT 0x00000000 3690 #define mmCP_MES_MIE_LO_DEFAULT 0x00000000 3691 #define mmCP_MES_MIE_HI_DEFAULT 0x00000000 3692 #define mmCP_MES_INTERRUPT_DEFAULT 0x00000000 3693 #define mmCP_MES_SCRATCH_INDEX_DEFAULT 0x00000000 3694 #define mmCP_MES_SCRATCH_DATA_DEFAULT 0x00000000 3695 #define mmCP_MES_INSTR_PNTR_DEFAULT 0x00000000 3696 #define mmCP_MES_MSCRATCH_HI_DEFAULT 0x00000000 3697 #define mmCP_MES_MSCRATCH_LO_DEFAULT 0x00000000 3698 #define mmCP_MES_MSTATUS_LO_DEFAULT 0x00000000 3699 #define mmCP_MES_MSTATUS_HI_DEFAULT 0x00000000 3700 #define mmCP_MES_MEPC_LO_DEFAULT 0x00000000 3701 #define mmCP_MES_MEPC_HI_DEFAULT 0x00000000 3702 #define mmCP_MES_MCAUSE_LO_DEFAULT 0x00000000 3703 #define mmCP_MES_MCAUSE_HI_DEFAULT 0x00000000 3704 #define mmCP_MES_MBADADDR_LO_DEFAULT 0x00000000 3705 #define mmCP_MES_MBADADDR_HI_DEFAULT 0x00000000 3706 #define mmCP_MES_MIP_LO_DEFAULT 0x00000000 3707 #define mmCP_MES_MIP_HI_DEFAULT 0x00000000 3708 #define mmCP_MES_IC_OP_CNTL_DEFAULT 0x00000000 3709 #define mmCP_MES_MCYCLE_LO_DEFAULT 0x00000000 3710 #define mmCP_MES_MCYCLE_HI_DEFAULT 0x00000000 3711 #define mmCP_MES_MTIME_LO_DEFAULT 0x00000000 3712 #define mmCP_MES_MTIME_HI_DEFAULT 0x00000000 3713 #define mmCP_MES_MINSTRET_LO_DEFAULT 0x00000000 3714 #define mmCP_MES_MINSTRET_HI_DEFAULT 0x00000000 3715 #define mmCP_MES_MISA_LO_DEFAULT 0x00000000 3716 #define mmCP_MES_MISA_HI_DEFAULT 0x00000000 3717 #define mmCP_MES_MVENDORID_LO_DEFAULT 0x00000000 3718 #define mmCP_MES_MVENDORID_HI_DEFAULT 0x00000000 3719 #define mmCP_MES_MARCHID_LO_DEFAULT 0x00000000 3720 #define mmCP_MES_MARCHID_HI_DEFAULT 0x00000000 3721 #define mmCP_MES_MIMPID_LO_DEFAULT 0x00000000 3722 #define mmCP_MES_MIMPID_HI_DEFAULT 0x00000000 3723 #define mmCP_MES_MHARTID_LO_DEFAULT 0x00000000 3724 #define mmCP_MES_MHARTID_HI_DEFAULT 0x00000000 3725 #define mmCP_MES_DC_BASE_CNTL_DEFAULT 0x00000000 3726 #define mmCP_MES_DC_OP_CNTL_DEFAULT 0x00000000 3727 #define mmCP_MES_MTIMECMP_LO_DEFAULT 0x00000000 3728 #define mmCP_MES_MTIMECMP_HI_DEFAULT 0x00000000 3729 #define mmCP_MES_PROCESS_QUANTUM_PIPE0_DEFAULT 0x00000008 3730 #define mmCP_MES_PROCESS_QUANTUM_PIPE1_DEFAULT 0x00000008 3731 #define mmCP_MES_DOORBELL_CONTROL1_DEFAULT 0x00000000 3732 #define mmCP_MES_DOORBELL_CONTROL2_DEFAULT 0x00000000 3733 #define mmCP_MES_DOORBELL_CONTROL3_DEFAULT 0x00000000 3734 #define mmCP_MES_DOORBELL_CONTROL4_DEFAULT 0x00000000 3735 #define mmCP_MES_DOORBELL_CONTROL5_DEFAULT 0x00000000 3736 #define mmCP_MES_DOORBELL_CONTROL6_DEFAULT 0x00000000 3737 #define mmCP_MES_GP0_LO_DEFAULT 0x00000000 3738 #define mmCP_MES_GP0_HI_DEFAULT 0x00000000 3739 #define mmCP_MES_GP1_LO_DEFAULT 0x00002001 3740 #define mmCP_MES_GP1_HI_DEFAULT 0x00000000 3741 #define mmCP_MES_GP2_LO_DEFAULT 0x00000000 3742 #define mmCP_MES_GP2_HI_DEFAULT 0x00000000 3743 #define mmCP_MES_GP3_LO_DEFAULT 0x00000000 3744 #define mmCP_MES_GP3_HI_DEFAULT 0x00000000 3745 #define mmCP_MES_GP4_LO_DEFAULT 0x00000000 3746 #define mmCP_MES_GP4_HI_DEFAULT 0x00000000 3747 #define mmCP_MES_GP5_LO_DEFAULT 0x00000000 3748 #define mmCP_MES_GP5_HI_DEFAULT 0x00000000 3749 #define mmCP_MES_GP6_LO_DEFAULT 0x00000000 3750 #define mmCP_MES_GP6_HI_DEFAULT 0x00000000 3751 #define mmCP_MES_GP7_LO_DEFAULT 0x00000000 3752 #define mmCP_MES_GP7_HI_DEFAULT 0x00000000 3753 #define mmCP_MES_GP8_LO_DEFAULT 0x00000000 3754 #define mmCP_MES_GP8_HI_DEFAULT 0x00000000 3755 #define mmCP_MES_GP9_LO_DEFAULT 0x40000000 3756 #define mmCP_MES_GP9_HI_DEFAULT 0x40000000 3757 #define mmCP_MES_DM_INDEX_ADDR_DEFAULT 0x00000000 3758 #define mmCP_MES_DM_INDEX_DATA_DEFAULT 0x00000000 3759 #define mmCP_MES_PERFCOUNT_CNTL_DEFAULT 0x00000000 3760 #define mmCP_MES_PENDING_INTERRUPT_DEFAULT 0x00000000 3761 3762 3763 // addressBlock: gc_gusdec 3764 #define mmGUS_IO_RD_COMBINE_FLUSH_DEFAULT 0x00000000 3765 #define mmGUS_IO_WR_COMBINE_FLUSH_DEFAULT 0x00000000 3766 #define mmGUS_IO_RD_PRI_AGE_RATE_DEFAULT 0x00000000 3767 #define mmGUS_IO_WR_PRI_AGE_RATE_DEFAULT 0x00000000 3768 #define mmGUS_IO_RD_PRI_AGE_COEFF_DEFAULT 0x0003ffff 3769 #define mmGUS_IO_WR_PRI_AGE_COEFF_DEFAULT 0x0003ffff 3770 #define mmGUS_IO_RD_PRI_QUEUING_DEFAULT 0x0003ffff 3771 #define mmGUS_IO_WR_PRI_QUEUING_DEFAULT 0x0003ffff 3772 #define mmGUS_IO_RD_PRI_FIXED_DEFAULT 0x00000000 3773 #define mmGUS_IO_WR_PRI_FIXED_DEFAULT 0x00000000 3774 #define mmGUS_IO_RD_PRI_URGENCY_COEFF_DEFAULT 0x00000000 3775 #define mmGUS_IO_WR_PRI_URGENCY_COEFF_DEFAULT 0x00000000 3776 #define mmGUS_IO_RD_PRI_URGENCY_MODE_DEFAULT 0x00000000 3777 #define mmGUS_IO_WR_PRI_URGENCY_MODE_DEFAULT 0x00000000 3778 #define mmGUS_IO_RD_PRI_QUANT_PRI1_DEFAULT 0x1f1f1f1f 3779 #define mmGUS_IO_RD_PRI_QUANT_PRI2_DEFAULT 0x3f3f3f3f 3780 #define mmGUS_IO_RD_PRI_QUANT_PRI3_DEFAULT 0x7f7f7f7f 3781 #define mmGUS_IO_RD_PRI_QUANT_PRI4_DEFAULT 0xffffffff 3782 #define mmGUS_IO_WR_PRI_QUANT_PRI1_DEFAULT 0x1f1f1f1f 3783 #define mmGUS_IO_WR_PRI_QUANT_PRI2_DEFAULT 0x3f3f3f3f 3784 #define mmGUS_IO_WR_PRI_QUANT_PRI3_DEFAULT 0x7f7f7f7f 3785 #define mmGUS_IO_WR_PRI_QUANT_PRI4_DEFAULT 0xffffffff 3786 #define mmGUS_IO_RD_PRI_QUANT1_PRI1_DEFAULT 0x00001f1f 3787 #define mmGUS_IO_RD_PRI_QUANT1_PRI2_DEFAULT 0x00003f3f 3788 #define mmGUS_IO_RD_PRI_QUANT1_PRI3_DEFAULT 0x00007f7f 3789 #define mmGUS_IO_RD_PRI_QUANT1_PRI4_DEFAULT 0x0000ffff 3790 #define mmGUS_IO_WR_PRI_QUANT1_PRI1_DEFAULT 0x00001f1f 3791 #define mmGUS_IO_WR_PRI_QUANT1_PRI2_DEFAULT 0x00003f3f 3792 #define mmGUS_IO_WR_PRI_QUANT1_PRI3_DEFAULT 0x00007f7f 3793 #define mmGUS_IO_WR_PRI_QUANT1_PRI4_DEFAULT 0x0000ffff 3794 #define mmGUS_DRAM_COMBINE_FLUSH_DEFAULT 0x00000000 3795 #define mmGUS_DRAM_COMBINE_RD_WR_EN_DEFAULT 0x00000fff 3796 #define mmGUS_DRAM_PRI_AGE_RATE_DEFAULT 0x00001249 3797 #define mmGUS_DRAM_PRI_AGE_COEFF_DEFAULT 0x0003ffff 3798 #define mmGUS_DRAM_PRI_QUEUING_DEFAULT 0x0003edb6 3799 #define mmGUS_DRAM_PRI_FIXED_DEFAULT 0x00000000 3800 #define mmGUS_DRAM_PRI_URGENCY_COEFF_DEFAULT 0x00000000 3801 #define mmGUS_DRAM_PRI_URGENCY_MODE_DEFAULT 0x00000000 3802 #define mmGUS_DRAM_PRI_QUANT_PRI1_DEFAULT 0x0f0f0f0f 3803 #define mmGUS_DRAM_PRI_QUANT_PRI2_DEFAULT 0x1f1f1f1f 3804 #define mmGUS_DRAM_PRI_QUANT_PRI3_DEFAULT 0x3f3f3f3f 3805 #define mmGUS_DRAM_PRI_QUANT_PRI4_DEFAULT 0x7f7f7f7f 3806 #define mmGUS_DRAM_PRI_QUANT_PRI5_DEFAULT 0xffffffff 3807 #define mmGUS_DRAM_PRI_QUANT1_PRI1_DEFAULT 0x00000f0f 3808 #define mmGUS_DRAM_PRI_QUANT1_PRI2_DEFAULT 0x00001f1f 3809 #define mmGUS_DRAM_PRI_QUANT1_PRI3_DEFAULT 0x00003f3f 3810 #define mmGUS_DRAM_PRI_QUANT1_PRI4_DEFAULT 0x00007f7f 3811 #define mmGUS_DRAM_PRI_QUANT1_PRI5_DEFAULT 0x0000ffff 3812 #define mmGUS_IO_GROUP_BURST_DEFAULT 0x05040504 3813 #define mmGUS_DRAM_GROUP_BURST_DEFAULT 0x00000504 3814 #define mmGUS_SDP_ARB_FINAL_DEFAULT 0x00007fff 3815 #define mmGUS_SDP_QOS_VC_PRIORITY_DEFAULT 0x0000a000 3816 #define mmGUS_SDP_CREDITS_DEFAULT 0x000100ff 3817 #define mmGUS_SDP_TAG_RESERVE0_DEFAULT 0x07070000 3818 #define mmGUS_SDP_TAG_RESERVE1_DEFAULT 0x00000707 3819 #define mmGUS_SDP_VCC_RESERVE0_DEFAULT 0x02041000 3820 #define mmGUS_SDP_VCC_RESERVE1_DEFAULT 0x00000002 3821 #define mmGUS_SDP_VCD_RESERVE0_DEFAULT 0x02040000 3822 #define mmGUS_SDP_VCD_RESERVE1_DEFAULT 0x00000002 3823 #define mmGUS_SDP_REQ_CNTL_DEFAULT 0x0000001f 3824 #define mmGUS_MISC_DEFAULT 0x00003c07 3825 #define mmGUS_LATENCY_SAMPLING_DEFAULT 0x00000000 3826 #define mmGUS_ERR_STATUS_DEFAULT 0x00000300 3827 #define mmGUS_MISC2_DEFAULT 0x000017fe 3828 #define mmGUS_SDP_ENABLE_DEFAULT 0x00000000 3829 #define mmGUS_L1_CH0_CMD_IN_DEFAULT 0x00000000 3830 #define mmGUS_L1_CH0_CMD_OUT_DEFAULT 0x00000000 3831 #define mmGUS_L1_CH0_DATA_IN_DEFAULT 0x00000000 3832 #define mmGUS_L1_CH0_DATA_OUT_DEFAULT 0x00000000 3833 #define mmGUS_L1_CH0_DATA_U_IN_DEFAULT 0x00000000 3834 #define mmGUS_L1_CH0_DATA_U_OUT_DEFAULT 0x00000000 3835 #define mmGUS_L1_CH1_CMD_IN_DEFAULT 0x00000000 3836 #define mmGUS_L1_CH1_CMD_OUT_DEFAULT 0x00000000 3837 #define mmGUS_L1_CH1_DATA_IN_DEFAULT 0x00000000 3838 #define mmGUS_L1_CH1_DATA_OUT_DEFAULT 0x00000000 3839 #define mmGUS_L1_CH1_DATA_U_IN_DEFAULT 0x00000000 3840 #define mmGUS_L1_CH1_DATA_U_OUT_DEFAULT 0x00000000 3841 #define mmGUS_L1_SA0_CMD_IN_DEFAULT 0x00000000 3842 #define mmGUS_L1_SA0_CMD_OUT_DEFAULT 0x00000000 3843 #define mmGUS_L1_SA0_DATA_IN_DEFAULT 0x00000000 3844 #define mmGUS_L1_SA0_DATA_OUT_DEFAULT 0x00000000 3845 #define mmGUS_L1_SA0_DATA_U_IN_DEFAULT 0x00000000 3846 #define mmGUS_L1_SA0_DATA_U_OUT_DEFAULT 0x00000000 3847 #define mmGUS_L1_SA1_CMD_IN_DEFAULT 0x00000000 3848 #define mmGUS_L1_SA1_CMD_OUT_DEFAULT 0x00000000 3849 #define mmGUS_L1_SA1_DATA_IN_DEFAULT 0x00000000 3850 #define mmGUS_L1_SA1_DATA_OUT_DEFAULT 0x00000000 3851 #define mmGUS_L1_SA1_DATA_U_IN_DEFAULT 0x00000000 3852 #define mmGUS_L1_SA1_DATA_U_OUT_DEFAULT 0x00000000 3853 #define mmGUS_L1_SA2_CMD_IN_DEFAULT 0x00000000 3854 #define mmGUS_L1_SA2_CMD_OUT_DEFAULT 0x00000000 3855 #define mmGUS_L1_SA2_DATA_IN_DEFAULT 0x00000000 3856 #define mmGUS_L1_SA2_DATA_OUT_DEFAULT 0x00000000 3857 #define mmGUS_L1_SA2_DATA_U_IN_DEFAULT 0x00000000 3858 #define mmGUS_L1_SA2_DATA_U_OUT_DEFAULT 0x00000000 3859 #define mmGUS_L1_SA3_CMD_IN_DEFAULT 0x00000000 3860 #define mmGUS_L1_SA3_CMD_OUT_DEFAULT 0x00000000 3861 #define mmGUS_L1_SA3_DATA_IN_DEFAULT 0x00000000 3862 #define mmGUS_L1_SA3_DATA_OUT_DEFAULT 0x00000000 3863 #define mmGUS_L1_SA3_DATA_U_IN_DEFAULT 0x00000000 3864 #define mmGUS_L1_SA3_DATA_U_OUT_DEFAULT 0x00000000 3865 #define mmGUS_MISC3_DEFAULT 0x00000000 3866 #define mmGUS_WRRSP_FIFO_CNTL_DEFAULT 0x0000000a 3867 3868 3869 // addressBlock: gc_gl1dec 3870 #define mmGL1_DRAM_BURST_MASK_DEFAULT 0x000000cf 3871 #define mmGL1_ARB_STATUS_DEFAULT 0x00000000 3872 #define mmGL1_PIPE_STEER_DEFAULT 0x0000008d 3873 #define mmGL1C_STATUS_DEFAULT 0x80000000 3874 #define mmGL1C_UTCL0_CNTL2_DEFAULT 0x00000000 3875 #define mmGL1C_UTCL0_STATUS_DEFAULT 0x00000000 3876 #define mmGL1C_UTCL0_RETRY_DEFAULT 0x00000040 3877 3878 3879 // addressBlock: gc_chdec 3880 #define mmCH_ARB_CTRL_DEFAULT 0x00000002 3881 #define mmCH_DRAM_BURST_MASK_DEFAULT 0x000000cf 3882 #define mmCH_ARB_STATUS_DEFAULT 0x00000000 3883 #define mmCH_DRAM_BURST_CTRL_DEFAULT 0x000001f7 3884 #define mmCHA_CHC_CREDITS_DEFAULT 0x00000000 3885 #define mmCHA_CLIENT_FREE_DELAY_DEFAULT 0x00000000 3886 #define mmCH_PIPE_STEER_DEFAULT 0x0000008d 3887 #define mmCH_VC5_ENABLE_DEFAULT 0x00000000 3888 #define mmCHC_CTRL_DEFAULT 0x0001428f 3889 #define mmCHC_STATUS_DEFAULT 0x00000000 3890 #define mmCHCG_CTRL_DEFAULT 0x001830ff 3891 #define mmCHCG_STATUS_DEFAULT 0x00000000 3892 3893 3894 // addressBlock: gc_gl2dec 3895 #define mmGL2C_CTRL_DEFAULT 0xf37fff7f 3896 #define mmGL2C_CTRL2_DEFAULT 0x1402002f 3897 #define mmGL2C_ADDR_MATCH_MASK_DEFAULT 0xffffffff 3898 #define mmGL2C_ADDR_MATCH_SIZE_DEFAULT 0x00000007 3899 #define mmGL2C_WBINVL2_DEFAULT 0x00000010 3900 #define mmGL2C_SOFT_RESET_DEFAULT 0x00000000 3901 #define mmGL2C_CM_CTRL0_DEFAULT 0x42108421 3902 #define mmGL2C_CM_CTRL1_DEFAULT 0x180f1008 3903 #define mmGL2C_CM_STALL_DEFAULT 0x00000000 3904 #define mmGL2C_MDC_PF_FLAG_CTRL_DEFAULT 0x00010000 3905 #define mmGL2C_LB_CTR_CTRL_DEFAULT 0x00000000 3906 #define mmGL2C_LB_DATA0_DEFAULT 0x00000000 3907 #define mmGL2C_LB_DATA1_DEFAULT 0x00000000 3908 #define mmGL2C_LB_DATA2_DEFAULT 0x00000000 3909 #define mmGL2C_LB_DATA3_DEFAULT 0x00000000 3910 #define mmGL2C_LB_CTR_SEL0_DEFAULT 0x00000000 3911 #define mmGL2C_LB_CTR_SEL1_DEFAULT 0x00000000 3912 #define mmGL2A_ADDR_MATCH_CTRL_DEFAULT 0x00000000 3913 #define mmGL2A_ADDR_MATCH_MASK_DEFAULT 0xffffffff 3914 #define mmGL2A_ADDR_MATCH_SIZE_DEFAULT 0x00000007 3915 #define mmGL2A_PRIORITY_CTRL_DEFAULT 0x00000000 3916 #define mmGL2_PIPE_STEER_0_DEFAULT 0x32103210 3917 #define mmGL2_PIPE_STEER_1_DEFAULT 0x32103210 3918 3919 3920 // addressBlock: gc_perfddec 3921 #define mmCPG_PERFCOUNTER1_LO_DEFAULT 0x00000000 3922 #define mmCPG_PERFCOUNTER1_HI_DEFAULT 0x00000000 3923 #define mmCPG_PERFCOUNTER0_LO_DEFAULT 0x00000000 3924 #define mmCPG_PERFCOUNTER0_HI_DEFAULT 0x00000000 3925 #define mmCPC_PERFCOUNTER1_LO_DEFAULT 0x00000000 3926 #define mmCPC_PERFCOUNTER1_HI_DEFAULT 0x00000000 3927 #define mmCPC_PERFCOUNTER0_LO_DEFAULT 0x00000000 3928 #define mmCPC_PERFCOUNTER0_HI_DEFAULT 0x00000000 3929 #define mmCPF_PERFCOUNTER1_LO_DEFAULT 0x00000000 3930 #define mmCPF_PERFCOUNTER1_HI_DEFAULT 0x00000000 3931 #define mmCPF_PERFCOUNTER0_LO_DEFAULT 0x00000000 3932 #define mmCPF_PERFCOUNTER0_HI_DEFAULT 0x00000000 3933 #define mmCPF_LATENCY_STATS_DATA_DEFAULT 0x00000000 3934 #define mmCPG_LATENCY_STATS_DATA_DEFAULT 0x00000000 3935 #define mmCPC_LATENCY_STATS_DATA_DEFAULT 0x00000000 3936 #define mmGRBM_PERFCOUNTER0_LO_DEFAULT 0x00000000 3937 #define mmGRBM_PERFCOUNTER0_HI_DEFAULT 0x00000000 3938 #define mmGRBM_PERFCOUNTER1_LO_DEFAULT 0x00000000 3939 #define mmGRBM_PERFCOUNTER1_HI_DEFAULT 0x00000000 3940 #define mmGRBM_SE0_PERFCOUNTER_LO_DEFAULT 0x00000000 3941 #define mmGRBM_SE0_PERFCOUNTER_HI_DEFAULT 0x00000000 3942 #define mmGRBM_SE1_PERFCOUNTER_LO_DEFAULT 0x00000000 3943 #define mmGRBM_SE1_PERFCOUNTER_HI_DEFAULT 0x00000000 3944 #define mmGRBM_SE2_PERFCOUNTER_LO_DEFAULT 0x00000000 3945 #define mmGRBM_SE2_PERFCOUNTER_HI_DEFAULT 0x00000000 3946 #define mmGRBM_SE3_PERFCOUNTER_LO_DEFAULT 0x00000000 3947 #define mmGRBM_SE3_PERFCOUNTER_HI_DEFAULT 0x00000000 3948 #define mmGE1_PERFCOUNTER0_LO_DEFAULT 0x00000000 3949 #define mmGE1_PERFCOUNTER0_HI_DEFAULT 0x00000000 3950 #define mmGE1_PERFCOUNTER1_LO_DEFAULT 0x00000000 3951 #define mmGE1_PERFCOUNTER1_HI_DEFAULT 0x00000000 3952 #define mmGE1_PERFCOUNTER2_LO_DEFAULT 0x00000000 3953 #define mmGE1_PERFCOUNTER2_HI_DEFAULT 0x00000000 3954 #define mmGE1_PERFCOUNTER3_LO_DEFAULT 0x00000000 3955 #define mmGE1_PERFCOUNTER3_HI_DEFAULT 0x00000000 3956 #define mmGE2_DIST_PERFCOUNTER0_LO_DEFAULT 0x00000000 3957 #define mmGE2_DIST_PERFCOUNTER0_HI_DEFAULT 0x00000000 3958 #define mmGE2_DIST_PERFCOUNTER1_LO_DEFAULT 0x00000000 3959 #define mmGE2_DIST_PERFCOUNTER1_HI_DEFAULT 0x00000000 3960 #define mmGE2_DIST_PERFCOUNTER2_LO_DEFAULT 0x00000000 3961 #define mmGE2_DIST_PERFCOUNTER2_HI_DEFAULT 0x00000000 3962 #define mmGE2_DIST_PERFCOUNTER3_LO_DEFAULT 0x00000000 3963 #define mmGE2_DIST_PERFCOUNTER3_HI_DEFAULT 0x00000000 3964 #define mmGE2_SE_PERFCOUNTER0_LO_DEFAULT 0x00000000 3965 #define mmGE2_SE_PERFCOUNTER0_HI_DEFAULT 0x00000000 3966 #define mmGE2_SE_PERFCOUNTER1_LO_DEFAULT 0x00000000 3967 #define mmGE2_SE_PERFCOUNTER1_HI_DEFAULT 0x00000000 3968 #define mmGE2_SE_PERFCOUNTER2_LO_DEFAULT 0x00000000 3969 #define mmGE2_SE_PERFCOUNTER2_HI_DEFAULT 0x00000000 3970 #define mmGE2_SE_PERFCOUNTER3_LO_DEFAULT 0x00000000 3971 #define mmGE2_SE_PERFCOUNTER3_HI_DEFAULT 0x00000000 3972 #define mmPA_SU_PERFCOUNTER0_LO_DEFAULT 0x00000000 3973 #define mmPA_SU_PERFCOUNTER0_HI_DEFAULT 0x00000000 3974 #define mmPA_SU_PERFCOUNTER1_LO_DEFAULT 0x00000000 3975 #define mmPA_SU_PERFCOUNTER1_HI_DEFAULT 0x00000000 3976 #define mmPA_SU_PERFCOUNTER2_LO_DEFAULT 0x00000000 3977 #define mmPA_SU_PERFCOUNTER2_HI_DEFAULT 0x00000000 3978 #define mmPA_SU_PERFCOUNTER3_LO_DEFAULT 0x00000000 3979 #define mmPA_SU_PERFCOUNTER3_HI_DEFAULT 0x00000000 3980 #define mmPA_SC_PERFCOUNTER0_LO_DEFAULT 0x00000000 3981 #define mmPA_SC_PERFCOUNTER0_HI_DEFAULT 0x00000000 3982 #define mmPA_SC_PERFCOUNTER1_LO_DEFAULT 0x00000000 3983 #define mmPA_SC_PERFCOUNTER1_HI_DEFAULT 0x00000000 3984 #define mmPA_SC_PERFCOUNTER2_LO_DEFAULT 0x00000000 3985 #define mmPA_SC_PERFCOUNTER2_HI_DEFAULT 0x00000000 3986 #define mmPA_SC_PERFCOUNTER3_LO_DEFAULT 0x00000000 3987 #define mmPA_SC_PERFCOUNTER3_HI_DEFAULT 0x00000000 3988 #define mmPA_SC_PERFCOUNTER4_LO_DEFAULT 0x00000000 3989 #define mmPA_SC_PERFCOUNTER4_HI_DEFAULT 0x00000000 3990 #define mmPA_SC_PERFCOUNTER5_LO_DEFAULT 0x00000000 3991 #define mmPA_SC_PERFCOUNTER5_HI_DEFAULT 0x00000000 3992 #define mmPA_SC_PERFCOUNTER6_LO_DEFAULT 0x00000000 3993 #define mmPA_SC_PERFCOUNTER6_HI_DEFAULT 0x00000000 3994 #define mmPA_SC_PERFCOUNTER7_LO_DEFAULT 0x00000000 3995 #define mmPA_SC_PERFCOUNTER7_HI_DEFAULT 0x00000000 3996 #define mmSPI_PERFCOUNTER0_HI_DEFAULT 0x00000000 3997 #define mmSPI_PERFCOUNTER0_LO_DEFAULT 0x00000000 3998 #define mmSPI_PERFCOUNTER1_HI_DEFAULT 0x00000000 3999 #define mmSPI_PERFCOUNTER1_LO_DEFAULT 0x00000000 4000 #define mmSPI_PERFCOUNTER2_HI_DEFAULT 0x00000000 4001 #define mmSPI_PERFCOUNTER2_LO_DEFAULT 0x00000000 4002 #define mmSPI_PERFCOUNTER3_HI_DEFAULT 0x00000000 4003 #define mmSPI_PERFCOUNTER3_LO_DEFAULT 0x00000000 4004 #define mmSPI_PERFCOUNTER4_HI_DEFAULT 0x00000000 4005 #define mmSPI_PERFCOUNTER4_LO_DEFAULT 0x00000000 4006 #define mmSPI_PERFCOUNTER5_HI_DEFAULT 0x00000000 4007 #define mmSPI_PERFCOUNTER5_LO_DEFAULT 0x00000000 4008 #define mmSQ_PERFCOUNTER0_LO_DEFAULT 0x00000000 4009 #define mmSQ_PERFCOUNTER0_HI_DEFAULT 0x00000000 4010 #define mmSQ_PERFCOUNTER1_LO_DEFAULT 0x00000000 4011 #define mmSQ_PERFCOUNTER1_HI_DEFAULT 0x00000000 4012 #define mmSQ_PERFCOUNTER2_LO_DEFAULT 0x00000000 4013 #define mmSQ_PERFCOUNTER2_HI_DEFAULT 0x00000000 4014 #define mmSQ_PERFCOUNTER3_LO_DEFAULT 0x00000000 4015 #define mmSQ_PERFCOUNTER3_HI_DEFAULT 0x00000000 4016 #define mmSQ_PERFCOUNTER4_LO_DEFAULT 0x00000000 4017 #define mmSQ_PERFCOUNTER4_HI_DEFAULT 0x00000000 4018 #define mmSQ_PERFCOUNTER5_LO_DEFAULT 0x00000000 4019 #define mmSQ_PERFCOUNTER5_HI_DEFAULT 0x00000000 4020 #define mmSQ_PERFCOUNTER6_LO_DEFAULT 0x00000000 4021 #define mmSQ_PERFCOUNTER6_HI_DEFAULT 0x00000000 4022 #define mmSQ_PERFCOUNTER7_LO_DEFAULT 0x00000000 4023 #define mmSQ_PERFCOUNTER7_HI_DEFAULT 0x00000000 4024 #define mmSQ_PERFCOUNTER8_LO_DEFAULT 0x00000000 4025 #define mmSQ_PERFCOUNTER8_HI_DEFAULT 0x00000000 4026 #define mmSQ_PERFCOUNTER9_LO_DEFAULT 0x00000000 4027 #define mmSQ_PERFCOUNTER9_HI_DEFAULT 0x00000000 4028 #define mmSQ_PERFCOUNTER10_LO_DEFAULT 0x00000000 4029 #define mmSQ_PERFCOUNTER10_HI_DEFAULT 0x00000000 4030 #define mmSQ_PERFCOUNTER11_LO_DEFAULT 0x00000000 4031 #define mmSQ_PERFCOUNTER11_HI_DEFAULT 0x00000000 4032 #define mmSQ_PERFCOUNTER12_LO_DEFAULT 0x00000000 4033 #define mmSQ_PERFCOUNTER12_HI_DEFAULT 0x00000000 4034 #define mmSQ_PERFCOUNTER13_LO_DEFAULT 0x00000000 4035 #define mmSQ_PERFCOUNTER13_HI_DEFAULT 0x00000000 4036 #define mmSQ_PERFCOUNTER14_LO_DEFAULT 0x00000000 4037 #define mmSQ_PERFCOUNTER14_HI_DEFAULT 0x00000000 4038 #define mmSQ_PERFCOUNTER15_LO_DEFAULT 0x00000000 4039 #define mmSQ_PERFCOUNTER15_HI_DEFAULT 0x00000000 4040 #define mmSX_PERFCOUNTER0_LO_DEFAULT 0x00000000 4041 #define mmSX_PERFCOUNTER0_HI_DEFAULT 0x00000000 4042 #define mmSX_PERFCOUNTER1_LO_DEFAULT 0x00000000 4043 #define mmSX_PERFCOUNTER1_HI_DEFAULT 0x00000000 4044 #define mmSX_PERFCOUNTER2_LO_DEFAULT 0x00000000 4045 #define mmSX_PERFCOUNTER2_HI_DEFAULT 0x00000000 4046 #define mmSX_PERFCOUNTER3_LO_DEFAULT 0x00000000 4047 #define mmSX_PERFCOUNTER3_HI_DEFAULT 0x00000000 4048 #define mmGCEA_PERFCOUNTER2_LO_DEFAULT 0x00000000 4049 #define mmGCEA_PERFCOUNTER2_HI_DEFAULT 0x00000000 4050 #define mmGCEA_PERFCOUNTER_LO_DEFAULT 0x00000000 4051 #define mmGCEA_PERFCOUNTER_HI_DEFAULT 0x00000000 4052 #define mmGDS_PERFCOUNTER0_LO_DEFAULT 0x00000000 4053 #define mmGDS_PERFCOUNTER0_HI_DEFAULT 0x00000000 4054 #define mmGDS_PERFCOUNTER1_LO_DEFAULT 0x00000000 4055 #define mmGDS_PERFCOUNTER1_HI_DEFAULT 0x00000000 4056 #define mmGDS_PERFCOUNTER2_LO_DEFAULT 0x00000000 4057 #define mmGDS_PERFCOUNTER2_HI_DEFAULT 0x00000000 4058 #define mmGDS_PERFCOUNTER3_LO_DEFAULT 0x00000000 4059 #define mmGDS_PERFCOUNTER3_HI_DEFAULT 0x00000000 4060 #define mmTA_PERFCOUNTER0_LO_DEFAULT 0x00000000 4061 #define mmTA_PERFCOUNTER0_HI_DEFAULT 0x00000000 4062 #define mmTA_PERFCOUNTER1_LO_DEFAULT 0x00000000 4063 #define mmTA_PERFCOUNTER1_HI_DEFAULT 0x00000000 4064 #define mmTD_PERFCOUNTER0_LO_DEFAULT 0x00000000 4065 #define mmTD_PERFCOUNTER0_HI_DEFAULT 0x00000000 4066 #define mmTD_PERFCOUNTER1_LO_DEFAULT 0x00000000 4067 #define mmTD_PERFCOUNTER1_HI_DEFAULT 0x00000000 4068 #define mmTCP_PERFCOUNTER0_LO_DEFAULT 0x00000000 4069 #define mmTCP_PERFCOUNTER0_HI_DEFAULT 0x00000000 4070 #define mmTCP_PERFCOUNTER1_LO_DEFAULT 0x00000000 4071 #define mmTCP_PERFCOUNTER1_HI_DEFAULT 0x00000000 4072 #define mmTCP_PERFCOUNTER2_LO_DEFAULT 0x00000000 4073 #define mmTCP_PERFCOUNTER2_HI_DEFAULT 0x00000000 4074 #define mmTCP_PERFCOUNTER3_LO_DEFAULT 0x00000000 4075 #define mmTCP_PERFCOUNTER3_HI_DEFAULT 0x00000000 4076 #define mmGL2C_PERFCOUNTER0_LO_DEFAULT 0x00000000 4077 #define mmGL2C_PERFCOUNTER0_HI_DEFAULT 0x00000000 4078 #define mmGL2C_PERFCOUNTER1_LO_DEFAULT 0x00000000 4079 #define mmGL2C_PERFCOUNTER1_HI_DEFAULT 0x00000000 4080 #define mmGL2C_PERFCOUNTER2_LO_DEFAULT 0x00000000 4081 #define mmGL2C_PERFCOUNTER2_HI_DEFAULT 0x00000000 4082 #define mmGL2C_PERFCOUNTER3_LO_DEFAULT 0x00000000 4083 #define mmGL2C_PERFCOUNTER3_HI_DEFAULT 0x00000000 4084 #define mmGL2A_PERFCOUNTER0_LO_DEFAULT 0x00000000 4085 #define mmGL2A_PERFCOUNTER0_HI_DEFAULT 0x00000000 4086 #define mmGL2A_PERFCOUNTER1_LO_DEFAULT 0x00000000 4087 #define mmGL2A_PERFCOUNTER1_HI_DEFAULT 0x00000000 4088 #define mmGL2A_PERFCOUNTER2_LO_DEFAULT 0x00000000 4089 #define mmGL2A_PERFCOUNTER2_HI_DEFAULT 0x00000000 4090 #define mmGL2A_PERFCOUNTER3_LO_DEFAULT 0x00000000 4091 #define mmGL2A_PERFCOUNTER3_HI_DEFAULT 0x00000000 4092 #define mmGL1C_PERFCOUNTER0_LO_DEFAULT 0x00000000 4093 #define mmGL1C_PERFCOUNTER0_HI_DEFAULT 0x00000000 4094 #define mmGL1C_PERFCOUNTER1_LO_DEFAULT 0x00000000 4095 #define mmGL1C_PERFCOUNTER1_HI_DEFAULT 0x00000000 4096 #define mmGL1C_PERFCOUNTER2_LO_DEFAULT 0x00000000 4097 #define mmGL1C_PERFCOUNTER2_HI_DEFAULT 0x00000000 4098 #define mmGL1C_PERFCOUNTER3_LO_DEFAULT 0x00000000 4099 #define mmGL1C_PERFCOUNTER3_HI_DEFAULT 0x00000000 4100 #define mmCHC_PERFCOUNTER0_LO_DEFAULT 0x00000000 4101 #define mmCHC_PERFCOUNTER0_HI_DEFAULT 0x00000000 4102 #define mmCHC_PERFCOUNTER1_LO_DEFAULT 0x00000000 4103 #define mmCHC_PERFCOUNTER1_HI_DEFAULT 0x00000000 4104 #define mmCHC_PERFCOUNTER2_LO_DEFAULT 0x00000000 4105 #define mmCHC_PERFCOUNTER2_HI_DEFAULT 0x00000000 4106 #define mmCHC_PERFCOUNTER3_LO_DEFAULT 0x00000000 4107 #define mmCHC_PERFCOUNTER3_HI_DEFAULT 0x00000000 4108 #define mmCHCG_PERFCOUNTER0_LO_DEFAULT 0x00000000 4109 #define mmCHCG_PERFCOUNTER0_HI_DEFAULT 0x00000000 4110 #define mmCHCG_PERFCOUNTER1_LO_DEFAULT 0x00000000 4111 #define mmCHCG_PERFCOUNTER1_HI_DEFAULT 0x00000000 4112 #define mmCHCG_PERFCOUNTER2_LO_DEFAULT 0x00000000 4113 #define mmCHCG_PERFCOUNTER2_HI_DEFAULT 0x00000000 4114 #define mmCHCG_PERFCOUNTER3_LO_DEFAULT 0x00000000 4115 #define mmCHCG_PERFCOUNTER3_HI_DEFAULT 0x00000000 4116 #define mmCB_PERFCOUNTER0_LO_DEFAULT 0x00000000 4117 #define mmCB_PERFCOUNTER0_HI_DEFAULT 0x00000000 4118 #define mmCB_PERFCOUNTER1_LO_DEFAULT 0x00000000 4119 #define mmCB_PERFCOUNTER1_HI_DEFAULT 0x00000000 4120 #define mmCB_PERFCOUNTER2_LO_DEFAULT 0x00000000 4121 #define mmCB_PERFCOUNTER2_HI_DEFAULT 0x00000000 4122 #define mmCB_PERFCOUNTER3_LO_DEFAULT 0x00000000 4123 #define mmCB_PERFCOUNTER3_HI_DEFAULT 0x00000000 4124 #define mmDB_PERFCOUNTER0_LO_DEFAULT 0x00000000 4125 #define mmDB_PERFCOUNTER0_HI_DEFAULT 0x00000000 4126 #define mmDB_PERFCOUNTER1_LO_DEFAULT 0x00000000 4127 #define mmDB_PERFCOUNTER1_HI_DEFAULT 0x00000000 4128 #define mmDB_PERFCOUNTER2_LO_DEFAULT 0x00000000 4129 #define mmDB_PERFCOUNTER2_HI_DEFAULT 0x00000000 4130 #define mmDB_PERFCOUNTER3_LO_DEFAULT 0x00000000 4131 #define mmDB_PERFCOUNTER3_HI_DEFAULT 0x00000000 4132 #define mmRLC_PERFCOUNTER0_LO_DEFAULT 0x00000000 4133 #define mmRLC_PERFCOUNTER0_HI_DEFAULT 0x00000000 4134 #define mmRLC_PERFCOUNTER1_LO_DEFAULT 0x00000000 4135 #define mmRLC_PERFCOUNTER1_HI_DEFAULT 0x00000000 4136 #define mmRMI_PERFCOUNTER0_LO_DEFAULT 0x00000000 4137 #define mmRMI_PERFCOUNTER0_HI_DEFAULT 0x00000000 4138 #define mmRMI_PERFCOUNTER1_LO_DEFAULT 0x00000000 4139 #define mmRMI_PERFCOUNTER1_HI_DEFAULT 0x00000000 4140 #define mmRMI_PERFCOUNTER2_LO_DEFAULT 0x00000000 4141 #define mmRMI_PERFCOUNTER2_HI_DEFAULT 0x00000000 4142 #define mmRMI_PERFCOUNTER3_LO_DEFAULT 0x00000000 4143 #define mmRMI_PERFCOUNTER3_HI_DEFAULT 0x00000000 4144 #define mmUTCL1_PERFCOUNTER0_LO_DEFAULT 0x00000000 4145 #define mmUTCL1_PERFCOUNTER0_HI_DEFAULT 0x00000000 4146 #define mmUTCL1_PERFCOUNTER1_LO_DEFAULT 0x00000000 4147 #define mmUTCL1_PERFCOUNTER1_HI_DEFAULT 0x00000000 4148 #define mmGCR_PERFCOUNTER0_LO_DEFAULT 0x00000000 4149 #define mmGCR_PERFCOUNTER0_HI_DEFAULT 0x00000000 4150 #define mmGCR_PERFCOUNTER1_LO_DEFAULT 0x00000000 4151 #define mmGCR_PERFCOUNTER1_HI_DEFAULT 0x00000000 4152 #define mmPA_PH_PERFCOUNTER0_LO_DEFAULT 0x00000000 4153 #define mmPA_PH_PERFCOUNTER0_HI_DEFAULT 0x00000000 4154 #define mmPA_PH_PERFCOUNTER1_LO_DEFAULT 0x00000000 4155 #define mmPA_PH_PERFCOUNTER1_HI_DEFAULT 0x00000000 4156 #define mmPA_PH_PERFCOUNTER2_LO_DEFAULT 0x00000000 4157 #define mmPA_PH_PERFCOUNTER2_HI_DEFAULT 0x00000000 4158 #define mmPA_PH_PERFCOUNTER3_LO_DEFAULT 0x00000000 4159 #define mmPA_PH_PERFCOUNTER3_HI_DEFAULT 0x00000000 4160 #define mmPA_PH_PERFCOUNTER4_LO_DEFAULT 0x00000000 4161 #define mmPA_PH_PERFCOUNTER4_HI_DEFAULT 0x00000000 4162 #define mmPA_PH_PERFCOUNTER5_LO_DEFAULT 0x00000000 4163 #define mmPA_PH_PERFCOUNTER5_HI_DEFAULT 0x00000000 4164 #define mmPA_PH_PERFCOUNTER6_LO_DEFAULT 0x00000000 4165 #define mmPA_PH_PERFCOUNTER6_HI_DEFAULT 0x00000000 4166 #define mmPA_PH_PERFCOUNTER7_LO_DEFAULT 0x00000000 4167 #define mmPA_PH_PERFCOUNTER7_HI_DEFAULT 0x00000000 4168 #define mmGL1A_PERFCOUNTER0_LO_DEFAULT 0x00000000 4169 #define mmGL1A_PERFCOUNTER0_HI_DEFAULT 0x00000000 4170 #define mmGL1A_PERFCOUNTER1_LO_DEFAULT 0x00000000 4171 #define mmGL1A_PERFCOUNTER1_HI_DEFAULT 0x00000000 4172 #define mmGL1A_PERFCOUNTER2_LO_DEFAULT 0x00000000 4173 #define mmGL1A_PERFCOUNTER2_HI_DEFAULT 0x00000000 4174 #define mmGL1A_PERFCOUNTER3_LO_DEFAULT 0x00000000 4175 #define mmGL1A_PERFCOUNTER3_HI_DEFAULT 0x00000000 4176 #define mmCHA_PERFCOUNTER0_LO_DEFAULT 0x00000000 4177 #define mmCHA_PERFCOUNTER0_HI_DEFAULT 0x00000000 4178 #define mmCHA_PERFCOUNTER1_LO_DEFAULT 0x00000000 4179 #define mmCHA_PERFCOUNTER1_HI_DEFAULT 0x00000000 4180 #define mmCHA_PERFCOUNTER2_LO_DEFAULT 0x00000000 4181 #define mmCHA_PERFCOUNTER2_HI_DEFAULT 0x00000000 4182 #define mmCHA_PERFCOUNTER3_LO_DEFAULT 0x00000000 4183 #define mmCHA_PERFCOUNTER3_HI_DEFAULT 0x00000000 4184 #define mmGUS_PERFCOUNTER2_LO_DEFAULT 0x00000000 4185 #define mmGUS_PERFCOUNTER2_HI_DEFAULT 0x00000000 4186 #define mmGUS_PERFCOUNTER_LO_DEFAULT 0x00000000 4187 #define mmGUS_PERFCOUNTER_HI_DEFAULT 0x00000000 4188 4189 4190 // addressBlock: gc_gcvml2prdec 4191 #define mmGCMC_VM_L2_PERFCOUNTER_LO_DEFAULT 0x00000000 4192 #define mmGCMC_VM_L2_PERFCOUNTER_HI_DEFAULT 0x00000000 4193 #define mmGCUTCL2_PERFCOUNTER_LO_DEFAULT 0x00000000 4194 #define mmGCUTCL2_PERFCOUNTER_HI_DEFAULT 0x00000000 4195 4196 4197 // addressBlock: gc_gcvml2perfddec 4198 #define mmGCVML2_PERFCOUNTER2_0_LO_DEFAULT 0x00000000 4199 #define mmGCVML2_PERFCOUNTER2_1_LO_DEFAULT 0x00000000 4200 #define mmGCVML2_PERFCOUNTER2_0_HI_DEFAULT 0x00000000 4201 #define mmGCVML2_PERFCOUNTER2_1_HI_DEFAULT 0x00000000 4202 4203 4204 // addressBlock: gc_sdma0_sdma0perfddec 4205 #define mmSDMA0_PERFCNT_PERFCOUNTER_LO_DEFAULT 0x00000000 4206 #define mmSDMA0_PERFCNT_PERFCOUNTER_HI_DEFAULT 0x00000000 4207 #define mmSDMA0_PERFCOUNTER0_LO_DEFAULT 0x00000000 4208 #define mmSDMA0_PERFCOUNTER0_HI_DEFAULT 0x00000000 4209 #define mmSDMA0_PERFCOUNTER1_LO_DEFAULT 0x00000000 4210 #define mmSDMA0_PERFCOUNTER1_HI_DEFAULT 0x00000000 4211 4212 4213 // addressBlock: gc_sdma1_sdma1perfddec 4214 #define mmSDMA1_PERFCNT_PERFCOUNTER_LO_DEFAULT 0x00000000 4215 #define mmSDMA1_PERFCNT_PERFCOUNTER_HI_DEFAULT 0x00000000 4216 #define mmSDMA1_PERFCOUNTER0_LO_DEFAULT 0x00000000 4217 #define mmSDMA1_PERFCOUNTER0_HI_DEFAULT 0x00000000 4218 #define mmSDMA1_PERFCOUNTER1_LO_DEFAULT 0x00000000 4219 #define mmSDMA1_PERFCOUNTER1_HI_DEFAULT 0x00000000 4220 4221 4222 // addressBlock: gc_sdma2_sdma2perfddec 4223 #define mmSDMA2_PERFCNT_PERFCOUNTER_LO_DEFAULT 0x00000000 4224 #define mmSDMA2_PERFCNT_PERFCOUNTER_HI_DEFAULT 0x00000000 4225 #define mmSDMA2_PERFCOUNTER0_LO_DEFAULT 0x00000000 4226 #define mmSDMA2_PERFCOUNTER0_HI_DEFAULT 0x00000000 4227 #define mmSDMA2_PERFCOUNTER1_LO_DEFAULT 0x00000000 4228 #define mmSDMA2_PERFCOUNTER1_HI_DEFAULT 0x00000000 4229 4230 4231 // addressBlock: gc_sdma3_sdma3perfddec 4232 #define mmSDMA3_PERFCNT_PERFCOUNTER_LO_DEFAULT 0x00000000 4233 #define mmSDMA3_PERFCNT_PERFCOUNTER_HI_DEFAULT 0x00000000 4234 #define mmSDMA3_PERFCOUNTER0_LO_DEFAULT 0x00000000 4235 #define mmSDMA3_PERFCOUNTER0_HI_DEFAULT 0x00000000 4236 #define mmSDMA3_PERFCOUNTER1_LO_DEFAULT 0x00000000 4237 #define mmSDMA3_PERFCOUNTER1_HI_DEFAULT 0x00000000 4238 4239 4240 // addressBlock: gc_perfsdec 4241 #define mmCPG_PERFCOUNTER1_SELECT_DEFAULT 0x000fffff 4242 #define mmCPG_PERFCOUNTER0_SELECT1_DEFAULT 0x000fffff 4243 #define mmCPG_PERFCOUNTER0_SELECT_DEFAULT 0x000fffff 4244 #define mmCPC_PERFCOUNTER1_SELECT_DEFAULT 0x000fffff 4245 #define mmCPC_PERFCOUNTER0_SELECT1_DEFAULT 0x000fffff 4246 #define mmCPF_PERFCOUNTER1_SELECT_DEFAULT 0x000fffff 4247 #define mmCPF_PERFCOUNTER0_SELECT1_DEFAULT 0x000fffff 4248 #define mmCPF_PERFCOUNTER0_SELECT_DEFAULT 0x000fffff 4249 #define mmCP_PERFMON_CNTL_DEFAULT 0x00000000 4250 #define mmCPC_PERFCOUNTER0_SELECT_DEFAULT 0x000fffff 4251 #define mmCPF_TC_PERF_COUNTER_WINDOW_SELECT_DEFAULT 0x00000000 4252 #define mmCPG_TC_PERF_COUNTER_WINDOW_SELECT_DEFAULT 0x00000000 4253 #define mmCPF_LATENCY_STATS_SELECT_DEFAULT 0x00000000 4254 #define mmCPG_LATENCY_STATS_SELECT_DEFAULT 0x00000000 4255 #define mmCPC_LATENCY_STATS_SELECT_DEFAULT 0x00000000 4256 #define mmCP_DRAW_OBJECT_DEFAULT 0x00000000 4257 #define mmCP_DRAW_OBJECT_COUNTER_DEFAULT 0x00000000 4258 #define mmCP_DRAW_WINDOW_MASK_HI_DEFAULT 0x00000000 4259 #define mmCP_DRAW_WINDOW_HI_DEFAULT 0x00000000 4260 #define mmCP_DRAW_WINDOW_LO_DEFAULT 0x00000000 4261 #define mmCP_DRAW_WINDOW_CNTL_DEFAULT 0x00000007 4262 #define mmGRBM_PERFCOUNTER0_SELECT_DEFAULT 0x00000000 4263 #define mmGRBM_PERFCOUNTER1_SELECT_DEFAULT 0x00000000 4264 #define mmGRBM_SE0_PERFCOUNTER_SELECT_DEFAULT 0x00000000 4265 #define mmGRBM_SE1_PERFCOUNTER_SELECT_DEFAULT 0x00000000 4266 #define mmGRBM_SE2_PERFCOUNTER_SELECT_DEFAULT 0x00000000 4267 #define mmGRBM_SE3_PERFCOUNTER_SELECT_DEFAULT 0x00000000 4268 #define mmGRBM_PERFCOUNTER0_SELECT_HI_DEFAULT 0x00000000 4269 #define mmGRBM_PERFCOUNTER1_SELECT_HI_DEFAULT 0x00000000 4270 #define mmGE1_PERFCOUNTER0_SELECT_DEFAULT 0x00000000 4271 #define mmGE1_PERFCOUNTER0_SELECT1_DEFAULT 0x00000000 4272 #define mmGE1_PERFCOUNTER1_SELECT_DEFAULT 0x00000000 4273 #define mmGE1_PERFCOUNTER1_SELECT1_DEFAULT 0x00000000 4274 #define mmGE1_PERFCOUNTER2_SELECT_DEFAULT 0x00000000 4275 #define mmGE1_PERFCOUNTER2_SELECT1_DEFAULT 0x00000000 4276 #define mmGE1_PERFCOUNTER3_SELECT_DEFAULT 0x00000000 4277 #define mmGE1_PERFCOUNTER3_SELECT1_DEFAULT 0x00000000 4278 #define mmGE2_DIST_PERFCOUNTER0_SELECT_DEFAULT 0x00000000 4279 #define mmGE2_DIST_PERFCOUNTER0_SELECT1_DEFAULT 0x00000000 4280 #define mmGE2_DIST_PERFCOUNTER1_SELECT_DEFAULT 0x00000000 4281 #define mmGE2_DIST_PERFCOUNTER1_SELECT1_DEFAULT 0x00000000 4282 #define mmGE2_DIST_PERFCOUNTER2_SELECT_DEFAULT 0x00000000 4283 #define mmGE2_DIST_PERFCOUNTER2_SELECT1_DEFAULT 0x00000000 4284 #define mmGE2_DIST_PERFCOUNTER3_SELECT_DEFAULT 0x00000000 4285 #define mmGE2_DIST_PERFCOUNTER3_SELECT1_DEFAULT 0x00000000 4286 #define mmGE2_SE_PERFCOUNTER0_SELECT_DEFAULT 0x00000000 4287 #define mmGE2_SE_PERFCOUNTER0_SELECT1_DEFAULT 0x00000000 4288 #define mmGE2_SE_PERFCOUNTER1_SELECT_DEFAULT 0x00000000 4289 #define mmGE2_SE_PERFCOUNTER1_SELECT1_DEFAULT 0x00000000 4290 #define mmGE2_SE_PERFCOUNTER2_SELECT_DEFAULT 0x00000000 4291 #define mmGE2_SE_PERFCOUNTER2_SELECT1_DEFAULT 0x00000000 4292 #define mmGE2_SE_PERFCOUNTER3_SELECT_DEFAULT 0x00000000 4293 #define mmGE2_SE_PERFCOUNTER3_SELECT1_DEFAULT 0x00000000 4294 #define mmPA_SU_PERFCOUNTER0_SELECT_DEFAULT 0x00000000 4295 #define mmPA_SU_PERFCOUNTER0_SELECT1_DEFAULT 0x00000000 4296 #define mmPA_SU_PERFCOUNTER1_SELECT_DEFAULT 0x00000000 4297 #define mmPA_SU_PERFCOUNTER1_SELECT1_DEFAULT 0x00000000 4298 #define mmPA_SU_PERFCOUNTER2_SELECT_DEFAULT 0x00000000 4299 #define mmPA_SU_PERFCOUNTER2_SELECT1_DEFAULT 0x00000000 4300 #define mmPA_SU_PERFCOUNTER3_SELECT_DEFAULT 0x00000000 4301 #define mmPA_SU_PERFCOUNTER3_SELECT1_DEFAULT 0x00000000 4302 #define mmPA_SC_PERFCOUNTER0_SELECT_DEFAULT 0x00000000 4303 #define mmPA_SC_PERFCOUNTER0_SELECT1_DEFAULT 0x00000000 4304 #define mmPA_SC_PERFCOUNTER1_SELECT_DEFAULT 0x00000000 4305 #define mmPA_SC_PERFCOUNTER2_SELECT_DEFAULT 0x00000000 4306 #define mmPA_SC_PERFCOUNTER3_SELECT_DEFAULT 0x00000000 4307 #define mmPA_SC_PERFCOUNTER4_SELECT_DEFAULT 0x00000000 4308 #define mmPA_SC_PERFCOUNTER5_SELECT_DEFAULT 0x00000000 4309 #define mmPA_SC_PERFCOUNTER6_SELECT_DEFAULT 0x00000000 4310 #define mmPA_SC_PERFCOUNTER7_SELECT_DEFAULT 0x00000000 4311 #define mmSPI_PERFCOUNTER0_SELECT_DEFAULT 0x000fffff 4312 #define mmSPI_PERFCOUNTER1_SELECT_DEFAULT 0x000fffff 4313 #define mmSPI_PERFCOUNTER2_SELECT_DEFAULT 0x000fffff 4314 #define mmSPI_PERFCOUNTER3_SELECT_DEFAULT 0x000fffff 4315 #define mmSPI_PERFCOUNTER0_SELECT1_DEFAULT 0x000fffff 4316 #define mmSPI_PERFCOUNTER1_SELECT1_DEFAULT 0x000fffff 4317 #define mmSPI_PERFCOUNTER2_SELECT1_DEFAULT 0x000fffff 4318 #define mmSPI_PERFCOUNTER3_SELECT1_DEFAULT 0x000fffff 4319 #define mmSPI_PERFCOUNTER4_SELECT_DEFAULT 0x000003ff 4320 #define mmSPI_PERFCOUNTER5_SELECT_DEFAULT 0x000003ff 4321 #define mmSPI_PERFCOUNTER_BINS_DEFAULT 0xfcb87430 4322 #define mmSQ_PERFCOUNTER0_SELECT_DEFAULT 0x00000000 4323 #define mmSQ_PERFCOUNTER1_SELECT_DEFAULT 0x00000000 4324 #define mmSQ_PERFCOUNTER2_SELECT_DEFAULT 0x00000000 4325 #define mmSQ_PERFCOUNTER3_SELECT_DEFAULT 0x00000000 4326 #define mmSQ_PERFCOUNTER4_SELECT_DEFAULT 0x00000000 4327 #define mmSQ_PERFCOUNTER5_SELECT_DEFAULT 0x00000000 4328 #define mmSQ_PERFCOUNTER6_SELECT_DEFAULT 0x00000000 4329 #define mmSQ_PERFCOUNTER7_SELECT_DEFAULT 0x00000000 4330 #define mmSQ_PERFCOUNTER8_SELECT_DEFAULT 0x00000000 4331 #define mmSQ_PERFCOUNTER9_SELECT_DEFAULT 0x00000000 4332 #define mmSQ_PERFCOUNTER10_SELECT_DEFAULT 0x00000000 4333 #define mmSQ_PERFCOUNTER11_SELECT_DEFAULT 0x00000000 4334 #define mmSQ_PERFCOUNTER12_SELECT_DEFAULT 0x00000000 4335 #define mmSQ_PERFCOUNTER13_SELECT_DEFAULT 0x00000000 4336 #define mmSQ_PERFCOUNTER14_SELECT_DEFAULT 0x00000000 4337 #define mmSQ_PERFCOUNTER15_SELECT_DEFAULT 0x00000000 4338 #define mmSQ_PERFCOUNTER_CTRL_DEFAULT 0x00000200 4339 #define mmSQ_PERFCOUNTER_CTRL2_DEFAULT 0x00000000 4340 #define mmGCEA_PERFCOUNTER2_SELECT_DEFAULT 0x000fffff 4341 #define mmGCEA_PERFCOUNTER2_SELECT1_DEFAULT 0x000fffff 4342 #define mmGCEA_PERFCOUNTER2_MODE_DEFAULT 0x00000000 4343 #define mmGCEA_PERFCOUNTER0_CFG_DEFAULT 0x00000000 4344 #define mmGCEA_PERFCOUNTER1_CFG_DEFAULT 0x00000000 4345 #define mmGCEA_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000 4346 #define mmSX_PERFCOUNTER0_SELECT_DEFAULT 0x000fffff 4347 #define mmSX_PERFCOUNTER1_SELECT_DEFAULT 0x000fffff 4348 #define mmSX_PERFCOUNTER2_SELECT_DEFAULT 0x000003ff 4349 #define mmSX_PERFCOUNTER3_SELECT_DEFAULT 0x000003ff 4350 #define mmSX_PERFCOUNTER0_SELECT1_DEFAULT 0x000fffff 4351 #define mmSX_PERFCOUNTER1_SELECT1_DEFAULT 0x000fffff 4352 #define mmGDS_PERFCOUNTER0_SELECT_DEFAULT 0x00000000 4353 #define mmGDS_PERFCOUNTER1_SELECT_DEFAULT 0x00000000 4354 #define mmGDS_PERFCOUNTER2_SELECT_DEFAULT 0x00000000 4355 #define mmGDS_PERFCOUNTER3_SELECT_DEFAULT 0x00000000 4356 #define mmGDS_PERFCOUNTER0_SELECT1_DEFAULT 0x00000000 4357 #define mmGDS_PERFCOUNTER1_SELECT1_DEFAULT 0x00000000 4358 #define mmGDS_PERFCOUNTER2_SELECT1_DEFAULT 0x00000000 4359 #define mmGDS_PERFCOUNTER3_SELECT1_DEFAULT 0x00000000 4360 #define mmTA_PERFCOUNTER0_SELECT_DEFAULT 0x00000000 4361 #define mmTA_PERFCOUNTER0_SELECT1_DEFAULT 0x00000000 4362 #define mmTA_PERFCOUNTER1_SELECT_DEFAULT 0x00000000 4363 #define mmTD_PERFCOUNTER0_SELECT_DEFAULT 0x00000000 4364 #define mmTD_PERFCOUNTER0_SELECT1_DEFAULT 0x00000000 4365 #define mmTD_PERFCOUNTER1_SELECT_DEFAULT 0x00000000 4366 #define mmTCP_PERFCOUNTER0_SELECT_DEFAULT 0x000fffff 4367 #define mmTCP_PERFCOUNTER0_SELECT1_DEFAULT 0x000fffff 4368 #define mmTCP_PERFCOUNTER1_SELECT_DEFAULT 0x000fffff 4369 #define mmTCP_PERFCOUNTER1_SELECT1_DEFAULT 0x000fffff 4370 #define mmTCP_PERFCOUNTER2_SELECT_DEFAULT 0x000003ff 4371 #define mmTCP_PERFCOUNTER3_SELECT_DEFAULT 0x000003ff 4372 #define mmGL2C_PERFCOUNTER0_SELECT_DEFAULT 0x000fffff 4373 #define mmGL2C_PERFCOUNTER0_SELECT1_DEFAULT 0x000fffff 4374 #define mmGL2C_PERFCOUNTER1_SELECT_DEFAULT 0x000fffff 4375 #define mmGL2C_PERFCOUNTER1_SELECT1_DEFAULT 0x000fffff 4376 #define mmGL2C_PERFCOUNTER2_SELECT_DEFAULT 0x000003ff 4377 #define mmGL2C_PERFCOUNTER3_SELECT_DEFAULT 0x000003ff 4378 #define mmGL2A_PERFCOUNTER0_SELECT_DEFAULT 0x000fffff 4379 #define mmGL2A_PERFCOUNTER0_SELECT1_DEFAULT 0x000fffff 4380 #define mmGL2A_PERFCOUNTER1_SELECT_DEFAULT 0x000fffff 4381 #define mmGL2A_PERFCOUNTER1_SELECT1_DEFAULT 0x000fffff 4382 #define mmGL2A_PERFCOUNTER2_SELECT_DEFAULT 0x000003ff 4383 #define mmGL2A_PERFCOUNTER3_SELECT_DEFAULT 0x000003ff 4384 #define mmGL1C_PERFCOUNTER0_SELECT_DEFAULT 0x000fffff 4385 #define mmGL1C_PERFCOUNTER0_SELECT1_DEFAULT 0x000fffff 4386 #define mmGL1C_PERFCOUNTER1_SELECT_DEFAULT 0x000003ff 4387 #define mmGL1C_PERFCOUNTER2_SELECT_DEFAULT 0x000003ff 4388 #define mmGL1C_PERFCOUNTER3_SELECT_DEFAULT 0x000003ff 4389 #define mmCHC_PERFCOUNTER0_SELECT_DEFAULT 0x000fffff 4390 #define mmCHC_PERFCOUNTER0_SELECT1_DEFAULT 0x000fffff 4391 #define mmCHC_PERFCOUNTER1_SELECT_DEFAULT 0x000003ff 4392 #define mmCHC_PERFCOUNTER2_SELECT_DEFAULT 0x000003ff 4393 #define mmCHC_PERFCOUNTER3_SELECT_DEFAULT 0x000003ff 4394 #define mmCHCG_PERFCOUNTER0_SELECT_DEFAULT 0x000fffff 4395 #define mmCHCG_PERFCOUNTER0_SELECT1_DEFAULT 0x000fffff 4396 #define mmCHCG_PERFCOUNTER1_SELECT_DEFAULT 0x000003ff 4397 #define mmCHCG_PERFCOUNTER2_SELECT_DEFAULT 0x000003ff 4398 #define mmCHCG_PERFCOUNTER3_SELECT_DEFAULT 0x000003ff 4399 #define mmCB_PERFCOUNTER_FILTER_DEFAULT 0x00000000 4400 #define mmCB_PERFCOUNTER0_SELECT_DEFAULT 0x00000000 4401 #define mmCB_PERFCOUNTER0_SELECT1_DEFAULT 0x00000000 4402 #define mmCB_PERFCOUNTER1_SELECT_DEFAULT 0x00000000 4403 #define mmCB_PERFCOUNTER2_SELECT_DEFAULT 0x00000000 4404 #define mmCB_PERFCOUNTER3_SELECT_DEFAULT 0x00000000 4405 #define mmDB_PERFCOUNTER0_SELECT_DEFAULT 0x00000000 4406 #define mmDB_PERFCOUNTER0_SELECT1_DEFAULT 0x00000000 4407 #define mmDB_PERFCOUNTER1_SELECT_DEFAULT 0x00000000 4408 #define mmDB_PERFCOUNTER1_SELECT1_DEFAULT 0x00000000 4409 #define mmDB_PERFCOUNTER2_SELECT_DEFAULT 0x00000000 4410 #define mmDB_PERFCOUNTER3_SELECT_DEFAULT 0x00000000 4411 #define mmRLC_SPM_PERFMON_CNTL_DEFAULT 0x00000000 4412 #define mmRLC_SPM_PERFMON_RING_BASE_LO_DEFAULT 0x00000000 4413 #define mmRLC_SPM_PERFMON_RING_BASE_HI_DEFAULT 0x00000000 4414 #define mmRLC_SPM_PERFMON_RING_SIZE_DEFAULT 0x00000000 4415 #define mmRLC_SPM_PERFMON_SEGMENT_SIZE_DEFAULT 0x00000000 4416 #define mmRLC_SPM_RING_RDPTR_DEFAULT 0x00000000 4417 #define mmRLC_SPM_SEGMENT_THRESHOLD_DEFAULT 0x00000000 4418 #define mmRLC_SPM_SE_MUXSEL_ADDR_DEFAULT 0x00000000 4419 #define mmRLC_SPM_SE_MUXSEL_DATA_DEFAULT 0x00000000 4420 #define mmRLC_SPM_GLOBAL_MUXSEL_ADDR_DEFAULT 0x00000000 4421 #define mmRLC_SPM_GLOBAL_MUXSEL_DATA_DEFAULT 0x00000000 4422 #define mmRLC_SPM_DESER_START_SKEW_DEFAULT 0x00000000 4423 #define mmRLC_SPM_GLOBALS_SAMPLE_SKEW_DEFAULT 0x00000000 4424 #define mmRLC_SPM_GLOBALS_MUXSEL_SKEW_DEFAULT 0x00000000 4425 #define mmRLC_SPM_SE_SAMPLE_SKEW_DEFAULT 0x00000000 4426 #define mmRLC_SPM_SE_MUXSEL_SKEW_DEFAULT 0x00000000 4427 #define mmRLC_SPM_GLB_SAMPLEDELAY_IND_ADDR_DEFAULT 0x00000000 4428 #define mmRLC_SPM_GLB_SAMPLEDELAY_IND_DATA_DEFAULT 0x00000000 4429 #define mmRLC_SPM_SE_SAMPLEDELAY_IND_ADDR_DEFAULT 0x00000000 4430 #define mmRLC_SPM_SE_SAMPLEDELAY_IND_DATA_DEFAULT 0x00000000 4431 #define mmRLC_SPM_RING_WRPTR_DEFAULT 0x00000000 4432 #define mmRLC_SPM_ACCUM_DATARAM_ADDR_DEFAULT 0x00000000 4433 #define mmRLC_SPM_ACCUM_DATARAM_DATA_DEFAULT 0x00000000 4434 #define mmRLC_SPM_ACCUM_CTRLRAM_ADDR_DEFAULT 0x00000000 4435 #define mmRLC_SPM_ACCUM_CTRLRAM_DATA_DEFAULT 0x00000000 4436 #define mmRLC_SPM_ACCUM_STATUS_DEFAULT 0x00000000 4437 #define mmRLC_SPM_ACCUM_CTRL_DEFAULT 0x00000000 4438 #define mmRLC_SPM_ACCUM_MODE_DEFAULT 0x0007e004 4439 #define mmRLC_SPM_ACCUM_THRESHOLD_DEFAULT 0x00000001 4440 #define mmRLC_SPM_ACCUM_SAMPLES_REQUESTED_DEFAULT 0x00000001 4441 #define mmRLC_SPM_ACCUM_DATARAM_WRCOUNT_DEFAULT 0x00000000 4442 #define mmRLC_SPM_PERFMON_SE3TO0_SEGMENT_SIZE_DEFAULT 0x00000000 4443 #define mmRLC_SPM_PERFMON_GLB_SEGMENT_SIZE_DEFAULT 0x00000000 4444 #define mmRLC_SPM_VIRT_CTRL_DEFAULT 0x00000000 4445 #define mmRLC_SPM_PERFMON_SWA_SEGMENT_SIZE_DEFAULT 0x00000000 4446 #define mmRLC_SPM_VIRT_STATUS_DEFAULT 0x00000000 4447 #define mmRLC_SPM_GFXCLOCK_HIGHCOUNT_DEFAULT 0x00000000 4448 #define mmRLC_SPM_GFXCLOCK_LOWCOUNT_DEFAULT 0x00000000 4449 #define mmRLC_SPM_PERFMON_SWA_SE3TO0_SEGMENT_SIZE_DEFAULT 0x00000000 4450 #define mmRLC_SPM_GLOBAL_MUXSEL_ADDR_OFFSET_DEFAULT 0x00000000 4451 #define mmRLC_SPM_SE_MUXSEL_ADDR_OFFSET_DEFAULT 0x00000000 4452 #define mmRLC_SPM_ACCUM_SWA_DATARAM_ADDR_DEFAULT 0x00000000 4453 #define mmRLC_SPM_ACCUM_SWA_DATARAM_DATA_DEFAULT 0x00000000 4454 #define mmRLC_SPM_ACCUM_CTRLRAM_ADDR_OFFSET_DEFAULT 0x00000008 4455 #define mmRLC_SPM_PERFMON_SWA_GLB_SEGMENT_SIZE_DEFAULT 0x00000000 4456 #define mmRLC_SPM_ACCUM_DATARAM_32BITCNTRS_REGIONS_DEFAULT 0x0000ffff 4457 #define mmRLC_PERFMON_CNTL_DEFAULT 0x00000000 4458 #define mmRLC_PERFCOUNTER0_SELECT_DEFAULT 0x00000000 4459 #define mmRLC_PERFCOUNTER1_SELECT_DEFAULT 0x00000000 4460 #define mmRLC_GPU_IOV_PERF_CNT_CNTL_DEFAULT 0x00000000 4461 #define mmRLC_GPU_IOV_PERF_CNT_WR_ADDR_DEFAULT 0x00000000 4462 #define mmRLC_GPU_IOV_PERF_CNT_WR_DATA_DEFAULT 0x00000000 4463 #define mmRLC_GPU_IOV_PERF_CNT_RD_ADDR_DEFAULT 0x00000000 4464 #define mmRLC_GPU_IOV_PERF_CNT_RD_DATA_DEFAULT 0x00000000 4465 #define mmRLC_PERFMON_CLK_CNTL_DEFAULT 0x00000001 4466 #define mmRMI_PERFCOUNTER0_SELECT_DEFAULT 0x00000000 4467 #define mmRMI_PERFCOUNTER0_SELECT1_DEFAULT 0x00000000 4468 #define mmRMI_PERFCOUNTER1_SELECT_DEFAULT 0x00000000 4469 #define mmRMI_PERFCOUNTER2_SELECT_DEFAULT 0x00000000 4470 #define mmRMI_PERFCOUNTER2_SELECT1_DEFAULT 0x00000000 4471 #define mmRMI_PERFCOUNTER3_SELECT_DEFAULT 0x00000000 4472 #define mmRMI_PERF_COUNTER_CNTL_DEFAULT 0x00080240 4473 #define mmGCR_PERFCOUNTER0_SELECT_DEFAULT 0x00000000 4474 #define mmGCR_PERFCOUNTER0_SELECT1_DEFAULT 0x00000000 4475 #define mmGCR_PERFCOUNTER1_SELECT_DEFAULT 0x00000000 4476 #define mmUTCL1_PERFCOUNTER0_SELECT_DEFAULT 0x00000000 4477 #define mmUTCL1_PERFCOUNTER1_SELECT_DEFAULT 0x00000000 4478 #define mmPA_PH_PERFCOUNTER0_SELECT_DEFAULT 0x00000000 4479 #define mmPA_PH_PERFCOUNTER0_SELECT1_DEFAULT 0x00000000 4480 #define mmPA_PH_PERFCOUNTER1_SELECT_DEFAULT 0x00000000 4481 #define mmPA_PH_PERFCOUNTER2_SELECT_DEFAULT 0x00000000 4482 #define mmPA_PH_PERFCOUNTER3_SELECT_DEFAULT 0x00000000 4483 #define mmPA_PH_PERFCOUNTER4_SELECT_DEFAULT 0x00000000 4484 #define mmPA_PH_PERFCOUNTER5_SELECT_DEFAULT 0x00000000 4485 #define mmPA_PH_PERFCOUNTER6_SELECT_DEFAULT 0x00000000 4486 #define mmPA_PH_PERFCOUNTER7_SELECT_DEFAULT 0x00000000 4487 #define mmPA_PH_PERFCOUNTER1_SELECT1_DEFAULT 0x00000000 4488 #define mmPA_PH_PERFCOUNTER2_SELECT1_DEFAULT 0x00000000 4489 #define mmPA_PH_PERFCOUNTER3_SELECT1_DEFAULT 0x00000000 4490 #define mmGL1A_PERFCOUNTER0_SELECT_DEFAULT 0x000fffff 4491 #define mmGL1A_PERFCOUNTER0_SELECT1_DEFAULT 0x000fffff 4492 #define mmGL1A_PERFCOUNTER1_SELECT_DEFAULT 0x000003ff 4493 #define mmGL1A_PERFCOUNTER2_SELECT_DEFAULT 0x000003ff 4494 #define mmGL1A_PERFCOUNTER3_SELECT_DEFAULT 0x000003ff 4495 #define mmCHA_PERFCOUNTER0_SELECT_DEFAULT 0x000fffff 4496 #define mmCHA_PERFCOUNTER0_SELECT1_DEFAULT 0x000fffff 4497 #define mmCHA_PERFCOUNTER1_SELECT_DEFAULT 0x000003ff 4498 #define mmCHA_PERFCOUNTER2_SELECT_DEFAULT 0x000003ff 4499 #define mmCHA_PERFCOUNTER3_SELECT_DEFAULT 0x000003ff 4500 #define mmGUS_PERFCOUNTER2_SELECT_DEFAULT 0x000fffff 4501 #define mmGUS_PERFCOUNTER2_SELECT1_DEFAULT 0x000fffff 4502 #define mmGUS_PERFCOUNTER2_MODE_DEFAULT 0x00000000 4503 #define mmGUS_PERFCOUNTER0_CFG_DEFAULT 0x00000000 4504 #define mmGUS_PERFCOUNTER1_CFG_DEFAULT 0x00000000 4505 #define mmGUS_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000 4506 4507 4508 // addressBlock: gc_gcvml2pldec 4509 #define mmGCMC_VM_L2_PERFCOUNTER0_CFG_DEFAULT 0x00000000 4510 #define mmGCMC_VM_L2_PERFCOUNTER1_CFG_DEFAULT 0x00000000 4511 #define mmGCMC_VM_L2_PERFCOUNTER2_CFG_DEFAULT 0x00000000 4512 #define mmGCMC_VM_L2_PERFCOUNTER3_CFG_DEFAULT 0x00000000 4513 #define mmGCMC_VM_L2_PERFCOUNTER4_CFG_DEFAULT 0x00000000 4514 #define mmGCMC_VM_L2_PERFCOUNTER5_CFG_DEFAULT 0x00000000 4515 #define mmGCMC_VM_L2_PERFCOUNTER6_CFG_DEFAULT 0x00000000 4516 #define mmGCMC_VM_L2_PERFCOUNTER7_CFG_DEFAULT 0x00000000 4517 #define mmGCMC_VM_L2_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000 4518 #define mmGCUTCL2_PERFCOUNTER0_CFG_DEFAULT 0x00000000 4519 #define mmGCUTCL2_PERFCOUNTER1_CFG_DEFAULT 0x00000000 4520 #define mmGCUTCL2_PERFCOUNTER2_CFG_DEFAULT 0x00000000 4521 #define mmGCUTCL2_PERFCOUNTER3_CFG_DEFAULT 0x00000000 4522 #define mmGCUTCL2_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000 4523 4524 4525 // addressBlock: gc_gcvml2perfsdec 4526 #define mmGCVML2_PERFCOUNTER2_0_SELECT_DEFAULT 0x000fffff 4527 #define mmGCVML2_PERFCOUNTER2_1_SELECT_DEFAULT 0x000fffff 4528 #define mmGCVML2_PERFCOUNTER2_0_SELECT1_DEFAULT 0x000fffff 4529 #define mmGCVML2_PERFCOUNTER2_1_SELECT1_DEFAULT 0x000fffff 4530 #define mmGCVML2_PERFCOUNTER2_0_MODE_DEFAULT 0x00000000 4531 #define mmGCVML2_PERFCOUNTER2_1_MODE_DEFAULT 0x00000000 4532 4533 4534 // addressBlock: gc_sdma0_sdma0perfsdec 4535 #define mmSDMA0_PERFCNT_PERFCOUNTER0_CFG_DEFAULT 0x0000ffff 4536 #define mmSDMA0_PERFCNT_PERFCOUNTER1_CFG_DEFAULT 0x0000ffff 4537 #define mmSDMA0_PERFCNT_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000 4538 #define mmSDMA0_PERFCNT_MISC_CNTL_DEFAULT 0x00000000 4539 #define mmSDMA0_PERFCOUNTER0_SELECT_DEFAULT 0x000fffff 4540 #define mmSDMA0_PERFCOUNTER0_SELECT1_DEFAULT 0x000fffff 4541 #define mmSDMA0_PERFCOUNTER1_SELECT_DEFAULT 0x000fffff 4542 #define mmSDMA0_PERFCOUNTER1_SELECT1_DEFAULT 0x000fffff 4543 4544 4545 // addressBlock: gc_sdma1_sdma1perfsdec 4546 #define mmSDMA1_PERFCNT_PERFCOUNTER0_CFG_DEFAULT 0x0000ffff 4547 #define mmSDMA1_PERFCNT_PERFCOUNTER1_CFG_DEFAULT 0x0000ffff 4548 #define mmSDMA1_PERFCNT_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000 4549 #define mmSDMA1_PERFCNT_MISC_CNTL_DEFAULT 0x00000000 4550 #define mmSDMA1_PERFCOUNTER0_SELECT_DEFAULT 0x000fffff 4551 #define mmSDMA1_PERFCOUNTER0_SELECT1_DEFAULT 0x000fffff 4552 #define mmSDMA1_PERFCOUNTER1_SELECT_DEFAULT 0x000fffff 4553 #define mmSDMA1_PERFCOUNTER1_SELECT1_DEFAULT 0x000fffff 4554 4555 4556 // addressBlock: gc_sdma2_sdma2perfsdec 4557 #define mmSDMA2_PERFCNT_PERFCOUNTER0_CFG_DEFAULT 0x0000ffff 4558 #define mmSDMA2_PERFCNT_PERFCOUNTER1_CFG_DEFAULT 0x0000ffff 4559 #define mmSDMA2_PERFCNT_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000 4560 #define mmSDMA2_PERFCNT_MISC_CNTL_DEFAULT 0x00000000 4561 #define mmSDMA2_PERFCOUNTER0_SELECT_DEFAULT 0x000fffff 4562 #define mmSDMA2_PERFCOUNTER0_SELECT1_DEFAULT 0x000fffff 4563 #define mmSDMA2_PERFCOUNTER1_SELECT_DEFAULT 0x000fffff 4564 #define mmSDMA2_PERFCOUNTER1_SELECT1_DEFAULT 0x000fffff 4565 4566 4567 // addressBlock: gc_sdma3_sdma3perfsdec 4568 #define mmSDMA3_PERFCNT_PERFCOUNTER0_CFG_DEFAULT 0x0000ffff 4569 #define mmSDMA3_PERFCNT_PERFCOUNTER1_CFG_DEFAULT 0x0000ffff 4570 #define mmSDMA3_PERFCNT_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000 4571 #define mmSDMA3_PERFCNT_MISC_CNTL_DEFAULT 0x00000000 4572 #define mmSDMA3_PERFCOUNTER0_SELECT_DEFAULT 0x000fffff 4573 #define mmSDMA3_PERFCOUNTER0_SELECT1_DEFAULT 0x000fffff 4574 #define mmSDMA3_PERFCOUNTER1_SELECT_DEFAULT 0x000fffff 4575 #define mmSDMA3_PERFCOUNTER1_SELECT1_DEFAULT 0x000fffff 4576 4577 4578 4579 4580 // addressBlock: gc_grtavfsdec 4581 #define mmGRTAVFS_RTAVFS_REG_ADDR_DEFAULT 0x00000000 4582 #define mmRTAVFS_RTAVFS_REG_ADDR_DEFAULT 0x00000000 4583 #define mmGRTAVFS_RTAVFS_WR_DATA_DEFAULT 0x00000000 4584 #define mmRTAVFS_RTAVFS_WR_DATA_DEFAULT 0x00000000 4585 #define mmGRTAVFS_GENERAL_0_DEFAULT 0x00000000 4586 #define mmGRTAVFS_RTAVFS_RD_DATA_DEFAULT 0x00000000 4587 #define mmGRTAVFS_RTAVFS_REG_CTRL_DEFAULT 0x00000000 4588 #define mmGRTAVFS_RTAVFS_REG_STATUS_DEFAULT 0x00000000 4589 #define mmGRTAVFS_TARG_FREQ_DEFAULT 0x00000000 4590 #define mmGRTAVFS_TARG_VOLT_DEFAULT 0x00000000 4591 #define mmGRTAVFS_SOFT_RESET_DEFAULT 0x00000001 4592 #define mmGRTAVFS_PSM_CNTL_DEFAULT 0x00000001 4593 #define mmGRTAVFS_CLK_CNTL_DEFAULT 0x00000003 4594 4595 4596 // addressBlock: gc_rlcdec 4597 #define mmRLC_CNTL_DEFAULT 0x00000001 4598 #define mmRLC_F32_UCODE_VERSION_DEFAULT 0x00000000 4599 #define mmRLC_STAT_DEFAULT 0x00000000 4600 #define mmRLC_MEM_SLP_CNTL_DEFAULT 0x00020200 4601 #define mmSMU_RLC_RESPONSE_DEFAULT 0x00000000 4602 #define mmRLC_RLCV_SAFE_MODE_DEFAULT 0x00000000 4603 #define mmRLC_SMU_SAFE_MODE_DEFAULT 0x00000000 4604 #define mmRLC_RLCV_COMMAND_DEFAULT 0x00000000 4605 #define mmRLC_REFCLOCK_TIMESTAMP_LSB_DEFAULT 0x00000000 4606 #define mmRLC_REFCLOCK_TIMESTAMP_MSB_DEFAULT 0x00000000 4607 #define mmRLC_GPM_TIMER_INT_0_DEFAULT 0x00000063 4608 #define mmRLC_GPM_TIMER_INT_1_DEFAULT 0x00000063 4609 #define mmRLC_GPM_TIMER_INT_2_DEFAULT 0x00000063 4610 #define mmRLC_GPM_TIMER_CTRL_DEFAULT 0x00000000 4611 #define mmRLC_LB_CNTR_MAX_1_DEFAULT 0xffffffff 4612 #define mmRLC_GPM_TIMER_STAT_DEFAULT 0x00000000 4613 #define mmRLC_GPM_TIMER_INT_3_DEFAULT 0x00000063 4614 #define mmRLC_GPM_LEGACY_INT_STAT_DEFAULT 0x00000000 4615 #define mmRLC_GPM_LEGACY_INT_CLEAR_DEFAULT 0x00000000 4616 #define mmRLC_INT_STAT_DEFAULT 0x00000000 4617 #define mmRLC_LB_CNTL_DEFAULT 0x00000000 4618 #define mmRLC_MGCG_CTRL_DEFAULT 0x00018800 4619 #define mmRLC_LB_CNTR_INIT_1_DEFAULT 0x00000000 4620 #define mmRLC_LB_CNTR_1_DEFAULT 0x00000000 4621 #define mmRLC_JUMP_TABLE_RESTORE_DEFAULT 0x00000000 4622 #define mmRLC_PG_DELAY_2_DEFAULT 0x00000004 4623 #define mmRLC_GPU_CLOCK_COUNT_LSB_DEFAULT 0x00000000 4624 #define mmRLC_GPU_CLOCK_COUNT_MSB_DEFAULT 0x00000000 4625 #define mmRLC_CAPTURE_GPU_CLOCK_COUNT_DEFAULT 0x00000000 4626 #define mmRLC_UCODE_CNTL_DEFAULT 0x00000000 4627 #define mmRLC_GPM_THREAD_RESET_DEFAULT 0x00000004 4628 #define mmRLC_GPM_CP_DMA_COMPLETE_T0_DEFAULT 0x00000000 4629 #define mmRLC_GPM_CP_DMA_COMPLETE_T1_DEFAULT 0x00000000 4630 #define mmRLC_LB_CNTR_INIT_2_DEFAULT 0x00000000 4631 #define mmRLC_LB_CNTR_MAX_2_DEFAULT 0xffffffff 4632 #define mmRLC_LB_CONFIG_5_DEFAULT 0x00000000 4633 #define mmRLC_GPM_TIMER_INT_4_DEFAULT 0x00000063 4634 #define mmRLC_CLK_COUNT_GFXCLK_LSB_DEFAULT 0x00000000 4635 #define mmRLC_CLK_COUNT_GFXCLK_MSB_DEFAULT 0x00000000 4636 #define mmRLC_CLK_COUNT_REFCLK_LSB_DEFAULT 0x00000000 4637 #define mmRLC_CLK_COUNT_REFCLK_MSB_DEFAULT 0x00000000 4638 #define mmRLC_CLK_COUNT_CTRL_DEFAULT 0x00000000 4639 #define mmRLC_CLK_COUNT_STAT_DEFAULT 0x00000000 4640 #define mmRLC_RLCG_DOORBELL_CNTL_DEFAULT 0x00260000 4641 #define mmRLC_RLCG_DOORBELL_STAT_DEFAULT 0x00000000 4642 #define mmRLC_RLCG_DOORBELL_0_DATA_LO_DEFAULT 0x00000000 4643 #define mmRLC_RLCG_DOORBELL_0_DATA_HI_DEFAULT 0x00000000 4644 #define mmRLC_RLCG_DOORBELL_1_DATA_LO_DEFAULT 0x00000000 4645 #define mmRLC_RLCG_DOORBELL_1_DATA_HI_DEFAULT 0x00000000 4646 #define mmRLC_RLCG_DOORBELL_2_DATA_LO_DEFAULT 0x00000000 4647 #define mmRLC_RLCG_DOORBELL_2_DATA_HI_DEFAULT 0x00000000 4648 #define mmRLC_RLCG_DOORBELL_3_DATA_LO_DEFAULT 0x00000000 4649 #define mmRLC_RLCG_DOORBELL_3_DATA_HI_DEFAULT 0x00000000 4650 #define mmRLC_GPU_CLOCK_32_RES_SEL_DEFAULT 0x00000000 4651 #define mmRLC_GPU_CLOCK_32_DEFAULT 0x00000000 4652 #define mmRLC_PG_CNTL_DEFAULT 0x00000000 4653 #define mmRLC_GPM_THREAD_PRIORITY_DEFAULT 0x08080808 4654 #define mmRLC_GPM_THREAD_ENABLE_DEFAULT 0x00000001 4655 #define mmRLC_RLCG_DOORBELL_RANGE_DEFAULT 0x00000000 4656 #define mmRLC_CGCG_CGLS_CTRL_DEFAULT 0x0001003c 4657 #define mmRLC_CGCG_RAMP_CTRL_DEFAULT 0x00021711 4658 #define mmRLC_DYN_PG_STATUS_DEFAULT 0xffffffff 4659 #define mmRLC_DYN_PG_REQUEST_DEFAULT 0xffffffff 4660 #define mmRLC_PG_DELAY_DEFAULT 0x00101010 4661 #define mmRLC_WGP_STATUS_DEFAULT 0x00000000 4662 #define mmRLC_LB_INIT_WGP_MASK_DEFAULT 0xffffffff 4663 #define mmRLC_LB_ALWAYS_ACTIVE_WGP_MASK_DEFAULT 0x00000001 4664 #define mmRLC_LB_PARAMS_DEFAULT 0x00601008 4665 #define mmRLC_LB_DELAY_DEFAULT 0x00400401 4666 #define mmRLC_PG_ALWAYS_ON_WGP_MASK_DEFAULT 0x00000003 4667 #define mmRLC_MAX_PG_WGP_DEFAULT 0x0000000a 4668 #define mmRLC_AUTO_PG_CTRL_DEFAULT 0x00000000 4669 #define mmRLC_SMU_GRBM_REG_SAVE_CTRL_DEFAULT 0x00000000 4670 #define mmRLC_SERDES_RD_INDEX_DEFAULT 0x00000000 4671 #define mmRLC_SERDES_RD_DATA_0_DEFAULT 0x00000000 4672 #define mmRLC_SERDES_RD_DATA_1_DEFAULT 0x00000000 4673 #define mmRLC_SERDES_RD_DATA_2_DEFAULT 0x00000000 4674 #define mmRLC_SERDES_RD_DATA_3_DEFAULT 0x00000000 4675 #define mmRLC_SERDES_MASK_DEFAULT 0x00000000 4676 #define mmRLC_SERDES_CTRL_DEFAULT 0x00000000 4677 #define mmRLC_SERDES_DATA_DEFAULT 0x00000000 4678 #define mmRLC_SERDES_BUSY_DEFAULT 0x00000000 4679 #define mmRLC_GPM_GENERAL_0_DEFAULT 0x00000000 4680 #define mmRLC_GPM_GENERAL_1_DEFAULT 0x00000000 4681 #define mmRLC_GPM_GENERAL_2_DEFAULT 0x00000000 4682 #define mmRLC_GPM_GENERAL_3_DEFAULT 0x00000000 4683 #define mmRLC_GPM_GENERAL_4_DEFAULT 0x00000000 4684 #define mmRLC_GPM_GENERAL_5_DEFAULT 0x00000000 4685 #define mmRLC_GPM_GENERAL_6_DEFAULT 0x00000000 4686 #define mmRLC_GPM_GENERAL_7_DEFAULT 0x00000000 4687 #define mmRLC_STATIC_PG_STATUS_DEFAULT 0xffffffff 4688 #define mmRLC_SPM_INT_INFO_1_DEFAULT 0x00000000 4689 #define mmRLC_SPM_INT_INFO_2_DEFAULT 0x00ca0000 4690 #define mmRLC_SPM_MC_CNTL_DEFAULT 0x00000000 4691 #define mmRLC_SPM_INT_CNTL_DEFAULT 0x00000000 4692 #define mmRLC_SPM_INT_STATUS_DEFAULT 0x00000000 4693 #define mmRLC_SMU_MESSAGE_DEFAULT 0x00000000 4694 #define mmRLC_GPM_LOG_SIZE_DEFAULT 0x00000000 4695 #define mmRLC_PG_DELAY_3_DEFAULT 0x00000000 4696 #define mmRLC_GPR_REG1_DEFAULT 0x00000000 4697 #define mmRLC_GPR_REG2_DEFAULT 0x00000000 4698 #define mmRLC_GPM_LOG_CONT_DEFAULT 0x00000000 4699 #define mmRLC_GPM_INT_DISABLE_TH0_DEFAULT 0xffffffff 4700 #define mmRLC_GPM_LEGACY_INT_DISABLE_DEFAULT 0x00000007 4701 #define mmRLC_GPM_INT_FORCE_TH0_DEFAULT 0x00000000 4702 #define mmRLC_SRM_CNTL_DEFAULT 0x00000002 4703 #define mmRLC_SRM_GPM_COMMAND_DEFAULT 0x00000000 4704 #define mmRLC_SRM_GPM_COMMAND_STATUS_DEFAULT 0x00000000 4705 #define mmRLC_SRM_RLCV_COMMAND_DEFAULT 0x00000000 4706 #define mmRLC_SRM_RLCV_COMMAND_STATUS_DEFAULT 0x00000000 4707 #define mmRLC_SRM_INDEX_CNTL_ADDR_0_DEFAULT 0x00000000 4708 #define mmRLC_SRM_INDEX_CNTL_ADDR_1_DEFAULT 0x00000000 4709 #define mmRLC_SRM_INDEX_CNTL_ADDR_2_DEFAULT 0x00000000 4710 #define mmRLC_SRM_INDEX_CNTL_ADDR_3_DEFAULT 0x00000000 4711 #define mmRLC_SRM_INDEX_CNTL_ADDR_4_DEFAULT 0x00000000 4712 #define mmRLC_SRM_INDEX_CNTL_ADDR_5_DEFAULT 0x00000000 4713 #define mmRLC_SRM_INDEX_CNTL_ADDR_6_DEFAULT 0x00000000 4714 #define mmRLC_SRM_INDEX_CNTL_ADDR_7_DEFAULT 0x00000000 4715 #define mmRLC_SRM_INDEX_CNTL_DATA_0_DEFAULT 0x00000000 4716 #define mmRLC_SRM_INDEX_CNTL_DATA_1_DEFAULT 0x00000000 4717 #define mmRLC_SRM_INDEX_CNTL_DATA_2_DEFAULT 0x00000000 4718 #define mmRLC_SRM_INDEX_CNTL_DATA_3_DEFAULT 0x00000000 4719 #define mmRLC_SRM_INDEX_CNTL_DATA_4_DEFAULT 0x00000000 4720 #define mmRLC_SRM_INDEX_CNTL_DATA_5_DEFAULT 0x00000000 4721 #define mmRLC_SRM_INDEX_CNTL_DATA_6_DEFAULT 0x00000000 4722 #define mmRLC_SRM_INDEX_CNTL_DATA_7_DEFAULT 0x00000000 4723 #define mmRLC_SRM_STAT_DEFAULT 0x00000000 4724 #define mmRLC_SRM_GPM_ABORT_DEFAULT 0x00000000 4725 #define mmRLC_SPARE_INT_2_DEFAULT 0x00000000 4726 #define mmRLC_RLCV_SPARE_INT_1_DEFAULT 0x00000000 4727 #define mmRLC_PACE_SPARE_INT_1_DEFAULT 0x00000000 4728 #define mmRLC_SAFE_MODE_DEFAULT 0x00000000 4729 #define mmRLC_CP_SCHEDULERS_DEFAULT 0x58504840 4730 #define mmRLC_CSIB_ADDR_LO_DEFAULT 0x00000000 4731 #define mmRLC_CSIB_ADDR_HI_DEFAULT 0x00000000 4732 #define mmRLC_CSIB_LENGTH_DEFAULT 0x00000000 4733 #define mmRLC_SPARE_INT_0_DEFAULT 0x00000000 4734 #define mmRLC_CP_EOF_INT_CNT_DEFAULT 0x00000000 4735 #define mmRLC_CP_EOF_INT_DEFAULT 0x00000000 4736 #define mmRLC_SMU_COMMAND_DEFAULT 0x00000000 4737 #define mmRLC_SMU_ARGUMENT_1_DEFAULT 0x00000000 4738 #define mmRLC_SMU_ARGUMENT_2_DEFAULT 0x00000000 4739 #define mmRLC_GPM_GENERAL_8_DEFAULT 0x00000000 4740 #define mmRLC_GPM_GENERAL_9_DEFAULT 0x00000000 4741 #define mmRLC_GPM_GENERAL_10_DEFAULT 0x00000000 4742 #define mmRLC_GPM_GENERAL_11_DEFAULT 0x00000000 4743 #define mmRLC_GPM_GENERAL_12_DEFAULT 0x00000000 4744 #define mmRLC_GPM_UTCL1_CNTL_0_DEFAULT 0x00000080 4745 #define mmRLC_GPM_UTCL1_CNTL_1_DEFAULT 0x00000080 4746 #define mmRLC_GPM_UTCL1_CNTL_2_DEFAULT 0x00000080 4747 #define mmRLC_SPM_UTCL1_CNTL_DEFAULT 0x00000080 4748 #define mmRLC_UTCL1_STATUS_2_DEFAULT 0x00000000 4749 #define mmRLC_LB_CONFIG_2_DEFAULT 0x00000000 4750 #define mmRLC_LB_CONFIG_3_DEFAULT 0x00000000 4751 #define mmRLC_LB_CONFIG_4_DEFAULT 0x00000000 4752 #define mmRLC_SPM_UTCL1_ERROR_1_DEFAULT 0x00000000 4753 #define mmRLC_SPM_UTCL1_ERROR_2_DEFAULT 0x00000000 4754 #define mmRLC_GPM_UTCL1_TH0_ERROR_1_DEFAULT 0x00000000 4755 #define mmRLC_LB_CONFIG_1_DEFAULT 0x00000000 4756 #define mmRLC_GPM_UTCL1_TH0_ERROR_2_DEFAULT 0x00000000 4757 #define mmRLC_GPM_UTCL1_TH1_ERROR_1_DEFAULT 0x00000000 4758 #define mmRLC_GPM_UTCL1_TH1_ERROR_2_DEFAULT 0x00000000 4759 #define mmRLC_GPM_UTCL1_TH2_ERROR_1_DEFAULT 0x00000000 4760 #define mmRLC_GPM_UTCL1_TH2_ERROR_2_DEFAULT 0x00000000 4761 #define mmRLC_CGCG_CGLS_CTRL_3D_DEFAULT 0x0001003c 4762 #define mmRLC_CGCG_RAMP_CTRL_3D_DEFAULT 0x00021711 4763 #define mmRLC_SEMAPHORE_0_DEFAULT 0x00000000 4764 #define mmRLC_SEMAPHORE_1_DEFAULT 0x00000000 4765 #define mmRLC_PACE_INT_STAT_DEFAULT 0x00000000 4766 #define mmRLC_PREWALKER_UTCL1_CNTL_DEFAULT 0x00000080 4767 #define mmRLC_PREWALKER_UTCL1_TRIG_DEFAULT 0x00000000 4768 #define mmRLC_PREWALKER_UTCL1_ADDR_LSB_DEFAULT 0x00000000 4769 #define mmRLC_PREWALKER_UTCL1_ADDR_MSB_DEFAULT 0x00000000 4770 #define mmRLC_PREWALKER_UTCL1_SIZE_LSB_DEFAULT 0x00000000 4771 #define mmRLC_PREWALKER_UTCL1_SIZE_MSB_DEFAULT 0x00000000 4772 #define mmRLC_UTCL1_STATUS_DEFAULT 0x00000000 4773 #define mmRLC_R2I_CNTL_0_DEFAULT 0x00000000 4774 #define mmRLC_R2I_CNTL_1_DEFAULT 0x00000000 4775 #define mmRLC_R2I_CNTL_2_DEFAULT 0x00000000 4776 #define mmRLC_R2I_CNTL_3_DEFAULT 0x00000000 4777 #define mmRLC_LB_WGP_STAT_DEFAULT 0x00000000 4778 #define mmRLC_GPM_INT_STAT_TH0_DEFAULT 0x00000000 4779 #define mmRLC_GPM_GENERAL_13_DEFAULT 0x00000000 4780 #define mmRLC_GPM_GENERAL_14_DEFAULT 0x00000000 4781 #define mmRLC_GPM_GENERAL_15_DEFAULT 0x00000000 4782 #define mmRLC_SPARE_INT_1_DEFAULT 0x00000000 4783 #define mmRLC_SEMAPHORE_2_DEFAULT 0x00000000 4784 #define mmRLC_SEMAPHORE_3_DEFAULT 0x00000000 4785 #define mmRLC_SMU_ARGUMENT_3_DEFAULT 0x00000000 4786 #define mmRLC_SMU_ARGUMENT_4_DEFAULT 0x00000000 4787 #define mmRLC_GPU_CLOCK_COUNT_LSB_1_DEFAULT 0x00000000 4788 #define mmRLC_GPU_CLOCK_COUNT_MSB_1_DEFAULT 0x00000000 4789 #define mmRLC_CAPTURE_GPU_CLOCK_COUNT_1_DEFAULT 0x00000000 4790 #define mmRLC_GPU_CLOCK_COUNT_LSB_2_DEFAULT 0x00000000 4791 #define mmRLC_GPU_CLOCK_COUNT_MSB_2_DEFAULT 0x00000000 4792 #define mmRLC_PACE_INT_DISABLE_DEFAULT 0xffffffff 4793 #define mmRLC_CAPTURE_GPU_CLOCK_COUNT_2_DEFAULT 0x00000000 4794 #define mmRLC_RLCV_DOORBELL_RANGE_DEFAULT 0x00000000 4795 #define mmRLC_RLCV_DOORBELL_CNTL_DEFAULT 0x00260000 4796 #define mmRLC_RLCV_DOORBELL_STAT_DEFAULT 0x00000000 4797 #define mmRLC_RLCV_DOORBELL_0_DATA_LO_DEFAULT 0x00000000 4798 #define mmRLC_RLCV_DOORBELL_0_DATA_HI_DEFAULT 0x00000000 4799 #define mmRLC_RLCV_DOORBELL_1_DATA_LO_DEFAULT 0x00000000 4800 #define mmRLC_RLCV_DOORBELL_1_DATA_HI_DEFAULT 0x00000000 4801 #define mmRLC_RLCV_DOORBELL_2_DATA_LO_DEFAULT 0x00000000 4802 #define mmRLC_RLCV_DOORBELL_2_DATA_HI_DEFAULT 0x00000000 4803 #define mmRLC_RLCV_DOORBELL_3_DATA_LO_DEFAULT 0x00000000 4804 #define mmRLC_RLCV_DOORBELL_3_DATA_HI_DEFAULT 0x00000000 4805 #define mmRLC_RLCV_SPARE_INT_DEFAULT 0x00000000 4806 #define mmRLC_PACE_TIMER_INT_0_DEFAULT 0x00000063 4807 #define mmRLC_PACE_TIMER_CTRL_DEFAULT 0x00000000 4808 #define mmRLC_PACE_TIMER_INT_1_DEFAULT 0x00000063 4809 #define mmRLC_PACE_SPARE_INT_DEFAULT 0x00000000 4810 #define mmRLC_SMU_CLK_REQ_DEFAULT 0x00000000 4811 #define mmRLC_CP_STAT_INVAL_STAT_DEFAULT 0x00000000 4812 #define mmRLC_CP_STAT_INVAL_CTRL_DEFAULT 0x00000007 4813 #define mmRLC_CLK_STATUS_DEFAULT 0x00000000 4814 #define mmRLC_SPP_CTRL_DEFAULT 0x00000000 4815 #define mmRLC_SPP_SHADER_PROFILE_EN_DEFAULT 0x00000000 4816 #define mmRLC_SPP_SSF_CAPTURE_EN_DEFAULT 0x00000000 4817 #define mmRLC_SPP_SSF_THRESHOLD_0_DEFAULT 0x009f009f 4818 #define mmRLC_SPP_SSF_THRESHOLD_1_DEFAULT 0x009f009f 4819 #define mmRLC_SPP_SSF_THRESHOLD_2_DEFAULT 0x009f009f 4820 #define mmRLC_SPP_INFLIGHT_RD_ADDR_DEFAULT 0x00000000 4821 #define mmRLC_SPP_INFLIGHT_RD_DATA_DEFAULT 0x00000000 4822 #define mmRLC_GPM_GENERAL_16_DEFAULT 0x00000000 4823 #define mmRLC_SPP_PROF_INFO_1_DEFAULT 0x00000000 4824 #define mmRLC_SPP_PROF_INFO_2_DEFAULT 0x00000000 4825 #define mmRLC_SPP_GLOBAL_SH_ID_DEFAULT 0x00000000 4826 #define mmRLC_SPP_GLOBAL_SH_ID_VALID_DEFAULT 0x00000000 4827 #define mmRLC_SPP_STATUS_DEFAULT 0x00000000 4828 #define mmRLC_SPP_PVT_STAT_0_DEFAULT 0x00000000 4829 #define mmRLC_SPP_PVT_STAT_1_DEFAULT 0x00000000 4830 #define mmRLC_SPP_PVT_STAT_2_DEFAULT 0x00000000 4831 #define mmRLC_SPP_PVT_STAT_3_DEFAULT 0x00000000 4832 #define mmRLC_SPP_PVT_LEVEL_MAX_DEFAULT 0x00000000 4833 #define mmRLC_SPP_STALL_STATE_UPDATE_DEFAULT 0x00000000 4834 #define mmRLC_SPP_PBB_INFO_DEFAULT 0x00000000 4835 #define mmRLC_SPP_RESET_DEFAULT 0x00000000 4836 #define mmRLC_SPM_SAMPLE_CNT_DEFAULT 0x00000000 4837 #define mmRLC_RLCP_DOORBELL_RANGE_DEFAULT 0x00000000 4838 #define mmRLC_RLCP_DOORBELL_CNTL_DEFAULT 0x00260000 4839 #define mmRLC_RLCP_DOORBELL_STAT_DEFAULT 0x00000000 4840 #define mmRLC_RLCP_DOORBELL_0_DATA_LO_DEFAULT 0x00000000 4841 #define mmRLC_RLCP_DOORBELL_0_DATA_HI_DEFAULT 0x00000000 4842 #define mmRLC_RLCP_DOORBELL_1_DATA_LO_DEFAULT 0x00000000 4843 #define mmRLC_RLCP_DOORBELL_1_DATA_HI_DEFAULT 0x00000000 4844 #define mmRLC_RLCP_DOORBELL_2_DATA_LO_DEFAULT 0x00000000 4845 #define mmRLC_RLCP_DOORBELL_2_DATA_HI_DEFAULT 0x00000000 4846 #define mmRLC_RLCP_DOORBELL_3_DATA_LO_DEFAULT 0x00000000 4847 #define mmRLC_RLCP_DOORBELL_3_DATA_HI_DEFAULT 0x00000000 4848 #define mmRLC_PCC_STRETCH_HYSTERESIS_CNTL_DEFAULT 0x00000001 4849 #define mmRLC_CAC_MASK_CNTL_DEFAULT 0x000000bf 4850 #define mmRLC_GPU_CLOCK_COUNT_SPM_LSB_DEFAULT 0x00000000 4851 #define mmRLC_GPU_CLOCK_COUNT_SPM_MSB_DEFAULT 0x00000000 4852 #define mmRLC_SPM_THREAD_TRACE_CTRL_DEFAULT 0x00000000 4853 #define mmRLC_LB_CNTR_2_DEFAULT 0x00000000 4854 #define mmRLC_CPAXI_DOORBELL_MON_CTRL_DEFAULT 0x00000000 4855 #define mmRLC_CPAXI_DOORBELL_MON_STAT_DEFAULT 0x00000000 4856 #define mmRLC_CPAXI_DOORBELL_MON_DATA_LSB_DEFAULT 0x00000000 4857 #define mmRLC_CPAXI_DOORBELL_MON_DATA_MSB_DEFAULT 0x00000000 4858 #define mmRLC_XT_DOORBELL_RANGE_DEFAULT 0x00000000 4859 #define mmRLC_XT_DOORBELL_CNTL_DEFAULT 0x00260000 4860 #define mmRLC_XT_DOORBELL_STAT_DEFAULT 0x00000000 4861 #define mmRLC_XT_DOORBELL_0_DATA_LO_DEFAULT 0x00000000 4862 #define mmRLC_XT_DOORBELL_0_DATA_HI_DEFAULT 0x00000000 4863 #define mmRLC_XT_DOORBELL_1_DATA_LO_DEFAULT 0x00000000 4864 #define mmRLC_XT_DOORBELL_1_DATA_HI_DEFAULT 0x00000000 4865 #define mmRLC_XT_DOORBELL_2_DATA_LO_DEFAULT 0x00000000 4866 #define mmRLC_XT_DOORBELL_2_DATA_HI_DEFAULT 0x00000000 4867 #define mmRLC_XT_DOORBELL_3_DATA_LO_DEFAULT 0x00000000 4868 #define mmRLC_XT_DOORBELL_3_DATA_HI_DEFAULT 0x00000000 4869 4870 4871 // addressBlock: gc_rlcrdec 4872 #define mmRLC_SPP_CAM_ADDR_DEFAULT 0x00000000 4873 #define mmRLC_SPP_CAM_DATA_DEFAULT 0x00000000 4874 #define mmRLC_SPP_CAM_EXT_ADDR_DEFAULT 0x00000000 4875 #define mmRLC_SPP_CAM_EXT_DATA_DEFAULT 0x00000000 4876 #define mmRLC_PACE_SCRATCH_ADDR_DEFAULT 0x00000000 4877 #define mmRLC_PACE_SCRATCH_DATA_DEFAULT 0x00000000 4878 4879 4880 // addressBlock: gc_rlcsdec 4881 #define mmRLC_RLCS_DEC_START_DEFAULT 0x00000000 4882 #define mmRLC_RLCS_DEC_DUMP_ADDR_DEFAULT 0x00000000 4883 #define mmRLC_RLCS_EXCEPTION_REG_1_DEFAULT 0x0003b984 4884 #define mmRLC_RLCS_EXCEPTION_REG_2_DEFAULT 0x0003b984 4885 #define mmRLC_RLCS_EXCEPTION_REG_3_DEFAULT 0x0003b984 4886 #define mmRLC_RLCS_EXCEPTION_REG_4_DEFAULT 0x0003b984 4887 #define mmRLC_RLCS_GENERAL_6_DEFAULT 0x00000000 4888 #define mmRLC_RLCS_GENERAL_7_DEFAULT 0x00000000 4889 #define mmRLC_RLCS_CGCG_REQUEST_DEFAULT 0x00000003 4890 #define mmRLC_RLCS_CGCG_STATUS_DEFAULT 0x00000000 4891 #define mmRLC_RLCS_SMU_GFXCLK_STATUS_DEFAULT 0x00000000 4892 #define mmRLC_RLCS_SMU_GFXCLK_CONTROL_DEFAULT 0x00000000 4893 #define mmRLC_RLCS_SOC_DS_CNTL_DEFAULT 0x00ff00c6 4894 #define mmRLC_RLCS_GFX_DS_CNTL_DEFAULT 0x00ff00c6 4895 #define mmRLC_GPM_STAT_DEFAULT 0x00a40012 4896 #define mmRLC_RLCS_GPM_STAT_DEFAULT 0x00a40012 4897 #define mmRLC_RLCS_ABORTED_PD_SEQUENCE_DEFAULT 0x00000000 4898 #define mmRLC_RLCS_DIDT_FORCE_STALL_DEFAULT 0x00000000 4899 #define mmRLC_RLCS_IOV_CMD_STATUS_DEFAULT 0x00000000 4900 #define mmRLC_RLCS_IOV_CNTX_LOC_SIZE_DEFAULT 0x00000000 4901 #define mmRLC_RLCS_IOV_SCH_BLOCK_DEFAULT 0x00000000 4902 #define mmRLC_RLCS_IOV_VM_BUSY_STATUS_DEFAULT 0x00000000 4903 #define mmRLC_RLCS_GPM_STAT_2_DEFAULT 0x00000000 4904 #define mmRLC_RLCS_GRBM_SOFT_RESET_DEFAULT 0x00000001 4905 #define mmRLC_RLCS_PG_CHANGE_STATUS_DEFAULT 0x00000000 4906 #define mmRLC_RLCS_PG_CHANGE_READ_DEFAULT 0x00000000 4907 #define mmRLC_RLCS_LB_STATUS_DEFAULT 0x00000000 4908 #define mmRLC_RLCS_LB_READ_DEFAULT 0x00000000 4909 #define mmRLC_RLCS_LB_CONTROL_DEFAULT 0x00000000 4910 #define mmRLC_RLCS_IH_SEMAPHORE_DEFAULT 0x00000000 4911 #define mmRLC_RLCS_IH_COOKIE_SEMAPHORE_DEFAULT 0x00000000 4912 #define mmRLC_RLCS_IH_CTRL_1_DEFAULT 0x00000000 4913 #define mmRLC_RLCS_IH_CTRL_2_DEFAULT 0x00000000 4914 #define mmRLC_RLCS_IH_CTRL_3_DEFAULT 0x00000000 4915 #define mmRLC_RLCS_IH_STATUS_DEFAULT 0x00000040 4916 #define mmRLC_RLCS_WGP_STATUS_DEFAULT 0x00000000 4917 #define mmRLC_RLCS_WGP_READ_DEFAULT 0x00000000 4918 #define mmRLC_RLCS_CP_INT_CTRL_1_DEFAULT 0x00000000 4919 #define mmRLC_RLCS_CP_INT_CTRL_2_DEFAULT 0x00000000 4920 #define mmRLC_RLCS_CP_INT_INFO_1_DEFAULT 0x00000000 4921 #define mmRLC_RLCS_CP_INT_INFO_2_DEFAULT 0x00000000 4922 #define mmRLC_RLCS_SPM_INT_CTRL_DEFAULT 0x00000000 4923 #define mmRLC_RLCS_SPM_INT_INFO_1_DEFAULT 0x00000000 4924 #define mmRLC_RLCS_SPM_INT_INFO_2_DEFAULT 0x00000000 4925 #define mmRLC_RLCS_DSM_TRIG_DEFAULT 0x00000000 4926 #define mmRLC_RLCS_BOOTLOAD_STATUS_DEFAULT 0x00000000 4927 #define mmRLC_RLCS_POWER_BRAKE_CNTL_DEFAULT 0x00000004 4928 #define mmRLC_RLCS_GENERAL_0_DEFAULT 0x00000000 4929 #define mmRLC_RLCS_GENERAL_1_DEFAULT 0x00000000 4930 #define mmRLC_RLCS_GENERAL_2_DEFAULT 0x00000000 4931 #define mmRLC_RLCS_GENERAL_3_DEFAULT 0x00000000 4932 #define mmRLC_RLCS_GENERAL_4_DEFAULT 0x00000000 4933 #define mmRLC_RLCS_GENERAL_5_DEFAULT 0x00000000 4934 #define mmRLC_RLCS_GRBM_IDLE_BUSY_STAT_DEFAULT 0x00000000 4935 #define mmRLC_RLCS_GRBM_IDLE_BUSY_INT_CNTL_DEFAULT 0x00000000 4936 #define mmRLC_RLCS_CMP_IDLE_CNTL_DEFAULT 0x00000100 4937 #define mmRLC_RLCS_POWER_BRAKE_CNTL_TH1_DEFAULT 0x00000004 4938 #define mmRLC_RLCS_AUXILIARY_REG_1_DEFAULT 0x0003b984 4939 #define mmRLC_RLCS_AUXILIARY_REG_2_DEFAULT 0x0003b984 4940 #define mmRLC_RLCS_AUXILIARY_REG_3_DEFAULT 0x0003b984 4941 #define mmRLC_RLCS_AUXILIARY_REG_4_DEFAULT 0x0003b984 4942 #define mmRLC_RLCS_SPM_SQTT_MODE_DEFAULT 0x00000000 4943 #define mmRLC_RLCS_CP_DMA_SRCID_OVER_DEFAULT 0x00000000 4944 #define mmRLC_RLCS_UTCL2_CNTL_DEFAULT 0x00000018 4945 #define mmRLC_RLCS_MP1_RLC_DOORBELL_CTRL_DEFAULT 0x00000000 4946 #define mmRLC_RLCS_BOOTLOAD_ID_STATUS1_DEFAULT 0x00000000 4947 #define mmRLC_RLCS_BOOTLOAD_ID_STATUS2_DEFAULT 0x00000000 4948 #define mmRLC_RLCS_SMUIO_VIDCHG_CTRL_DEFAULT 0x00000000 4949 #define mmRLC_RLCS_EDC_INT_CNTL_DEFAULT 0x00000000 4950 #define mmRLC_RLCS_KMD_LOG_CNTL1_DEFAULT 0x00000000 4951 #define mmRLC_RLCS_KMD_LOG_CNTL2_DEFAULT 0x00000000 4952 #define mmRLC_RLCS_GPM_LEGACY_INT_STAT_DEFAULT 0x00000000 4953 #define mmRLC_RLCS_GPM_LEGACY_INT_DISABLE_DEFAULT 0x00000003 4954 #define mmRLC_RLCS_SRM_SRCID_CNTL_DEFAULT 0x00000006 4955 #define mmRLC_RLCS_PERFMON_CLK_CNTL_UCODE_DEFAULT 0x00000001 4956 #define mmRLC_RLCS_DEC_END_DEFAULT 0x00000000 4957 4958 4959 // addressBlock: gc_pwrdec 4960 #define mmSQ_ALU_CLK_CTRL_DEFAULT 0x00000000 4961 #define mmSQ_TEX_CLK_CTRL_DEFAULT 0x00000000 4962 #define mmSQ_LDS_CLK_CTRL_DEFAULT 0x00000000 4963 #define mmRLC_GFX_RM_CNTL_DEFAULT 0x00000000 4964 4965 4966 // addressBlock: gc_hypdec 4967 #define mmCP_HYP_PFP_UCODE_ADDR_DEFAULT 0x00000000 4968 #define mmCP_PFP_UCODE_ADDR_DEFAULT 0x00000000 4969 #define mmCP_HYP_PFP_UCODE_DATA_DEFAULT 0x00000000 4970 #define mmCP_PFP_UCODE_DATA_DEFAULT 0x00000000 4971 #define mmCP_HYP_ME_UCODE_ADDR_DEFAULT 0x00000000 4972 #define mmCP_ME_RAM_RADDR_DEFAULT 0x00000000 4973 #define mmCP_ME_RAM_WADDR_DEFAULT 0x00000000 4974 #define mmCP_HYP_ME_UCODE_DATA_DEFAULT 0x00000000 4975 #define mmCP_ME_RAM_DATA_DEFAULT 0x00000000 4976 #define mmCP_CE_UCODE_ADDR_DEFAULT 0x00000000 4977 #define mmCP_HYP_CE_UCODE_ADDR_DEFAULT 0x00000000 4978 #define mmCP_CE_UCODE_DATA_DEFAULT 0x00000000 4979 #define mmCP_HYP_CE_UCODE_DATA_DEFAULT 0x00000000 4980 #define mmCP_HYP_MEC1_UCODE_ADDR_DEFAULT 0x00000000 4981 #define mmCP_MEC_ME1_UCODE_ADDR_DEFAULT 0x00000000 4982 #define mmCP_HYP_MEC1_UCODE_DATA_DEFAULT 0x00000000 4983 #define mmCP_MEC_ME1_UCODE_DATA_DEFAULT 0x00000000 4984 #define mmCP_HYP_MEC2_UCODE_ADDR_DEFAULT 0x00000000 4985 #define mmCP_MEC_ME2_UCODE_ADDR_DEFAULT 0x00000000 4986 #define mmCP_HYP_MEC2_UCODE_DATA_DEFAULT 0x00000000 4987 #define mmCP_MEC_ME2_UCODE_DATA_DEFAULT 0x00000000 4988 #define mmCP_PFP_IC_BASE_LO_DEFAULT 0x00000000 4989 #define mmCP_PFP_IC_BASE_HI_DEFAULT 0x00000000 4990 #define mmCP_PFP_IC_BASE_CNTL_DEFAULT 0x00000010 4991 #define mmCP_PFP_IC_OP_CNTL_DEFAULT 0x00000000 4992 #define mmCP_ME_IC_BASE_LO_DEFAULT 0x00000000 4993 #define mmCP_ME_IC_BASE_HI_DEFAULT 0x00000000 4994 #define mmCP_ME_IC_BASE_CNTL_DEFAULT 0x00000010 4995 #define mmCP_ME_IC_OP_CNTL_DEFAULT 0x00000000 4996 #define mmCP_CE_IC_BASE_LO_DEFAULT 0x00000000 4997 #define mmCP_CE_IC_BASE_HI_DEFAULT 0x00000000 4998 #define mmCP_CE_IC_BASE_CNTL_DEFAULT 0x00000010 4999 #define mmCP_CE_IC_OP_CNTL_DEFAULT 0x00000000 5000 #define mmCP_CPC_IC_BASE_LO_DEFAULT 0x00000000 5001 #define mmCP_CPC_IC_BASE_HI_DEFAULT 0x00000000 5002 #define mmCP_CPC_IC_BASE_CNTL_DEFAULT 0x00000010 5003 #define mmCP_CPC_IC_OP_CNTL_DEFAULT 0x00000000 5004 #define mmCP_MES_IC_BASE_LO_DEFAULT 0x00000000 5005 #define mmCP_MES_MIBASE_LO_DEFAULT 0x00000000 5006 #define mmCP_MES_IC_BASE_HI_DEFAULT 0x00000000 5007 #define mmCP_MES_MIBASE_HI_DEFAULT 0x00000000 5008 #define mmCP_MES_IC_BASE_CNTL_DEFAULT 0x00000000 5009 #define mmCP_MES_DC_BASE_LO_DEFAULT 0x00000000 5010 #define mmCP_MES_MDBASE_LO_DEFAULT 0x00000000 5011 #define mmCP_MES_DC_BASE_HI_DEFAULT 0x00000000 5012 #define mmCP_MES_MDBASE_HI_DEFAULT 0x00000000 5013 #define mmCP_MES_LOCAL_BASE0_LO_DEFAULT 0x00000000 5014 #define mmCP_MES_LOCAL_BASE0_HI_DEFAULT 0x00000000 5015 #define mmCP_MES_LOCAL_MASK0_LO_DEFAULT 0xffff0000 5016 #define mmCP_MES_LOCAL_MASK0_HI_DEFAULT 0x0000ffff 5017 #define mmCP_MES_LOCAL_APERTURE_DEFAULT 0x00000003 5018 #define mmCP_MES_MIBOUND_LO_DEFAULT 0x0000ffff 5019 #define mmCP_MES_MIBOUND_HI_DEFAULT 0x00000000 5020 #define mmCP_MES_MDBOUND_LO_DEFAULT 0x0000ffff 5021 #define mmCP_MES_MDBOUND_HI_DEFAULT 0x0000ffff 5022 #define mmGFX_PIPE_PRIORITY_DEFAULT 0x00000001 5023 #define mmGRBM_GFX_INDEX_SR_SELECT_DEFAULT 0x00000000 5024 #define mmGRBM_GFX_INDEX_SR_DATA_DEFAULT 0xe0000000 5025 #define mmGRBM_GFX_CNTL_SR_SELECT_DEFAULT 0x00000000 5026 #define mmGRBM_GFX_CNTL_SR_DATA_DEFAULT 0x00000000 5027 #define mmGRBM_CAM_INDEX_DEFAULT 0x00000000 5028 #define mmGRBM_HYP_CAM_INDEX_DEFAULT 0x00000000 5029 #define mmGRBM_CAM_DATA_DEFAULT 0x00000000 5030 #define mmGRBM_HYP_CAM_DATA_DEFAULT 0x00000000 5031 #define mmGRBM_CAM_DATA_UPPER_DEFAULT 0x00000000 5032 #define mmGRBM_HYP_CAM_DATA_UPPER_DEFAULT 0x00000000 5033 #define mmGC_IH_COOKIE_0_PTR_DEFAULT 0x00004300 5034 #define mmGRBM_SE_REMAP_CNTL_DEFAULT 0xeca86420 5035 #define mmRLC_GPU_IOV_VF_ENABLE_DEFAULT 0x00000000 5036 #define mmRLC_GPU_IOV_CFG_REG6_DEFAULT 0x00000000 5037 #define mmRLC_SDMA0_STATUS_DEFAULT 0x00000000 5038 #define mmRLC_SDMA1_STATUS_DEFAULT 0x00000000 5039 #define mmRLC_SDMA2_STATUS_DEFAULT 0x00000000 5040 #define mmRLC_SDMA3_STATUS_DEFAULT 0x00000000 5041 #define mmRLC_SDMA0_BUSY_STATUS_DEFAULT 0x00000000 5042 #define mmRLC_SDMA1_BUSY_STATUS_DEFAULT 0x00000000 5043 #define mmRLC_SDMA2_BUSY_STATUS_DEFAULT 0x00000000 5044 #define mmRLC_SDMA3_BUSY_STATUS_DEFAULT 0x00000000 5045 #define mmRLC_GPU_IOV_CFG_REG8_DEFAULT 0x00000000 5046 #define mmRLC_RLCV_TIMER_INT_0_DEFAULT 0x00000063 5047 #define mmRLC_RLCV_TIMER_CTRL_DEFAULT 0x00000000 5048 #define mmRLC_RLCV_TIMER_STAT_DEFAULT 0x00000000 5049 #define mmRLC_GPU_IOV_VF_DOORBELL_STATUS_DEFAULT 0x7fffffff 5050 #define mmRLC_GPU_IOV_VF_DOORBELL_STATUS_SET_DEFAULT 0x00000000 5051 #define mmRLC_GPU_IOV_VF_DOORBELL_STATUS_CLR_DEFAULT 0x00000000 5052 #define mmRLC_GPU_IOV_VF_MASK_DEFAULT 0x7fffffff 5053 #define mmRLC_HYP_SEMAPHORE_0_DEFAULT 0x00000000 5054 #define mmRLC_HYP_SEMAPHORE_1_DEFAULT 0x00000000 5055 #define mmRLC_BUSY_CLK_CNTL_DEFAULT 0x00000010 5056 #define mmRLC_CLK_CNTL_DEFAULT 0x00030c0f 5057 #define mmRLC_PACE_TIMER_STAT_DEFAULT 0x00000000 5058 #define mmRLC_GPU_IOV_SCH_BLOCK_DEFAULT 0x00000000 5059 #define mmRLC_GPU_IOV_CFG_REG1_DEFAULT 0x00000000 5060 #define mmRLC_GPU_IOV_CFG_REG2_DEFAULT 0x00000000 5061 #define mmRLC_GPU_IOV_VM_BUSY_STATUS_DEFAULT 0x00000000 5062 #define mmRLC_GPU_IOV_SCH_0_DEFAULT 0x00000000 5063 #define mmRLC_GPU_IOV_ACTIVE_FCN_ID_DEFAULT 0x00000000 5064 #define mmRLC_GPU_IOV_SCH_3_DEFAULT 0x00000000 5065 #define mmRLC_GPU_IOV_SCH_1_DEFAULT 0x00000000 5066 #define mmRLC_GPU_IOV_SCH_2_DEFAULT 0x00000000 5067 #define mmRLC_PACE_INT_FORCE_DEFAULT 0x00000000 5068 #define mmRLC_PACE_INT_CLEAR_DEFAULT 0x00000000 5069 #define mmRLC_GPU_IOV_INT_STAT_DEFAULT 0x00000000 5070 #define mmRLC_RLCV_TIMER_INT_1_DEFAULT 0x00000063 5071 #define mmRLC_IH_COOKIE_DEFAULT 0x00000000 5072 #define mmRLC_IH_COOKIE_CNTL_DEFAULT 0x00000002 5073 #define mmRLC_HYP_RLCG_UCODE_CHKSUM_DEFAULT 0x00000000 5074 #define mmRLC_HYP_RLCP_UCODE_CHKSUM_DEFAULT 0x00000000 5075 #define mmRLC_HYP_RLCV_UCODE_CHKSUM_DEFAULT 0x00000000 5076 #define mmRLC_GPU_IOV_F32_CNTL_DEFAULT 0x00000000 5077 #define mmRLC_GPU_IOV_F32_RESET_DEFAULT 0x00000000 5078 #define mmRLC_GPU_IOV_SMU_RESPONSE_DEFAULT 0x00000000 5079 #define mmRLC_GPU_IOV_VIRT_RESET_REQ_DEFAULT 0x00000000 5080 #define mmRLC_GPU_IOV_RLC_RESPONSE_DEFAULT 0x00000000 5081 #define mmRLC_GPU_IOV_INT_DISABLE_DEFAULT 0xffffffff 5082 #define mmRLC_GPU_IOV_INT_FORCE_DEFAULT 0x00000000 5083 #define mmRLC_HYP_SEMAPHORE_2_DEFAULT 0x00000000 5084 #define mmRLC_HYP_SEMAPHORE_3_DEFAULT 0x00000000 5085 #define mmRLC_HYP_RESET_VECTOR_DEFAULT 0x00000000 5086 #define mmRLC_HYP_BOOTLOAD_SIZE_DEFAULT 0x00000000 5087 #define mmRLC_HYP_BOOTLOAD_ADDR_LO_DEFAULT 0x00000000 5088 #define mmRLC_HYP_BOOTLOAD_ADDR_HI_DEFAULT 0x00000000 5089 #define mmRLC_GPM_IRAM_ADDR_DEFAULT 0x00000000 5090 #define mmRLC_GPM_IRAM_DATA_DEFAULT 0x00000000 5091 #define mmRLC_GPM_UCODE_ADDR_DEFAULT 0x00000000 5092 #define mmRLC_GPM_UCODE_DATA_DEFAULT 0x00000000 5093 #define mmRLC_PACE_UCODE_ADDR_DEFAULT 0x00000000 5094 #define mmRLC_PACE_UCODE_DATA_DEFAULT 0x00000000 5095 #define mmRLC_GPU_IOV_UCODE_ADDR_DEFAULT 0x00000000 5096 #define mmRLC_GPU_IOV_UCODE_DATA_DEFAULT 0x00000000 5097 #define mmRLC_GPU_IOV_SCRATCH_ADDR_DEFAULT 0x00000000 5098 #define mmRLC_GPU_IOV_SCRATCH_DATA_DEFAULT 0x00000000 5099 #define mmRLC_RLCV_IRAM_ADDR_DEFAULT 0x00000000 5100 #define mmRLC_RLCV_IRAM_DATA_DEFAULT 0x00000000 5101 #define mmRLC_RLCP_IRAM_ADDR_DEFAULT 0x00000000 5102 #define mmRLC_RLCP_IRAM_DATA_DEFAULT 0x00000000 5103 #define mmRLC_SRM_DRAM_ADDR_DEFAULT 0x00000000 5104 #define mmRLC_SRM_DRAM_DATA_DEFAULT 0x00000000 5105 #define mmRLC_SRM_ARAM_ADDR_DEFAULT 0x00000000 5106 #define mmRLC_SRM_ARAM_DATA_DEFAULT 0x00000000 5107 #define mmRLC_GPM_SCRATCH_ADDR_DEFAULT 0x00000000 5108 #define mmRLC_GPM_SCRATCH_DATA_DEFAULT 0x00000000 5109 #define mmRLC_GTS_OFFSET_LSB_DEFAULT 0x00000000 5110 #define mmRLC_GTS_OFFSET_MSB_DEFAULT 0x00000000 5111 #define mmRLC_GPU_IOV_SDMA0_STATUS_DEFAULT 0x0000000f 5112 #define mmRLC_GPU_IOV_SDMA1_STATUS_DEFAULT 0x0000000f 5113 #define mmRLC_GPU_IOV_SDMA2_STATUS_DEFAULT 0x0000000f 5114 #define mmRLC_GPU_IOV_SDMA3_STATUS_DEFAULT 0x0000000f 5115 #define mmRLC_GPU_IOV_SDMA4_STATUS_DEFAULT 0x0000000f 5116 #define mmRLC_GPU_IOV_SDMA5_STATUS_DEFAULT 0x0000000f 5117 #define mmRLC_GPU_IOV_SDMA6_STATUS_DEFAULT 0x0000000f 5118 #define mmRLC_GPU_IOV_SDMA7_STATUS_DEFAULT 0x0000000f 5119 #define mmRLC_GPU_IOV_SDMA0_BUSY_STATUS_DEFAULT 0x00000000 5120 #define mmRLC_GPU_IOV_SDMA1_BUSY_STATUS_DEFAULT 0x00000000 5121 #define mmRLC_GPU_IOV_SDMA2_BUSY_STATUS_DEFAULT 0x00000000 5122 #define mmRLC_GPU_IOV_SDMA3_BUSY_STATUS_DEFAULT 0x00000000 5123 #define mmRLC_GPU_IOV_SDMA4_BUSY_STATUS_DEFAULT 0x00000000 5124 #define mmRLC_GPU_IOV_SDMA5_BUSY_STATUS_DEFAULT 0x00000000 5125 #define mmRLC_GPU_IOV_SDMA6_BUSY_STATUS_DEFAULT 0x00000000 5126 #define mmRLC_GPU_IOV_SDMA7_BUSY_STATUS_DEFAULT 0x00000000 5127 5128 5129 // addressBlock: gc_sdma0_sdma0hypdec 5130 #define mmSDMA0_UCODE_ADDR_DEFAULT 0x00000000 5131 #define mmSDMA0_UCODE_DATA_DEFAULT 0x00000000 5132 #define mmSDMA0_VM_CTX_LO_DEFAULT 0x00000000 5133 #define mmSDMA0_VM_CTX_HI_DEFAULT 0x00000000 5134 #define mmSDMA0_ACTIVE_FCN_ID_DEFAULT 0x00000000 5135 #define mmSDMA0_VM_CTX_CNTL_DEFAULT 0x00000001 5136 #define mmSDMA0_VIRT_RESET_REQ_DEFAULT 0x00000000 5137 #define mmSDMA0_VF_ENABLE_DEFAULT 0x00000000 5138 #define mmSDMA0_CONTEXT_REG_TYPE0_DEFAULT 0xfffdf79f 5139 #define mmSDMA0_CONTEXT_REG_TYPE1_DEFAULT 0x003fbcff 5140 #define mmSDMA0_CONTEXT_REG_TYPE2_DEFAULT 0x00000fff 5141 #define mmSDMA0_CONTEXT_REG_TYPE3_DEFAULT 0x00000000 5142 #define mmSDMA0_PUB_REG_TYPE0_DEFAULT 0xf4000000 5143 #define mmSDMA0_PUB_REG_TYPE1_DEFAULT 0x30003882 5144 #define mmSDMA0_PUB_REG_TYPE2_DEFAULT 0x5c46e880 5145 #define mmSDMA0_PUB_REG_TYPE3_DEFAULT 0x20000004 5146 #define mmSDMA0_VM_CNTL_DEFAULT 0x00000000 5147 #define mmSDMA0_BROADCAST_UCODE_ADDR_DEFAULT 0x00000000 5148 #define mmSDMA0_BROADCAST_UCODE_DATA_DEFAULT 0x00000000 5149 5150 5151 // addressBlock: gc_sdma1_sdma1hypdec 5152 #define mmSDMA1_UCODE_ADDR_DEFAULT 0x00000000 5153 #define mmSDMA1_UCODE_DATA_DEFAULT 0x00000000 5154 #define mmSDMA1_VM_CTX_LO_DEFAULT 0x00000000 5155 #define mmSDMA1_VM_CTX_HI_DEFAULT 0x00000000 5156 #define mmSDMA1_ACTIVE_FCN_ID_DEFAULT 0x00000000 5157 #define mmSDMA1_VM_CTX_CNTL_DEFAULT 0x00000001 5158 #define mmSDMA1_VIRT_RESET_REQ_DEFAULT 0x00000000 5159 #define mmSDMA1_VF_ENABLE_DEFAULT 0x00000000 5160 #define mmSDMA1_CONTEXT_REG_TYPE0_DEFAULT 0xfffdf79f 5161 #define mmSDMA1_CONTEXT_REG_TYPE1_DEFAULT 0x003fbcff 5162 #define mmSDMA1_CONTEXT_REG_TYPE2_DEFAULT 0x00000fff 5163 #define mmSDMA1_CONTEXT_REG_TYPE3_DEFAULT 0x00000000 5164 #define mmSDMA1_PUB_REG_TYPE0_DEFAULT 0xf4000000 5165 #define mmSDMA1_PUB_REG_TYPE1_DEFAULT 0x30003882 5166 #define mmSDMA1_PUB_REG_TYPE2_DEFAULT 0x5c46e880 5167 #define mmSDMA1_PUB_REG_TYPE3_DEFAULT 0x20000004 5168 #define mmSDMA1_VM_CNTL_DEFAULT 0x00000000 5169 5170 5171 // addressBlock: gc_sdma2_sdma2hypdec 5172 #define mmSDMA2_UCODE_ADDR_DEFAULT 0x00000000 5173 #define mmSDMA2_UCODE_DATA_DEFAULT 0x00000000 5174 #define mmSDMA2_VM_CTX_LO_DEFAULT 0x00000000 5175 #define mmSDMA2_VM_CTX_HI_DEFAULT 0x00000000 5176 #define mmSDMA2_ACTIVE_FCN_ID_DEFAULT 0x00000000 5177 #define mmSDMA2_VM_CTX_CNTL_DEFAULT 0x00000001 5178 #define mmSDMA2_VIRT_RESET_REQ_DEFAULT 0x00000000 5179 #define mmSDMA2_VF_ENABLE_DEFAULT 0x00000000 5180 #define mmSDMA2_CONTEXT_REG_TYPE0_DEFAULT 0xfffdf79f 5181 #define mmSDMA2_CONTEXT_REG_TYPE1_DEFAULT 0x003fbcff 5182 #define mmSDMA2_CONTEXT_REG_TYPE2_DEFAULT 0x00000fff 5183 #define mmSDMA2_CONTEXT_REG_TYPE3_DEFAULT 0x00000000 5184 #define mmSDMA2_PUB_REG_TYPE0_DEFAULT 0xf4000000 5185 #define mmSDMA2_PUB_REG_TYPE1_DEFAULT 0x30003882 5186 #define mmSDMA2_PUB_REG_TYPE2_DEFAULT 0x5c46e880 5187 #define mmSDMA2_PUB_REG_TYPE3_DEFAULT 0x20000004 5188 #define mmSDMA2_VM_CNTL_DEFAULT 0x00000000 5189 5190 5191 // addressBlock: gc_sdma3_sdma3hypdec 5192 #define mmSDMA3_UCODE_ADDR_DEFAULT 0x00000000 5193 #define mmSDMA3_UCODE_DATA_DEFAULT 0x00000000 5194 #define mmSDMA3_VM_CTX_LO_DEFAULT 0x00000000 5195 #define mmSDMA3_VM_CTX_HI_DEFAULT 0x00000000 5196 #define mmSDMA3_ACTIVE_FCN_ID_DEFAULT 0x00000000 5197 #define mmSDMA3_VM_CTX_CNTL_DEFAULT 0x00000001 5198 #define mmSDMA3_VIRT_RESET_REQ_DEFAULT 0x00000000 5199 #define mmSDMA3_VF_ENABLE_DEFAULT 0x00000000 5200 #define mmSDMA3_CONTEXT_REG_TYPE0_DEFAULT 0xfffdf79f 5201 #define mmSDMA3_CONTEXT_REG_TYPE1_DEFAULT 0x003fbcff 5202 #define mmSDMA3_CONTEXT_REG_TYPE2_DEFAULT 0x00000fff 5203 #define mmSDMA3_CONTEXT_REG_TYPE3_DEFAULT 0x00000000 5204 #define mmSDMA3_PUB_REG_TYPE0_DEFAULT 0xf4000000 5205 #define mmSDMA3_PUB_REG_TYPE1_DEFAULT 0x30003882 5206 #define mmSDMA3_PUB_REG_TYPE2_DEFAULT 0x5c46e880 5207 #define mmSDMA3_PUB_REG_TYPE3_DEFAULT 0x20000004 5208 #define mmSDMA3_VM_CNTL_DEFAULT 0x00000000 5209 5210 5211 // addressBlock: gc_gcvmsharedhvdec 5212 #define mmGCMC_VM_FB_SIZE_OFFSET_VF0_DEFAULT 0x00000000 5213 #define mmGCMC_VM_FB_SIZE_OFFSET_VF1_DEFAULT 0x00000000 5214 #define mmGCMC_VM_FB_SIZE_OFFSET_VF2_DEFAULT 0x00000000 5215 #define mmGCMC_VM_FB_SIZE_OFFSET_VF3_DEFAULT 0x00000000 5216 #define mmGCMC_VM_FB_SIZE_OFFSET_VF4_DEFAULT 0x00000000 5217 #define mmGCMC_VM_FB_SIZE_OFFSET_VF5_DEFAULT 0x00000000 5218 #define mmGCMC_VM_FB_SIZE_OFFSET_VF6_DEFAULT 0x00000000 5219 #define mmGCMC_VM_FB_SIZE_OFFSET_VF7_DEFAULT 0x00000000 5220 #define mmGCMC_VM_FB_SIZE_OFFSET_VF8_DEFAULT 0x00000000 5221 #define mmGCMC_VM_FB_SIZE_OFFSET_VF9_DEFAULT 0x00000000 5222 #define mmGCMC_VM_FB_SIZE_OFFSET_VF10_DEFAULT 0x00000000 5223 #define mmGCMC_VM_FB_SIZE_OFFSET_VF11_DEFAULT 0x00000000 5224 #define mmGCMC_VM_FB_SIZE_OFFSET_VF12_DEFAULT 0x00000000 5225 #define mmGCMC_VM_FB_SIZE_OFFSET_VF13_DEFAULT 0x00000000 5226 #define mmGCMC_VM_FB_SIZE_OFFSET_VF14_DEFAULT 0x00000000 5227 #define mmGCMC_VM_FB_SIZE_OFFSET_VF15_DEFAULT 0x00000000 5228 #define mmGCMC_VM_FB_SIZE_OFFSET_VF16_DEFAULT 0x00000000 5229 #define mmGCMC_VM_FB_SIZE_OFFSET_VF17_DEFAULT 0x00000000 5230 #define mmGCMC_VM_FB_SIZE_OFFSET_VF18_DEFAULT 0x00000000 5231 #define mmGCMC_VM_FB_SIZE_OFFSET_VF19_DEFAULT 0x00000000 5232 #define mmGCMC_VM_FB_SIZE_OFFSET_VF20_DEFAULT 0x00000000 5233 #define mmGCMC_VM_FB_SIZE_OFFSET_VF21_DEFAULT 0x00000000 5234 #define mmGCMC_VM_FB_SIZE_OFFSET_VF22_DEFAULT 0x00000000 5235 #define mmGCMC_VM_FB_SIZE_OFFSET_VF23_DEFAULT 0x00000000 5236 #define mmGCMC_VM_FB_SIZE_OFFSET_VF24_DEFAULT 0x00000000 5237 #define mmGCMC_VM_FB_SIZE_OFFSET_VF25_DEFAULT 0x00000000 5238 #define mmGCMC_VM_FB_SIZE_OFFSET_VF26_DEFAULT 0x00000000 5239 #define mmGCMC_VM_FB_SIZE_OFFSET_VF27_DEFAULT 0x00000000 5240 #define mmGCMC_VM_FB_SIZE_OFFSET_VF28_DEFAULT 0x00000000 5241 #define mmGCMC_VM_FB_SIZE_OFFSET_VF29_DEFAULT 0x00000000 5242 #define mmGCMC_VM_FB_SIZE_OFFSET_VF30_DEFAULT 0x00000000 5243 #define mmGCMC_VM_FB_SIZE_OFFSET_VF31_DEFAULT 0x00000000 5244 #define mmGCVM_IOMMU_MMIO_CNTRL_1_DEFAULT 0x00000100 5245 #define mmGCMC_VM_MARC_BASE_LO_0_DEFAULT 0x00000000 5246 #define mmGCMC_VM_MARC_BASE_LO_1_DEFAULT 0x00000000 5247 #define mmGCMC_VM_MARC_BASE_LO_2_DEFAULT 0x00000000 5248 #define mmGCMC_VM_MARC_BASE_LO_3_DEFAULT 0x00000000 5249 #define mmGCMC_VM_MARC_BASE_HI_0_DEFAULT 0x00000000 5250 #define mmGCMC_VM_MARC_BASE_HI_1_DEFAULT 0x00000000 5251 #define mmGCMC_VM_MARC_BASE_HI_2_DEFAULT 0x00000000 5252 #define mmGCMC_VM_MARC_BASE_HI_3_DEFAULT 0x00000000 5253 #define mmGCMC_VM_MARC_RELOC_LO_0_DEFAULT 0x00000000 5254 #define mmGCMC_VM_MARC_RELOC_LO_1_DEFAULT 0x00000000 5255 #define mmGCMC_VM_MARC_RELOC_LO_2_DEFAULT 0x00000000 5256 #define mmGCMC_VM_MARC_RELOC_LO_3_DEFAULT 0x00000000 5257 #define mmGCMC_VM_MARC_RELOC_HI_0_DEFAULT 0x00000000 5258 #define mmGCMC_VM_MARC_RELOC_HI_1_DEFAULT 0x00000000 5259 #define mmGCMC_VM_MARC_RELOC_HI_2_DEFAULT 0x00000000 5260 #define mmGCMC_VM_MARC_RELOC_HI_3_DEFAULT 0x00000000 5261 #define mmGCMC_VM_MARC_LEN_LO_0_DEFAULT 0x00000000 5262 #define mmGCMC_VM_MARC_LEN_LO_1_DEFAULT 0x00000000 5263 #define mmGCMC_VM_MARC_LEN_LO_2_DEFAULT 0x00000000 5264 #define mmGCMC_VM_MARC_LEN_LO_3_DEFAULT 0x00000000 5265 #define mmGCMC_VM_MARC_LEN_HI_0_DEFAULT 0x00000000 5266 #define mmGCMC_VM_MARC_LEN_HI_1_DEFAULT 0x00000000 5267 #define mmGCMC_VM_MARC_LEN_HI_2_DEFAULT 0x00000000 5268 #define mmGCMC_VM_MARC_LEN_HI_3_DEFAULT 0x00000000 5269 #define mmGCVM_IOMMU_CONTROL_REGISTER_DEFAULT 0x00000000 5270 #define mmGCVM_IOMMU_PERFORMANCE_OPTIMIZATION_CONTROL_REGISTER_DEFAULT 0x00000000 5271 #define mmGCMC_VM_XGMI_GPUIOV_ENABLE_DEFAULT 0x00000000 5272 5273 5274 // addressBlock: gc_pspdec 5275 #define mmCPG_PSP_DEBUG_DEFAULT 0x00000000 5276 #define mmCPC_PSP_DEBUG_DEFAULT 0x00000000 5277 #define mmGRBM_SEC_CNTL_DEFAULT 0x00000000 5278 #define mmRLC_FWL_FIRST_VIOL_ADDR_DEFAULT 0x00000000 5279 #define mmRLC_SRM_FWL_FIRST_VIOL_ADDR_DEFAULT 0x00000000 5280 5281 5282 // addressBlock: gc_gcvml2pspdec 5283 #define mmGCVM_L2_ID_CTRL0_DEFAULT 0xffffffff 5284 #define mmGCVM_L2_ID_CTRL1_DEFAULT 0xffffffff 5285 #define mmGCVM_L2_ID_CTRL2_DEFAULT 0xffffffff 5286 #define mmGCVM_L2_ID_CTRL3_DEFAULT 0xffffffff 5287 #define mmGCVM_L2_ID_CTRL4_DEFAULT 0xffffffff 5288 #define mmGCVM_L2_ID_CTRL5_DEFAULT 0xffffffff 5289 #define mmGCVM_L2_ID_CTRL6_DEFAULT 0xffffffff 5290 #define mmGCVM_L2_ID_CTRL7_DEFAULT 0xffffffff 5291 #define mmGCVM_L2_ID_CTRL_HI_DEFAULT 0x0000ffff 5292 #define mmGCVM_L2_ID_STATUS_DEFAULT 0x00000000 5293 #define mmGCUTCL2_TRANSLATION_BYPASS_BY_VMID_DEFAULT 0x00000000 5294 #define mmGCVM_IOMMU_GPU_HOST_TRANSLATION_ENABLE_DEFAULT 0x00000000 5295 #define mmGCUTC_GPUVA_VMID_TRANSLATION_ASSIST_REQUEST_LO_DEFAULT 0x00000000 5296 #define mmGCUTC_GPUVA_VMID_TRANSLATION_ASSIST_REQUEST_HI_DEFAULT 0x00000000 5297 #define mmGCUTC_GPUVA_VMID_TRANSLATION_ASSIST_RESPONSE_LO_DEFAULT 0x00000000 5298 #define mmGCUTC_GPUVA_VMID_TRANSLATION_ASSIST_RESPONSE_HI_DEFAULT 0x00000000 5299 5300 5301 // addressBlock: gc_sdma2_sdma2dec 5302 #define mmSDMA2_DEC_START_DEFAULT 0x00000000 5303 #define mmSDMA2_GLOBAL_TIMESTAMP_LO_DEFAULT 0x00000000 5304 #define mmSDMA2_GLOBAL_TIMESTAMP_HI_DEFAULT 0x00000000 5305 #define mmSDMA2_PG_CNTL_DEFAULT 0x00000000 5306 #define mmSDMA2_PG_CTX_LO_DEFAULT 0x00000000 5307 #define mmSDMA2_PG_CTX_HI_DEFAULT 0x00000000 5308 #define mmSDMA2_PG_CTX_CNTL_DEFAULT 0x00000000 5309 #define mmSDMA2_POWER_CNTL_DEFAULT 0x40000050 5310 #define mmSDMA2_CLK_CTRL_DEFAULT 0x00000100 5311 #define mmSDMA2_CNTL_DEFAULT 0x000000c2 5312 #define mmSDMA2_CHICKEN_BITS_DEFAULT 0x03ef0107 5313 #define mmSDMA2_GB_ADDR_CONFIG_DEFAULT 0x00000444 5314 #define mmSDMA2_GB_ADDR_CONFIG_READ_DEFAULT 0x00000444 5315 #define mmSDMA2_RB_RPTR_FETCH_HI_DEFAULT 0x00000000 5316 #define mmSDMA2_SEM_WAIT_FAIL_TIMER_CNTL_DEFAULT 0x00000000 5317 #define mmSDMA2_RB_RPTR_FETCH_DEFAULT 0x00000000 5318 #define mmSDMA2_IB_OFFSET_FETCH_DEFAULT 0x00000000 5319 #define mmSDMA2_PROGRAM_DEFAULT 0x00000000 5320 #define mmSDMA2_STATUS_REG_DEFAULT 0x46dee557 5321 #define mmSDMA2_STATUS1_REG_DEFAULT 0x000003ff 5322 #define mmSDMA2_RD_BURST_CNTL_DEFAULT 0x00000002 5323 #define mmSDMA2_HBM_PAGE_CONFIG_DEFAULT 0x00000000 5324 #define mmSDMA2_UCODE_CHECKSUM_DEFAULT 0x00000000 5325 #define mmSDMA2_F32_CNTL_DEFAULT 0x00000001 5326 #define mmSDMA2_FREEZE_DEFAULT 0x00000000 5327 #define mmSDMA2_PHASE0_QUANTUM_DEFAULT 0x00010002 5328 #define mmSDMA2_PHASE1_QUANTUM_DEFAULT 0x00010002 5329 #define mmSDMA2_EDC_CONFIG_DEFAULT 0x00000002 5330 #define mmSDMA2_BA_THRESHOLD_DEFAULT 0x03ff03ff 5331 #define mmSDMA2_ID_DEFAULT 0x00000001 5332 #define mmSDMA2_VERSION_DEFAULT 0x00000500 5333 #define mmSDMA2_EDC_COUNTER_DEFAULT 0x00000000 5334 #define mmSDMA2_EDC_COUNTER_CLEAR_DEFAULT 0x00000000 5335 #define mmSDMA2_STATUS2_REG_DEFAULT 0x00000001 5336 #define mmSDMA2_ATOMIC_CNTL_DEFAULT 0x00000200 5337 #define mmSDMA2_ATOMIC_PREOP_LO_DEFAULT 0x00000000 5338 #define mmSDMA2_ATOMIC_PREOP_HI_DEFAULT 0x00000000 5339 #define mmSDMA2_UTCL1_CNTL_DEFAULT 0xd0000191 5340 #define mmSDMA2_UTCL1_WATERMK_DEFAULT 0xfffbd9fb 5341 #define mmSDMA2_UTCL1_RD_STATUS_DEFAULT 0x01011555 5342 #define mmSDMA2_UTCL1_WR_STATUS_DEFAULT 0x51011555 5343 #define mmSDMA2_UTCL1_INV0_DEFAULT 0x00000800 5344 #define mmSDMA2_UTCL1_INV1_DEFAULT 0x00000000 5345 #define mmSDMA2_UTCL1_INV2_DEFAULT 0x00000000 5346 #define mmSDMA2_UTCL1_RD_XNACK0_DEFAULT 0x00000000 5347 #define mmSDMA2_UTCL1_RD_XNACK1_DEFAULT 0x00000000 5348 #define mmSDMA2_UTCL1_WR_XNACK0_DEFAULT 0x00000000 5349 #define mmSDMA2_UTCL1_WR_XNACK1_DEFAULT 0x00000000 5350 #define mmSDMA2_UTCL1_TIMEOUT_DEFAULT 0x00000000 5351 #define mmSDMA2_UTCL1_PAGE_DEFAULT 0x010cec00 5352 #define mmSDMA2_RELAX_ORDERING_LUT_DEFAULT 0xc0000006 5353 #define mmSDMA2_CHICKEN_BITS_2_DEFAULT 0x00100007 5354 #define mmSDMA2_STATUS3_REG_DEFAULT 0x03f00000 5355 #define mmSDMA2_PHYSICAL_ADDR_LO_DEFAULT 0x00000000 5356 #define mmSDMA2_PHYSICAL_ADDR_HI_DEFAULT 0x00000000 5357 #define mmSDMA2_PHASE2_QUANTUM_DEFAULT 0x00010002 5358 #define mmSDMA2_ERROR_LOG_DEFAULT 0x0000000f 5359 #define mmSDMA2_PUB_DUMMY_REG0_DEFAULT 0x00000000 5360 #define mmSDMA2_PUB_DUMMY_REG1_DEFAULT 0x00000000 5361 #define mmSDMA2_PUB_DUMMY_REG2_DEFAULT 0x00000000 5362 #define mmSDMA2_PUB_DUMMY_REG3_DEFAULT 0x00000000 5363 #define mmSDMA2_F32_COUNTER_DEFAULT 0x00000000 5364 #define mmSDMA2_CRD_CNTL_DEFAULT 0x1850c640 5365 #define mmSDMA2_AQL_STATUS_DEFAULT 0x00000003 5366 #define mmSDMA2_EA_DBIT_ADDR_DATA_DEFAULT 0x00000000 5367 #define mmSDMA2_EA_DBIT_ADDR_INDEX_DEFAULT 0x00000000 5368 #define mmSDMA2_TLBI_GCR_CNTL_DEFAULT 0x40180454 5369 #define mmSDMA2_TILING_CONFIG_DEFAULT 0x00000000 5370 #define mmSDMA2_INT_STATUS_DEFAULT 0x00000000 5371 #define mmSDMA2_HOLE_ADDR_LO_DEFAULT 0x00000000 5372 #define mmSDMA2_HOLE_ADDR_HI_DEFAULT 0x00000000 5373 #define mmSDMA2_CLOCK_GATING_REG_DEFAULT 0x00000000 5374 #define mmSDMA2_STATUS4_REG_DEFAULT 0x00000001 5375 #define mmSDMA2_SCRATCH_RAM_DATA_DEFAULT 0x00000000 5376 #define mmSDMA2_SCRATCH_RAM_ADDR_DEFAULT 0x00000000 5377 #define mmSDMA2_TIMESTAMP_CNTL_DEFAULT 0x00000000 5378 #define mmSDMA2_STATUS5_REG_DEFAULT 0x00000000 5379 #define mmSDMA2_QUEUE_RESET_REQ_DEFAULT 0x00000000 5380 #define mmSDMA2_GFX_RB_CNTL_DEFAULT 0x80840000 5381 #define mmSDMA2_GFX_RB_BASE_DEFAULT 0x00000000 5382 #define mmSDMA2_GFX_RB_BASE_HI_DEFAULT 0x00000000 5383 #define mmSDMA2_GFX_RB_RPTR_DEFAULT 0x00000000 5384 #define mmSDMA2_GFX_RB_RPTR_HI_DEFAULT 0x00000000 5385 #define mmSDMA2_GFX_RB_WPTR_DEFAULT 0x00000000 5386 #define mmSDMA2_GFX_RB_WPTR_HI_DEFAULT 0x00000000 5387 #define mmSDMA2_GFX_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 5388 #define mmSDMA2_GFX_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 5389 #define mmSDMA2_GFX_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 5390 #define mmSDMA2_GFX_IB_CNTL_DEFAULT 0x00000100 5391 #define mmSDMA2_GFX_IB_RPTR_DEFAULT 0x00000000 5392 #define mmSDMA2_GFX_IB_OFFSET_DEFAULT 0x00000000 5393 #define mmSDMA2_GFX_IB_BASE_LO_DEFAULT 0x00000000 5394 #define mmSDMA2_GFX_IB_BASE_HI_DEFAULT 0x00000000 5395 #define mmSDMA2_GFX_IB_SIZE_DEFAULT 0x00000000 5396 #define mmSDMA2_GFX_SKIP_CNTL_DEFAULT 0x00000000 5397 #define mmSDMA2_GFX_CONTEXT_STATUS_DEFAULT 0x00000005 5398 #define mmSDMA2_GFX_DOORBELL_DEFAULT 0x00000000 5399 #define mmSDMA2_GFX_CONTEXT_CNTL_DEFAULT 0x00000000 5400 #define mmSDMA2_GFX_STATUS_DEFAULT 0x00000000 5401 #define mmSDMA2_GFX_DOORBELL_LOG_DEFAULT 0x00000000 5402 #define mmSDMA2_GFX_WATERMARK_DEFAULT 0x00000000 5403 #define mmSDMA2_GFX_DOORBELL_OFFSET_DEFAULT 0x00000000 5404 #define mmSDMA2_GFX_CSA_ADDR_LO_DEFAULT 0x00000000 5405 #define mmSDMA2_GFX_CSA_ADDR_HI_DEFAULT 0x00000000 5406 #define mmSDMA2_GFX_IB_SUB_REMAIN_DEFAULT 0x00000000 5407 #define mmSDMA2_GFX_PREEMPT_DEFAULT 0x00000000 5408 #define mmSDMA2_GFX_DUMMY_REG_DEFAULT 0x0000000f 5409 #define mmSDMA2_GFX_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 5410 #define mmSDMA2_GFX_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 5411 #define mmSDMA2_GFX_RB_AQL_CNTL_DEFAULT 0x00004000 5412 #define mmSDMA2_GFX_MINOR_PTR_UPDATE_DEFAULT 0x00000000 5413 #define mmSDMA2_GFX_MIDCMD_DATA0_DEFAULT 0x00000000 5414 #define mmSDMA2_GFX_MIDCMD_DATA1_DEFAULT 0x00000000 5415 #define mmSDMA2_GFX_MIDCMD_DATA2_DEFAULT 0x00000000 5416 #define mmSDMA2_GFX_MIDCMD_DATA3_DEFAULT 0x00000000 5417 #define mmSDMA2_GFX_MIDCMD_DATA4_DEFAULT 0x00000000 5418 #define mmSDMA2_GFX_MIDCMD_DATA5_DEFAULT 0x00000000 5419 #define mmSDMA2_GFX_MIDCMD_DATA6_DEFAULT 0x00000000 5420 #define mmSDMA2_GFX_MIDCMD_DATA7_DEFAULT 0x00000000 5421 #define mmSDMA2_GFX_MIDCMD_DATA8_DEFAULT 0x00000000 5422 #define mmSDMA2_GFX_MIDCMD_DATA9_DEFAULT 0x00000000 5423 #define mmSDMA2_GFX_MIDCMD_DATA10_DEFAULT 0x00000000 5424 #define mmSDMA2_GFX_MIDCMD_CNTL_DEFAULT 0x00000000 5425 #define mmSDMA2_PAGE_RB_CNTL_DEFAULT 0x80840000 5426 #define mmSDMA2_PAGE_RB_BASE_DEFAULT 0x00000000 5427 #define mmSDMA2_PAGE_RB_BASE_HI_DEFAULT 0x00000000 5428 #define mmSDMA2_PAGE_RB_RPTR_DEFAULT 0x00000000 5429 #define mmSDMA2_PAGE_RB_RPTR_HI_DEFAULT 0x00000000 5430 #define mmSDMA2_PAGE_RB_WPTR_DEFAULT 0x00000000 5431 #define mmSDMA2_PAGE_RB_WPTR_HI_DEFAULT 0x00000000 5432 #define mmSDMA2_PAGE_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 5433 #define mmSDMA2_PAGE_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 5434 #define mmSDMA2_PAGE_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 5435 #define mmSDMA2_PAGE_IB_CNTL_DEFAULT 0x00000100 5436 #define mmSDMA2_PAGE_IB_RPTR_DEFAULT 0x00000000 5437 #define mmSDMA2_PAGE_IB_OFFSET_DEFAULT 0x00000000 5438 #define mmSDMA2_PAGE_IB_BASE_LO_DEFAULT 0x00000000 5439 #define mmSDMA2_PAGE_IB_BASE_HI_DEFAULT 0x00000000 5440 #define mmSDMA2_PAGE_IB_SIZE_DEFAULT 0x00000000 5441 #define mmSDMA2_PAGE_SKIP_CNTL_DEFAULT 0x00000000 5442 #define mmSDMA2_PAGE_CONTEXT_STATUS_DEFAULT 0x00000004 5443 #define mmSDMA2_PAGE_DOORBELL_DEFAULT 0x00000000 5444 #define mmSDMA2_PAGE_STATUS_DEFAULT 0x00000000 5445 #define mmSDMA2_PAGE_DOORBELL_LOG_DEFAULT 0x00000000 5446 #define mmSDMA2_PAGE_WATERMARK_DEFAULT 0x00000000 5447 #define mmSDMA2_PAGE_DOORBELL_OFFSET_DEFAULT 0x00000000 5448 #define mmSDMA2_PAGE_CSA_ADDR_LO_DEFAULT 0x00000000 5449 #define mmSDMA2_PAGE_CSA_ADDR_HI_DEFAULT 0x00000000 5450 #define mmSDMA2_PAGE_IB_SUB_REMAIN_DEFAULT 0x00000000 5451 #define mmSDMA2_PAGE_PREEMPT_DEFAULT 0x00000000 5452 #define mmSDMA2_PAGE_DUMMY_REG_DEFAULT 0x0000000f 5453 #define mmSDMA2_PAGE_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 5454 #define mmSDMA2_PAGE_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 5455 #define mmSDMA2_PAGE_RB_AQL_CNTL_DEFAULT 0x00004000 5456 #define mmSDMA2_PAGE_MINOR_PTR_UPDATE_DEFAULT 0x00000000 5457 #define mmSDMA2_PAGE_MIDCMD_DATA0_DEFAULT 0x00000000 5458 #define mmSDMA2_PAGE_MIDCMD_DATA1_DEFAULT 0x00000000 5459 #define mmSDMA2_PAGE_MIDCMD_DATA2_DEFAULT 0x00000000 5460 #define mmSDMA2_PAGE_MIDCMD_DATA3_DEFAULT 0x00000000 5461 #define mmSDMA2_PAGE_MIDCMD_DATA4_DEFAULT 0x00000000 5462 #define mmSDMA2_PAGE_MIDCMD_DATA5_DEFAULT 0x00000000 5463 #define mmSDMA2_PAGE_MIDCMD_DATA6_DEFAULT 0x00000000 5464 #define mmSDMA2_PAGE_MIDCMD_DATA7_DEFAULT 0x00000000 5465 #define mmSDMA2_PAGE_MIDCMD_DATA8_DEFAULT 0x00000000 5466 #define mmSDMA2_PAGE_MIDCMD_DATA9_DEFAULT 0x00000000 5467 #define mmSDMA2_PAGE_MIDCMD_DATA10_DEFAULT 0x00000000 5468 #define mmSDMA2_PAGE_MIDCMD_CNTL_DEFAULT 0x00000000 5469 #define mmSDMA2_RLC0_RB_CNTL_DEFAULT 0x80040000 5470 #define mmSDMA2_RLC0_RB_BASE_DEFAULT 0x00000000 5471 #define mmSDMA2_RLC0_RB_BASE_HI_DEFAULT 0x00000000 5472 #define mmSDMA2_RLC0_RB_RPTR_DEFAULT 0x00000000 5473 #define mmSDMA2_RLC0_RB_RPTR_HI_DEFAULT 0x00000000 5474 #define mmSDMA2_RLC0_RB_WPTR_DEFAULT 0x00000000 5475 #define mmSDMA2_RLC0_RB_WPTR_HI_DEFAULT 0x00000000 5476 #define mmSDMA2_RLC0_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 5477 #define mmSDMA2_RLC0_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 5478 #define mmSDMA2_RLC0_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 5479 #define mmSDMA2_RLC0_IB_CNTL_DEFAULT 0x00000100 5480 #define mmSDMA2_RLC0_IB_RPTR_DEFAULT 0x00000000 5481 #define mmSDMA2_RLC0_IB_OFFSET_DEFAULT 0x00000000 5482 #define mmSDMA2_RLC0_IB_BASE_LO_DEFAULT 0x00000000 5483 #define mmSDMA2_RLC0_IB_BASE_HI_DEFAULT 0x00000000 5484 #define mmSDMA2_RLC0_IB_SIZE_DEFAULT 0x00000000 5485 #define mmSDMA2_RLC0_SKIP_CNTL_DEFAULT 0x00000000 5486 #define mmSDMA2_RLC0_CONTEXT_STATUS_DEFAULT 0x00000004 5487 #define mmSDMA2_RLC0_DOORBELL_DEFAULT 0x00000000 5488 #define mmSDMA2_RLC0_STATUS_DEFAULT 0x00000000 5489 #define mmSDMA2_RLC0_DOORBELL_LOG_DEFAULT 0x00000000 5490 #define mmSDMA2_RLC0_WATERMARK_DEFAULT 0x00000000 5491 #define mmSDMA2_RLC0_DOORBELL_OFFSET_DEFAULT 0x00000000 5492 #define mmSDMA2_RLC0_CSA_ADDR_LO_DEFAULT 0x00000000 5493 #define mmSDMA2_RLC0_CSA_ADDR_HI_DEFAULT 0x00000000 5494 #define mmSDMA2_RLC0_IB_SUB_REMAIN_DEFAULT 0x00000000 5495 #define mmSDMA2_RLC0_PREEMPT_DEFAULT 0x00000000 5496 #define mmSDMA2_RLC0_DUMMY_REG_DEFAULT 0x0000000f 5497 #define mmSDMA2_RLC0_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 5498 #define mmSDMA2_RLC0_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 5499 #define mmSDMA2_RLC0_RB_AQL_CNTL_DEFAULT 0x00004000 5500 #define mmSDMA2_RLC0_MINOR_PTR_UPDATE_DEFAULT 0x00000000 5501 #define mmSDMA2_RLC0_MIDCMD_DATA0_DEFAULT 0x00000000 5502 #define mmSDMA2_RLC0_MIDCMD_DATA1_DEFAULT 0x00000000 5503 #define mmSDMA2_RLC0_MIDCMD_DATA2_DEFAULT 0x00000000 5504 #define mmSDMA2_RLC0_MIDCMD_DATA3_DEFAULT 0x00000000 5505 #define mmSDMA2_RLC0_MIDCMD_DATA4_DEFAULT 0x00000000 5506 #define mmSDMA2_RLC0_MIDCMD_DATA5_DEFAULT 0x00000000 5507 #define mmSDMA2_RLC0_MIDCMD_DATA6_DEFAULT 0x00000000 5508 #define mmSDMA2_RLC0_MIDCMD_DATA7_DEFAULT 0x00000000 5509 #define mmSDMA2_RLC0_MIDCMD_DATA8_DEFAULT 0x00000000 5510 #define mmSDMA2_RLC0_MIDCMD_DATA9_DEFAULT 0x00000000 5511 #define mmSDMA2_RLC0_MIDCMD_DATA10_DEFAULT 0x00000000 5512 #define mmSDMA2_RLC0_MIDCMD_CNTL_DEFAULT 0x00000000 5513 #define mmSDMA2_RLC1_RB_CNTL_DEFAULT 0x80040000 5514 #define mmSDMA2_RLC1_RB_BASE_DEFAULT 0x00000000 5515 #define mmSDMA2_RLC1_RB_BASE_HI_DEFAULT 0x00000000 5516 #define mmSDMA2_RLC1_RB_RPTR_DEFAULT 0x00000000 5517 #define mmSDMA2_RLC1_RB_RPTR_HI_DEFAULT 0x00000000 5518 #define mmSDMA2_RLC1_RB_WPTR_DEFAULT 0x00000000 5519 #define mmSDMA2_RLC1_RB_WPTR_HI_DEFAULT 0x00000000 5520 #define mmSDMA2_RLC1_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 5521 #define mmSDMA2_RLC1_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 5522 #define mmSDMA2_RLC1_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 5523 #define mmSDMA2_RLC1_IB_CNTL_DEFAULT 0x00000100 5524 #define mmSDMA2_RLC1_IB_RPTR_DEFAULT 0x00000000 5525 #define mmSDMA2_RLC1_IB_OFFSET_DEFAULT 0x00000000 5526 #define mmSDMA2_RLC1_IB_BASE_LO_DEFAULT 0x00000000 5527 #define mmSDMA2_RLC1_IB_BASE_HI_DEFAULT 0x00000000 5528 #define mmSDMA2_RLC1_IB_SIZE_DEFAULT 0x00000000 5529 #define mmSDMA2_RLC1_SKIP_CNTL_DEFAULT 0x00000000 5530 #define mmSDMA2_RLC1_CONTEXT_STATUS_DEFAULT 0x00000004 5531 #define mmSDMA2_RLC1_DOORBELL_DEFAULT 0x00000000 5532 #define mmSDMA2_RLC1_STATUS_DEFAULT 0x00000000 5533 #define mmSDMA2_RLC1_DOORBELL_LOG_DEFAULT 0x00000000 5534 #define mmSDMA2_RLC1_WATERMARK_DEFAULT 0x00000000 5535 #define mmSDMA2_RLC1_DOORBELL_OFFSET_DEFAULT 0x00000000 5536 #define mmSDMA2_RLC1_CSA_ADDR_LO_DEFAULT 0x00000000 5537 #define mmSDMA2_RLC1_CSA_ADDR_HI_DEFAULT 0x00000000 5538 #define mmSDMA2_RLC1_IB_SUB_REMAIN_DEFAULT 0x00000000 5539 #define mmSDMA2_RLC1_PREEMPT_DEFAULT 0x00000000 5540 #define mmSDMA2_RLC1_DUMMY_REG_DEFAULT 0x0000000f 5541 #define mmSDMA2_RLC1_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 5542 #define mmSDMA2_RLC1_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 5543 #define mmSDMA2_RLC1_RB_AQL_CNTL_DEFAULT 0x00004000 5544 #define mmSDMA2_RLC1_MINOR_PTR_UPDATE_DEFAULT 0x00000000 5545 #define mmSDMA2_RLC1_MIDCMD_DATA0_DEFAULT 0x00000000 5546 #define mmSDMA2_RLC1_MIDCMD_DATA1_DEFAULT 0x00000000 5547 #define mmSDMA2_RLC1_MIDCMD_DATA2_DEFAULT 0x00000000 5548 #define mmSDMA2_RLC1_MIDCMD_DATA3_DEFAULT 0x00000000 5549 #define mmSDMA2_RLC1_MIDCMD_DATA4_DEFAULT 0x00000000 5550 #define mmSDMA2_RLC1_MIDCMD_DATA5_DEFAULT 0x00000000 5551 #define mmSDMA2_RLC1_MIDCMD_DATA6_DEFAULT 0x00000000 5552 #define mmSDMA2_RLC1_MIDCMD_DATA7_DEFAULT 0x00000000 5553 #define mmSDMA2_RLC1_MIDCMD_DATA8_DEFAULT 0x00000000 5554 #define mmSDMA2_RLC1_MIDCMD_DATA9_DEFAULT 0x00000000 5555 #define mmSDMA2_RLC1_MIDCMD_DATA10_DEFAULT 0x00000000 5556 #define mmSDMA2_RLC1_MIDCMD_CNTL_DEFAULT 0x00000000 5557 #define mmSDMA2_RLC2_RB_CNTL_DEFAULT 0x80040000 5558 #define mmSDMA2_RLC2_RB_BASE_DEFAULT 0x00000000 5559 #define mmSDMA2_RLC2_RB_BASE_HI_DEFAULT 0x00000000 5560 #define mmSDMA2_RLC2_RB_RPTR_DEFAULT 0x00000000 5561 #define mmSDMA2_RLC2_RB_RPTR_HI_DEFAULT 0x00000000 5562 #define mmSDMA2_RLC2_RB_WPTR_DEFAULT 0x00000000 5563 #define mmSDMA2_RLC2_RB_WPTR_HI_DEFAULT 0x00000000 5564 #define mmSDMA2_RLC2_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 5565 #define mmSDMA2_RLC2_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 5566 #define mmSDMA2_RLC2_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 5567 #define mmSDMA2_RLC2_IB_CNTL_DEFAULT 0x00000100 5568 #define mmSDMA2_RLC2_IB_RPTR_DEFAULT 0x00000000 5569 #define mmSDMA2_RLC2_IB_OFFSET_DEFAULT 0x00000000 5570 #define mmSDMA2_RLC2_IB_BASE_LO_DEFAULT 0x00000000 5571 #define mmSDMA2_RLC2_IB_BASE_HI_DEFAULT 0x00000000 5572 #define mmSDMA2_RLC2_IB_SIZE_DEFAULT 0x00000000 5573 #define mmSDMA2_RLC2_SKIP_CNTL_DEFAULT 0x00000000 5574 #define mmSDMA2_RLC2_CONTEXT_STATUS_DEFAULT 0x00000004 5575 #define mmSDMA2_RLC2_DOORBELL_DEFAULT 0x00000000 5576 #define mmSDMA2_RLC2_STATUS_DEFAULT 0x00000000 5577 #define mmSDMA2_RLC2_DOORBELL_LOG_DEFAULT 0x00000000 5578 #define mmSDMA2_RLC2_WATERMARK_DEFAULT 0x00000000 5579 #define mmSDMA2_RLC2_DOORBELL_OFFSET_DEFAULT 0x00000000 5580 #define mmSDMA2_RLC2_CSA_ADDR_LO_DEFAULT 0x00000000 5581 #define mmSDMA2_RLC2_CSA_ADDR_HI_DEFAULT 0x00000000 5582 #define mmSDMA2_RLC2_IB_SUB_REMAIN_DEFAULT 0x00000000 5583 #define mmSDMA2_RLC2_PREEMPT_DEFAULT 0x00000000 5584 #define mmSDMA2_RLC2_DUMMY_REG_DEFAULT 0x0000000f 5585 #define mmSDMA2_RLC2_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 5586 #define mmSDMA2_RLC2_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 5587 #define mmSDMA2_RLC2_RB_AQL_CNTL_DEFAULT 0x00004000 5588 #define mmSDMA2_RLC2_MINOR_PTR_UPDATE_DEFAULT 0x00000000 5589 #define mmSDMA2_RLC2_MIDCMD_DATA0_DEFAULT 0x00000000 5590 #define mmSDMA2_RLC2_MIDCMD_DATA1_DEFAULT 0x00000000 5591 #define mmSDMA2_RLC2_MIDCMD_DATA2_DEFAULT 0x00000000 5592 #define mmSDMA2_RLC2_MIDCMD_DATA3_DEFAULT 0x00000000 5593 #define mmSDMA2_RLC2_MIDCMD_DATA4_DEFAULT 0x00000000 5594 #define mmSDMA2_RLC2_MIDCMD_DATA5_DEFAULT 0x00000000 5595 #define mmSDMA2_RLC2_MIDCMD_DATA6_DEFAULT 0x00000000 5596 #define mmSDMA2_RLC2_MIDCMD_DATA7_DEFAULT 0x00000000 5597 #define mmSDMA2_RLC2_MIDCMD_DATA8_DEFAULT 0x00000000 5598 #define mmSDMA2_RLC2_MIDCMD_DATA9_DEFAULT 0x00000000 5599 #define mmSDMA2_RLC2_MIDCMD_DATA10_DEFAULT 0x00000000 5600 #define mmSDMA2_RLC2_MIDCMD_CNTL_DEFAULT 0x00000000 5601 #define mmSDMA2_RLC3_RB_CNTL_DEFAULT 0x80040000 5602 #define mmSDMA2_RLC3_RB_BASE_DEFAULT 0x00000000 5603 #define mmSDMA2_RLC3_RB_BASE_HI_DEFAULT 0x00000000 5604 #define mmSDMA2_RLC3_RB_RPTR_DEFAULT 0x00000000 5605 #define mmSDMA2_RLC3_RB_RPTR_HI_DEFAULT 0x00000000 5606 #define mmSDMA2_RLC3_RB_WPTR_DEFAULT 0x00000000 5607 #define mmSDMA2_RLC3_RB_WPTR_HI_DEFAULT 0x00000000 5608 #define mmSDMA2_RLC3_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 5609 #define mmSDMA2_RLC3_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 5610 #define mmSDMA2_RLC3_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 5611 #define mmSDMA2_RLC3_IB_CNTL_DEFAULT 0x00000100 5612 #define mmSDMA2_RLC3_IB_RPTR_DEFAULT 0x00000000 5613 #define mmSDMA2_RLC3_IB_OFFSET_DEFAULT 0x00000000 5614 #define mmSDMA2_RLC3_IB_BASE_LO_DEFAULT 0x00000000 5615 #define mmSDMA2_RLC3_IB_BASE_HI_DEFAULT 0x00000000 5616 #define mmSDMA2_RLC3_IB_SIZE_DEFAULT 0x00000000 5617 #define mmSDMA2_RLC3_SKIP_CNTL_DEFAULT 0x00000000 5618 #define mmSDMA2_RLC3_CONTEXT_STATUS_DEFAULT 0x00000004 5619 #define mmSDMA2_RLC3_DOORBELL_DEFAULT 0x00000000 5620 #define mmSDMA2_RLC3_STATUS_DEFAULT 0x00000000 5621 #define mmSDMA2_RLC3_DOORBELL_LOG_DEFAULT 0x00000000 5622 #define mmSDMA2_RLC3_WATERMARK_DEFAULT 0x00000000 5623 #define mmSDMA2_RLC3_DOORBELL_OFFSET_DEFAULT 0x00000000 5624 #define mmSDMA2_RLC3_CSA_ADDR_LO_DEFAULT 0x00000000 5625 #define mmSDMA2_RLC3_CSA_ADDR_HI_DEFAULT 0x00000000 5626 #define mmSDMA2_RLC3_IB_SUB_REMAIN_DEFAULT 0x00000000 5627 #define mmSDMA2_RLC3_PREEMPT_DEFAULT 0x00000000 5628 #define mmSDMA2_RLC3_DUMMY_REG_DEFAULT 0x0000000f 5629 #define mmSDMA2_RLC3_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 5630 #define mmSDMA2_RLC3_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 5631 #define mmSDMA2_RLC3_RB_AQL_CNTL_DEFAULT 0x00004000 5632 #define mmSDMA2_RLC3_MINOR_PTR_UPDATE_DEFAULT 0x00000000 5633 #define mmSDMA2_RLC3_MIDCMD_DATA0_DEFAULT 0x00000000 5634 #define mmSDMA2_RLC3_MIDCMD_DATA1_DEFAULT 0x00000000 5635 #define mmSDMA2_RLC3_MIDCMD_DATA2_DEFAULT 0x00000000 5636 #define mmSDMA2_RLC3_MIDCMD_DATA3_DEFAULT 0x00000000 5637 #define mmSDMA2_RLC3_MIDCMD_DATA4_DEFAULT 0x00000000 5638 #define mmSDMA2_RLC3_MIDCMD_DATA5_DEFAULT 0x00000000 5639 #define mmSDMA2_RLC3_MIDCMD_DATA6_DEFAULT 0x00000000 5640 #define mmSDMA2_RLC3_MIDCMD_DATA7_DEFAULT 0x00000000 5641 #define mmSDMA2_RLC3_MIDCMD_DATA8_DEFAULT 0x00000000 5642 #define mmSDMA2_RLC3_MIDCMD_DATA9_DEFAULT 0x00000000 5643 #define mmSDMA2_RLC3_MIDCMD_DATA10_DEFAULT 0x00000000 5644 #define mmSDMA2_RLC3_MIDCMD_CNTL_DEFAULT 0x00000000 5645 #define mmSDMA2_RLC4_RB_CNTL_DEFAULT 0x80040000 5646 #define mmSDMA2_RLC4_RB_BASE_DEFAULT 0x00000000 5647 #define mmSDMA2_RLC4_RB_BASE_HI_DEFAULT 0x00000000 5648 #define mmSDMA2_RLC4_RB_RPTR_DEFAULT 0x00000000 5649 #define mmSDMA2_RLC4_RB_RPTR_HI_DEFAULT 0x00000000 5650 #define mmSDMA2_RLC4_RB_WPTR_DEFAULT 0x00000000 5651 #define mmSDMA2_RLC4_RB_WPTR_HI_DEFAULT 0x00000000 5652 #define mmSDMA2_RLC4_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 5653 #define mmSDMA2_RLC4_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 5654 #define mmSDMA2_RLC4_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 5655 #define mmSDMA2_RLC4_IB_CNTL_DEFAULT 0x00000100 5656 #define mmSDMA2_RLC4_IB_RPTR_DEFAULT 0x00000000 5657 #define mmSDMA2_RLC4_IB_OFFSET_DEFAULT 0x00000000 5658 #define mmSDMA2_RLC4_IB_BASE_LO_DEFAULT 0x00000000 5659 #define mmSDMA2_RLC4_IB_BASE_HI_DEFAULT 0x00000000 5660 #define mmSDMA2_RLC4_IB_SIZE_DEFAULT 0x00000000 5661 #define mmSDMA2_RLC4_SKIP_CNTL_DEFAULT 0x00000000 5662 #define mmSDMA2_RLC4_CONTEXT_STATUS_DEFAULT 0x00000004 5663 #define mmSDMA2_RLC4_DOORBELL_DEFAULT 0x00000000 5664 #define mmSDMA2_RLC4_STATUS_DEFAULT 0x00000000 5665 #define mmSDMA2_RLC4_DOORBELL_LOG_DEFAULT 0x00000000 5666 #define mmSDMA2_RLC4_WATERMARK_DEFAULT 0x00000000 5667 #define mmSDMA2_RLC4_DOORBELL_OFFSET_DEFAULT 0x00000000 5668 #define mmSDMA2_RLC4_CSA_ADDR_LO_DEFAULT 0x00000000 5669 #define mmSDMA2_RLC4_CSA_ADDR_HI_DEFAULT 0x00000000 5670 #define mmSDMA2_RLC4_IB_SUB_REMAIN_DEFAULT 0x00000000 5671 #define mmSDMA2_RLC4_PREEMPT_DEFAULT 0x00000000 5672 #define mmSDMA2_RLC4_DUMMY_REG_DEFAULT 0x0000000f 5673 #define mmSDMA2_RLC4_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 5674 #define mmSDMA2_RLC4_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 5675 #define mmSDMA2_RLC4_RB_AQL_CNTL_DEFAULT 0x00004000 5676 #define mmSDMA2_RLC4_MINOR_PTR_UPDATE_DEFAULT 0x00000000 5677 #define mmSDMA2_RLC4_MIDCMD_DATA0_DEFAULT 0x00000000 5678 #define mmSDMA2_RLC4_MIDCMD_DATA1_DEFAULT 0x00000000 5679 #define mmSDMA2_RLC4_MIDCMD_DATA2_DEFAULT 0x00000000 5680 #define mmSDMA2_RLC4_MIDCMD_DATA3_DEFAULT 0x00000000 5681 #define mmSDMA2_RLC4_MIDCMD_DATA4_DEFAULT 0x00000000 5682 #define mmSDMA2_RLC4_MIDCMD_DATA5_DEFAULT 0x00000000 5683 #define mmSDMA2_RLC4_MIDCMD_DATA6_DEFAULT 0x00000000 5684 #define mmSDMA2_RLC4_MIDCMD_DATA7_DEFAULT 0x00000000 5685 #define mmSDMA2_RLC4_MIDCMD_DATA8_DEFAULT 0x00000000 5686 #define mmSDMA2_RLC4_MIDCMD_DATA9_DEFAULT 0x00000000 5687 #define mmSDMA2_RLC4_MIDCMD_DATA10_DEFAULT 0x00000000 5688 #define mmSDMA2_RLC4_MIDCMD_CNTL_DEFAULT 0x00000000 5689 #define mmSDMA2_RLC5_RB_CNTL_DEFAULT 0x80040000 5690 #define mmSDMA2_RLC5_RB_BASE_DEFAULT 0x00000000 5691 #define mmSDMA2_RLC5_RB_BASE_HI_DEFAULT 0x00000000 5692 #define mmSDMA2_RLC5_RB_RPTR_DEFAULT 0x00000000 5693 #define mmSDMA2_RLC5_RB_RPTR_HI_DEFAULT 0x00000000 5694 #define mmSDMA2_RLC5_RB_WPTR_DEFAULT 0x00000000 5695 #define mmSDMA2_RLC5_RB_WPTR_HI_DEFAULT 0x00000000 5696 #define mmSDMA2_RLC5_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 5697 #define mmSDMA2_RLC5_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 5698 #define mmSDMA2_RLC5_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 5699 #define mmSDMA2_RLC5_IB_CNTL_DEFAULT 0x00000100 5700 #define mmSDMA2_RLC5_IB_RPTR_DEFAULT 0x00000000 5701 #define mmSDMA2_RLC5_IB_OFFSET_DEFAULT 0x00000000 5702 #define mmSDMA2_RLC5_IB_BASE_LO_DEFAULT 0x00000000 5703 #define mmSDMA2_RLC5_IB_BASE_HI_DEFAULT 0x00000000 5704 #define mmSDMA2_RLC5_IB_SIZE_DEFAULT 0x00000000 5705 #define mmSDMA2_RLC5_SKIP_CNTL_DEFAULT 0x00000000 5706 #define mmSDMA2_RLC5_CONTEXT_STATUS_DEFAULT 0x00000004 5707 #define mmSDMA2_RLC5_DOORBELL_DEFAULT 0x00000000 5708 #define mmSDMA2_RLC5_STATUS_DEFAULT 0x00000000 5709 #define mmSDMA2_RLC5_DOORBELL_LOG_DEFAULT 0x00000000 5710 #define mmSDMA2_RLC5_WATERMARK_DEFAULT 0x00000000 5711 #define mmSDMA2_RLC5_DOORBELL_OFFSET_DEFAULT 0x00000000 5712 #define mmSDMA2_RLC5_CSA_ADDR_LO_DEFAULT 0x00000000 5713 #define mmSDMA2_RLC5_CSA_ADDR_HI_DEFAULT 0x00000000 5714 #define mmSDMA2_RLC5_IB_SUB_REMAIN_DEFAULT 0x00000000 5715 #define mmSDMA2_RLC5_PREEMPT_DEFAULT 0x00000000 5716 #define mmSDMA2_RLC5_DUMMY_REG_DEFAULT 0x0000000f 5717 #define mmSDMA2_RLC5_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 5718 #define mmSDMA2_RLC5_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 5719 #define mmSDMA2_RLC5_RB_AQL_CNTL_DEFAULT 0x00004000 5720 #define mmSDMA2_RLC5_MINOR_PTR_UPDATE_DEFAULT 0x00000000 5721 #define mmSDMA2_RLC5_MIDCMD_DATA0_DEFAULT 0x00000000 5722 #define mmSDMA2_RLC5_MIDCMD_DATA1_DEFAULT 0x00000000 5723 #define mmSDMA2_RLC5_MIDCMD_DATA2_DEFAULT 0x00000000 5724 #define mmSDMA2_RLC5_MIDCMD_DATA3_DEFAULT 0x00000000 5725 #define mmSDMA2_RLC5_MIDCMD_DATA4_DEFAULT 0x00000000 5726 #define mmSDMA2_RLC5_MIDCMD_DATA5_DEFAULT 0x00000000 5727 #define mmSDMA2_RLC5_MIDCMD_DATA6_DEFAULT 0x00000000 5728 #define mmSDMA2_RLC5_MIDCMD_DATA7_DEFAULT 0x00000000 5729 #define mmSDMA2_RLC5_MIDCMD_DATA8_DEFAULT 0x00000000 5730 #define mmSDMA2_RLC5_MIDCMD_DATA9_DEFAULT 0x00000000 5731 #define mmSDMA2_RLC5_MIDCMD_DATA10_DEFAULT 0x00000000 5732 #define mmSDMA2_RLC5_MIDCMD_CNTL_DEFAULT 0x00000000 5733 #define mmSDMA2_RLC6_RB_CNTL_DEFAULT 0x80040000 5734 #define mmSDMA2_RLC6_RB_BASE_DEFAULT 0x00000000 5735 #define mmSDMA2_RLC6_RB_BASE_HI_DEFAULT 0x00000000 5736 #define mmSDMA2_RLC6_RB_RPTR_DEFAULT 0x00000000 5737 #define mmSDMA2_RLC6_RB_RPTR_HI_DEFAULT 0x00000000 5738 #define mmSDMA2_RLC6_RB_WPTR_DEFAULT 0x00000000 5739 #define mmSDMA2_RLC6_RB_WPTR_HI_DEFAULT 0x00000000 5740 #define mmSDMA2_RLC6_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 5741 #define mmSDMA2_RLC6_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 5742 #define mmSDMA2_RLC6_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 5743 #define mmSDMA2_RLC6_IB_CNTL_DEFAULT 0x00000100 5744 #define mmSDMA2_RLC6_IB_RPTR_DEFAULT 0x00000000 5745 #define mmSDMA2_RLC6_IB_OFFSET_DEFAULT 0x00000000 5746 #define mmSDMA2_RLC6_IB_BASE_LO_DEFAULT 0x00000000 5747 #define mmSDMA2_RLC6_IB_BASE_HI_DEFAULT 0x00000000 5748 #define mmSDMA2_RLC6_IB_SIZE_DEFAULT 0x00000000 5749 #define mmSDMA2_RLC6_SKIP_CNTL_DEFAULT 0x00000000 5750 #define mmSDMA2_RLC6_CONTEXT_STATUS_DEFAULT 0x00000004 5751 #define mmSDMA2_RLC6_DOORBELL_DEFAULT 0x00000000 5752 #define mmSDMA2_RLC6_STATUS_DEFAULT 0x00000000 5753 #define mmSDMA2_RLC6_DOORBELL_LOG_DEFAULT 0x00000000 5754 #define mmSDMA2_RLC6_WATERMARK_DEFAULT 0x00000000 5755 #define mmSDMA2_RLC6_DOORBELL_OFFSET_DEFAULT 0x00000000 5756 #define mmSDMA2_RLC6_CSA_ADDR_LO_DEFAULT 0x00000000 5757 #define mmSDMA2_RLC6_CSA_ADDR_HI_DEFAULT 0x00000000 5758 #define mmSDMA2_RLC6_IB_SUB_REMAIN_DEFAULT 0x00000000 5759 #define mmSDMA2_RLC6_PREEMPT_DEFAULT 0x00000000 5760 #define mmSDMA2_RLC6_DUMMY_REG_DEFAULT 0x0000000f 5761 #define mmSDMA2_RLC6_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 5762 #define mmSDMA2_RLC6_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 5763 #define mmSDMA2_RLC6_RB_AQL_CNTL_DEFAULT 0x00004000 5764 #define mmSDMA2_RLC6_MINOR_PTR_UPDATE_DEFAULT 0x00000000 5765 #define mmSDMA2_RLC6_MIDCMD_DATA0_DEFAULT 0x00000000 5766 #define mmSDMA2_RLC6_MIDCMD_DATA1_DEFAULT 0x00000000 5767 #define mmSDMA2_RLC6_MIDCMD_DATA2_DEFAULT 0x00000000 5768 #define mmSDMA2_RLC6_MIDCMD_DATA3_DEFAULT 0x00000000 5769 #define mmSDMA2_RLC6_MIDCMD_DATA4_DEFAULT 0x00000000 5770 #define mmSDMA2_RLC6_MIDCMD_DATA5_DEFAULT 0x00000000 5771 #define mmSDMA2_RLC6_MIDCMD_DATA6_DEFAULT 0x00000000 5772 #define mmSDMA2_RLC6_MIDCMD_DATA7_DEFAULT 0x00000000 5773 #define mmSDMA2_RLC6_MIDCMD_DATA8_DEFAULT 0x00000000 5774 #define mmSDMA2_RLC6_MIDCMD_DATA9_DEFAULT 0x00000000 5775 #define mmSDMA2_RLC6_MIDCMD_DATA10_DEFAULT 0x00000000 5776 #define mmSDMA2_RLC6_MIDCMD_CNTL_DEFAULT 0x00000000 5777 #define mmSDMA2_RLC7_RB_CNTL_DEFAULT 0x80040000 5778 #define mmSDMA2_RLC7_RB_BASE_DEFAULT 0x00000000 5779 #define mmSDMA2_RLC7_RB_BASE_HI_DEFAULT 0x00000000 5780 #define mmSDMA2_RLC7_RB_RPTR_DEFAULT 0x00000000 5781 #define mmSDMA2_RLC7_RB_RPTR_HI_DEFAULT 0x00000000 5782 #define mmSDMA2_RLC7_RB_WPTR_DEFAULT 0x00000000 5783 #define mmSDMA2_RLC7_RB_WPTR_HI_DEFAULT 0x00000000 5784 #define mmSDMA2_RLC7_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 5785 #define mmSDMA2_RLC7_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 5786 #define mmSDMA2_RLC7_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 5787 #define mmSDMA2_RLC7_IB_CNTL_DEFAULT 0x00000100 5788 #define mmSDMA2_RLC7_IB_RPTR_DEFAULT 0x00000000 5789 #define mmSDMA2_RLC7_IB_OFFSET_DEFAULT 0x00000000 5790 #define mmSDMA2_RLC7_IB_BASE_LO_DEFAULT 0x00000000 5791 #define mmSDMA2_RLC7_IB_BASE_HI_DEFAULT 0x00000000 5792 #define mmSDMA2_RLC7_IB_SIZE_DEFAULT 0x00000000 5793 #define mmSDMA2_RLC7_SKIP_CNTL_DEFAULT 0x00000000 5794 #define mmSDMA2_RLC7_CONTEXT_STATUS_DEFAULT 0x00000004 5795 #define mmSDMA2_RLC7_DOORBELL_DEFAULT 0x00000000 5796 #define mmSDMA2_RLC7_STATUS_DEFAULT 0x00000000 5797 #define mmSDMA2_RLC7_DOORBELL_LOG_DEFAULT 0x00000000 5798 #define mmSDMA2_RLC7_WATERMARK_DEFAULT 0x00000000 5799 #define mmSDMA2_RLC7_DOORBELL_OFFSET_DEFAULT 0x00000000 5800 #define mmSDMA2_RLC7_CSA_ADDR_LO_DEFAULT 0x00000000 5801 #define mmSDMA2_RLC7_CSA_ADDR_HI_DEFAULT 0x00000000 5802 #define mmSDMA2_RLC7_IB_SUB_REMAIN_DEFAULT 0x00000000 5803 #define mmSDMA2_RLC7_PREEMPT_DEFAULT 0x00000000 5804 #define mmSDMA2_RLC7_DUMMY_REG_DEFAULT 0x0000000f 5805 #define mmSDMA2_RLC7_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 5806 #define mmSDMA2_RLC7_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 5807 #define mmSDMA2_RLC7_RB_AQL_CNTL_DEFAULT 0x00004000 5808 #define mmSDMA2_RLC7_MINOR_PTR_UPDATE_DEFAULT 0x00000000 5809 #define mmSDMA2_RLC7_MIDCMD_DATA0_DEFAULT 0x00000000 5810 #define mmSDMA2_RLC7_MIDCMD_DATA1_DEFAULT 0x00000000 5811 #define mmSDMA2_RLC7_MIDCMD_DATA2_DEFAULT 0x00000000 5812 #define mmSDMA2_RLC7_MIDCMD_DATA3_DEFAULT 0x00000000 5813 #define mmSDMA2_RLC7_MIDCMD_DATA4_DEFAULT 0x00000000 5814 #define mmSDMA2_RLC7_MIDCMD_DATA5_DEFAULT 0x00000000 5815 #define mmSDMA2_RLC7_MIDCMD_DATA6_DEFAULT 0x00000000 5816 #define mmSDMA2_RLC7_MIDCMD_DATA7_DEFAULT 0x00000000 5817 #define mmSDMA2_RLC7_MIDCMD_DATA8_DEFAULT 0x00000000 5818 #define mmSDMA2_RLC7_MIDCMD_DATA9_DEFAULT 0x00000000 5819 #define mmSDMA2_RLC7_MIDCMD_DATA10_DEFAULT 0x00000000 5820 #define mmSDMA2_RLC7_MIDCMD_CNTL_DEFAULT 0x00000000 5821 5822 5823 // addressBlock: gc_sdma3_sdma3dec 5824 #define mmSDMA3_DEC_START_DEFAULT 0x00000000 5825 #define mmSDMA3_GLOBAL_TIMESTAMP_LO_DEFAULT 0x00000000 5826 #define mmSDMA3_GLOBAL_TIMESTAMP_HI_DEFAULT 0x00000000 5827 #define mmSDMA3_PG_CNTL_DEFAULT 0x00000000 5828 #define mmSDMA3_PG_CTX_LO_DEFAULT 0x00000000 5829 #define mmSDMA3_PG_CTX_HI_DEFAULT 0x00000000 5830 #define mmSDMA3_PG_CTX_CNTL_DEFAULT 0x00000000 5831 #define mmSDMA3_POWER_CNTL_DEFAULT 0x40000050 5832 #define mmSDMA3_CLK_CTRL_DEFAULT 0x00000100 5833 #define mmSDMA3_CNTL_DEFAULT 0x000000c2 5834 #define mmSDMA3_CHICKEN_BITS_DEFAULT 0x03ef0107 5835 #define mmSDMA3_GB_ADDR_CONFIG_DEFAULT 0x00000444 5836 #define mmSDMA3_GB_ADDR_CONFIG_READ_DEFAULT 0x00000444 5837 #define mmSDMA3_RB_RPTR_FETCH_HI_DEFAULT 0x00000000 5838 #define mmSDMA3_SEM_WAIT_FAIL_TIMER_CNTL_DEFAULT 0x00000000 5839 #define mmSDMA3_RB_RPTR_FETCH_DEFAULT 0x00000000 5840 #define mmSDMA3_IB_OFFSET_FETCH_DEFAULT 0x00000000 5841 #define mmSDMA3_PROGRAM_DEFAULT 0x00000000 5842 #define mmSDMA3_STATUS_REG_DEFAULT 0x46dee557 5843 #define mmSDMA3_STATUS1_REG_DEFAULT 0x000003ff 5844 #define mmSDMA3_RD_BURST_CNTL_DEFAULT 0x00000002 5845 #define mmSDMA3_HBM_PAGE_CONFIG_DEFAULT 0x00000000 5846 #define mmSDMA3_UCODE_CHECKSUM_DEFAULT 0x00000000 5847 #define mmSDMA3_F32_CNTL_DEFAULT 0x00000001 5848 #define mmSDMA3_FREEZE_DEFAULT 0x00000000 5849 #define mmSDMA3_PHASE0_QUANTUM_DEFAULT 0x00010002 5850 #define mmSDMA3_PHASE1_QUANTUM_DEFAULT 0x00010002 5851 #define mmSDMA3_EDC_CONFIG_DEFAULT 0x00000002 5852 #define mmSDMA3_BA_THRESHOLD_DEFAULT 0x03ff03ff 5853 #define mmSDMA3_ID_DEFAULT 0x00000001 5854 #define mmSDMA3_VERSION_DEFAULT 0x00000500 5855 #define mmSDMA3_EDC_COUNTER_DEFAULT 0x00000000 5856 #define mmSDMA3_EDC_COUNTER_CLEAR_DEFAULT 0x00000000 5857 #define mmSDMA3_STATUS2_REG_DEFAULT 0x00000001 5858 #define mmSDMA3_ATOMIC_CNTL_DEFAULT 0x00000200 5859 #define mmSDMA3_ATOMIC_PREOP_LO_DEFAULT 0x00000000 5860 #define mmSDMA3_ATOMIC_PREOP_HI_DEFAULT 0x00000000 5861 #define mmSDMA3_UTCL1_CNTL_DEFAULT 0xd0000191 5862 #define mmSDMA3_UTCL1_WATERMK_DEFAULT 0xfffbd9fb 5863 #define mmSDMA3_UTCL1_RD_STATUS_DEFAULT 0x01011555 5864 #define mmSDMA3_UTCL1_WR_STATUS_DEFAULT 0x51011555 5865 #define mmSDMA3_UTCL1_INV0_DEFAULT 0x00000800 5866 #define mmSDMA3_UTCL1_INV1_DEFAULT 0x00000000 5867 #define mmSDMA3_UTCL1_INV2_DEFAULT 0x00000000 5868 #define mmSDMA3_UTCL1_RD_XNACK0_DEFAULT 0x00000000 5869 #define mmSDMA3_UTCL1_RD_XNACK1_DEFAULT 0x00000000 5870 #define mmSDMA3_UTCL1_WR_XNACK0_DEFAULT 0x00000000 5871 #define mmSDMA3_UTCL1_WR_XNACK1_DEFAULT 0x00000000 5872 #define mmSDMA3_UTCL1_TIMEOUT_DEFAULT 0x00000000 5873 #define mmSDMA3_UTCL1_PAGE_DEFAULT 0x010cec00 5874 #define mmSDMA3_RELAX_ORDERING_LUT_DEFAULT 0xc0000006 5875 #define mmSDMA3_CHICKEN_BITS_2_DEFAULT 0x00100007 5876 #define mmSDMA3_STATUS3_REG_DEFAULT 0x03f00000 5877 #define mmSDMA3_PHYSICAL_ADDR_LO_DEFAULT 0x00000000 5878 #define mmSDMA3_PHYSICAL_ADDR_HI_DEFAULT 0x00000000 5879 #define mmSDMA3_PHASE2_QUANTUM_DEFAULT 0x00010002 5880 #define mmSDMA3_ERROR_LOG_DEFAULT 0x0000000f 5881 #define mmSDMA3_PUB_DUMMY_REG0_DEFAULT 0x00000000 5882 #define mmSDMA3_PUB_DUMMY_REG1_DEFAULT 0x00000000 5883 #define mmSDMA3_PUB_DUMMY_REG2_DEFAULT 0x00000000 5884 #define mmSDMA3_PUB_DUMMY_REG3_DEFAULT 0x00000000 5885 #define mmSDMA3_F32_COUNTER_DEFAULT 0x00000000 5886 #define mmSDMA3_CRD_CNTL_DEFAULT 0x1850c640 5887 #define mmSDMA3_AQL_STATUS_DEFAULT 0x00000003 5888 #define mmSDMA3_EA_DBIT_ADDR_DATA_DEFAULT 0x00000000 5889 #define mmSDMA3_EA_DBIT_ADDR_INDEX_DEFAULT 0x00000000 5890 #define mmSDMA3_TLBI_GCR_CNTL_DEFAULT 0x40180454 5891 #define mmSDMA3_TILING_CONFIG_DEFAULT 0x00000000 5892 #define mmSDMA3_INT_STATUS_DEFAULT 0x00000000 5893 #define mmSDMA3_HOLE_ADDR_LO_DEFAULT 0x00000000 5894 #define mmSDMA3_HOLE_ADDR_HI_DEFAULT 0x00000000 5895 #define mmSDMA3_CLOCK_GATING_REG_DEFAULT 0x00000000 5896 #define mmSDMA3_STATUS4_REG_DEFAULT 0x00000001 5897 #define mmSDMA3_SCRATCH_RAM_DATA_DEFAULT 0x00000000 5898 #define mmSDMA3_SCRATCH_RAM_ADDR_DEFAULT 0x00000000 5899 #define mmSDMA3_TIMESTAMP_CNTL_DEFAULT 0x00000000 5900 #define mmSDMA3_STATUS5_REG_DEFAULT 0x00000000 5901 #define mmSDMA3_QUEUE_RESET_REQ_DEFAULT 0x00000000 5902 #define mmSDMA3_GFX_RB_CNTL_DEFAULT 0x80840000 5903 #define mmSDMA3_GFX_RB_BASE_DEFAULT 0x00000000 5904 #define mmSDMA3_GFX_RB_BASE_HI_DEFAULT 0x00000000 5905 #define mmSDMA3_GFX_RB_RPTR_DEFAULT 0x00000000 5906 #define mmSDMA3_GFX_RB_RPTR_HI_DEFAULT 0x00000000 5907 #define mmSDMA3_GFX_RB_WPTR_DEFAULT 0x00000000 5908 #define mmSDMA3_GFX_RB_WPTR_HI_DEFAULT 0x00000000 5909 #define mmSDMA3_GFX_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 5910 #define mmSDMA3_GFX_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 5911 #define mmSDMA3_GFX_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 5912 #define mmSDMA3_GFX_IB_CNTL_DEFAULT 0x00000100 5913 #define mmSDMA3_GFX_IB_RPTR_DEFAULT 0x00000000 5914 #define mmSDMA3_GFX_IB_OFFSET_DEFAULT 0x00000000 5915 #define mmSDMA3_GFX_IB_BASE_LO_DEFAULT 0x00000000 5916 #define mmSDMA3_GFX_IB_BASE_HI_DEFAULT 0x00000000 5917 #define mmSDMA3_GFX_IB_SIZE_DEFAULT 0x00000000 5918 #define mmSDMA3_GFX_SKIP_CNTL_DEFAULT 0x00000000 5919 #define mmSDMA3_GFX_CONTEXT_STATUS_DEFAULT 0x00000005 5920 #define mmSDMA3_GFX_DOORBELL_DEFAULT 0x00000000 5921 #define mmSDMA3_GFX_CONTEXT_CNTL_DEFAULT 0x00000000 5922 #define mmSDMA3_GFX_STATUS_DEFAULT 0x00000000 5923 #define mmSDMA3_GFX_DOORBELL_LOG_DEFAULT 0x00000000 5924 #define mmSDMA3_GFX_WATERMARK_DEFAULT 0x00000000 5925 #define mmSDMA3_GFX_DOORBELL_OFFSET_DEFAULT 0x00000000 5926 #define mmSDMA3_GFX_CSA_ADDR_LO_DEFAULT 0x00000000 5927 #define mmSDMA3_GFX_CSA_ADDR_HI_DEFAULT 0x00000000 5928 #define mmSDMA3_GFX_IB_SUB_REMAIN_DEFAULT 0x00000000 5929 #define mmSDMA3_GFX_PREEMPT_DEFAULT 0x00000000 5930 #define mmSDMA3_GFX_DUMMY_REG_DEFAULT 0x0000000f 5931 #define mmSDMA3_GFX_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 5932 #define mmSDMA3_GFX_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 5933 #define mmSDMA3_GFX_RB_AQL_CNTL_DEFAULT 0x00004000 5934 #define mmSDMA3_GFX_MINOR_PTR_UPDATE_DEFAULT 0x00000000 5935 #define mmSDMA3_GFX_MIDCMD_DATA0_DEFAULT 0x00000000 5936 #define mmSDMA3_GFX_MIDCMD_DATA1_DEFAULT 0x00000000 5937 #define mmSDMA3_GFX_MIDCMD_DATA2_DEFAULT 0x00000000 5938 #define mmSDMA3_GFX_MIDCMD_DATA3_DEFAULT 0x00000000 5939 #define mmSDMA3_GFX_MIDCMD_DATA4_DEFAULT 0x00000000 5940 #define mmSDMA3_GFX_MIDCMD_DATA5_DEFAULT 0x00000000 5941 #define mmSDMA3_GFX_MIDCMD_DATA6_DEFAULT 0x00000000 5942 #define mmSDMA3_GFX_MIDCMD_DATA7_DEFAULT 0x00000000 5943 #define mmSDMA3_GFX_MIDCMD_DATA8_DEFAULT 0x00000000 5944 #define mmSDMA3_GFX_MIDCMD_DATA9_DEFAULT 0x00000000 5945 #define mmSDMA3_GFX_MIDCMD_DATA10_DEFAULT 0x00000000 5946 #define mmSDMA3_GFX_MIDCMD_CNTL_DEFAULT 0x00000000 5947 #define mmSDMA3_PAGE_RB_CNTL_DEFAULT 0x80840000 5948 #define mmSDMA3_PAGE_RB_BASE_DEFAULT 0x00000000 5949 #define mmSDMA3_PAGE_RB_BASE_HI_DEFAULT 0x00000000 5950 #define mmSDMA3_PAGE_RB_RPTR_DEFAULT 0x00000000 5951 #define mmSDMA3_PAGE_RB_RPTR_HI_DEFAULT 0x00000000 5952 #define mmSDMA3_PAGE_RB_WPTR_DEFAULT 0x00000000 5953 #define mmSDMA3_PAGE_RB_WPTR_HI_DEFAULT 0x00000000 5954 #define mmSDMA3_PAGE_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 5955 #define mmSDMA3_PAGE_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 5956 #define mmSDMA3_PAGE_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 5957 #define mmSDMA3_PAGE_IB_CNTL_DEFAULT 0x00000100 5958 #define mmSDMA3_PAGE_IB_RPTR_DEFAULT 0x00000000 5959 #define mmSDMA3_PAGE_IB_OFFSET_DEFAULT 0x00000000 5960 #define mmSDMA3_PAGE_IB_BASE_LO_DEFAULT 0x00000000 5961 #define mmSDMA3_PAGE_IB_BASE_HI_DEFAULT 0x00000000 5962 #define mmSDMA3_PAGE_IB_SIZE_DEFAULT 0x00000000 5963 #define mmSDMA3_PAGE_SKIP_CNTL_DEFAULT 0x00000000 5964 #define mmSDMA3_PAGE_CONTEXT_STATUS_DEFAULT 0x00000004 5965 #define mmSDMA3_PAGE_DOORBELL_DEFAULT 0x00000000 5966 #define mmSDMA3_PAGE_STATUS_DEFAULT 0x00000000 5967 #define mmSDMA3_PAGE_DOORBELL_LOG_DEFAULT 0x00000000 5968 #define mmSDMA3_PAGE_WATERMARK_DEFAULT 0x00000000 5969 #define mmSDMA3_PAGE_DOORBELL_OFFSET_DEFAULT 0x00000000 5970 #define mmSDMA3_PAGE_CSA_ADDR_LO_DEFAULT 0x00000000 5971 #define mmSDMA3_PAGE_CSA_ADDR_HI_DEFAULT 0x00000000 5972 #define mmSDMA3_PAGE_IB_SUB_REMAIN_DEFAULT 0x00000000 5973 #define mmSDMA3_PAGE_PREEMPT_DEFAULT 0x00000000 5974 #define mmSDMA3_PAGE_DUMMY_REG_DEFAULT 0x0000000f 5975 #define mmSDMA3_PAGE_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 5976 #define mmSDMA3_PAGE_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 5977 #define mmSDMA3_PAGE_RB_AQL_CNTL_DEFAULT 0x00004000 5978 #define mmSDMA3_PAGE_MINOR_PTR_UPDATE_DEFAULT 0x00000000 5979 #define mmSDMA3_PAGE_MIDCMD_DATA0_DEFAULT 0x00000000 5980 #define mmSDMA3_PAGE_MIDCMD_DATA1_DEFAULT 0x00000000 5981 #define mmSDMA3_PAGE_MIDCMD_DATA2_DEFAULT 0x00000000 5982 #define mmSDMA3_PAGE_MIDCMD_DATA3_DEFAULT 0x00000000 5983 #define mmSDMA3_PAGE_MIDCMD_DATA4_DEFAULT 0x00000000 5984 #define mmSDMA3_PAGE_MIDCMD_DATA5_DEFAULT 0x00000000 5985 #define mmSDMA3_PAGE_MIDCMD_DATA6_DEFAULT 0x00000000 5986 #define mmSDMA3_PAGE_MIDCMD_DATA7_DEFAULT 0x00000000 5987 #define mmSDMA3_PAGE_MIDCMD_DATA8_DEFAULT 0x00000000 5988 #define mmSDMA3_PAGE_MIDCMD_DATA9_DEFAULT 0x00000000 5989 #define mmSDMA3_PAGE_MIDCMD_DATA10_DEFAULT 0x00000000 5990 #define mmSDMA3_PAGE_MIDCMD_CNTL_DEFAULT 0x00000000 5991 #define mmSDMA3_RLC0_RB_CNTL_DEFAULT 0x80040000 5992 #define mmSDMA3_RLC0_RB_BASE_DEFAULT 0x00000000 5993 #define mmSDMA3_RLC0_RB_BASE_HI_DEFAULT 0x00000000 5994 #define mmSDMA3_RLC0_RB_RPTR_DEFAULT 0x00000000 5995 #define mmSDMA3_RLC0_RB_RPTR_HI_DEFAULT 0x00000000 5996 #define mmSDMA3_RLC0_RB_WPTR_DEFAULT 0x00000000 5997 #define mmSDMA3_RLC0_RB_WPTR_HI_DEFAULT 0x00000000 5998 #define mmSDMA3_RLC0_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 5999 #define mmSDMA3_RLC0_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 6000 #define mmSDMA3_RLC0_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 6001 #define mmSDMA3_RLC0_IB_CNTL_DEFAULT 0x00000100 6002 #define mmSDMA3_RLC0_IB_RPTR_DEFAULT 0x00000000 6003 #define mmSDMA3_RLC0_IB_OFFSET_DEFAULT 0x00000000 6004 #define mmSDMA3_RLC0_IB_BASE_LO_DEFAULT 0x00000000 6005 #define mmSDMA3_RLC0_IB_BASE_HI_DEFAULT 0x00000000 6006 #define mmSDMA3_RLC0_IB_SIZE_DEFAULT 0x00000000 6007 #define mmSDMA3_RLC0_SKIP_CNTL_DEFAULT 0x00000000 6008 #define mmSDMA3_RLC0_CONTEXT_STATUS_DEFAULT 0x00000004 6009 #define mmSDMA3_RLC0_DOORBELL_DEFAULT 0x00000000 6010 #define mmSDMA3_RLC0_STATUS_DEFAULT 0x00000000 6011 #define mmSDMA3_RLC0_DOORBELL_LOG_DEFAULT 0x00000000 6012 #define mmSDMA3_RLC0_WATERMARK_DEFAULT 0x00000000 6013 #define mmSDMA3_RLC0_DOORBELL_OFFSET_DEFAULT 0x00000000 6014 #define mmSDMA3_RLC0_CSA_ADDR_LO_DEFAULT 0x00000000 6015 #define mmSDMA3_RLC0_CSA_ADDR_HI_DEFAULT 0x00000000 6016 #define mmSDMA3_RLC0_IB_SUB_REMAIN_DEFAULT 0x00000000 6017 #define mmSDMA3_RLC0_PREEMPT_DEFAULT 0x00000000 6018 #define mmSDMA3_RLC0_DUMMY_REG_DEFAULT 0x0000000f 6019 #define mmSDMA3_RLC0_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 6020 #define mmSDMA3_RLC0_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 6021 #define mmSDMA3_RLC0_RB_AQL_CNTL_DEFAULT 0x00004000 6022 #define mmSDMA3_RLC0_MINOR_PTR_UPDATE_DEFAULT 0x00000000 6023 #define mmSDMA3_RLC0_MIDCMD_DATA0_DEFAULT 0x00000000 6024 #define mmSDMA3_RLC0_MIDCMD_DATA1_DEFAULT 0x00000000 6025 #define mmSDMA3_RLC0_MIDCMD_DATA2_DEFAULT 0x00000000 6026 #define mmSDMA3_RLC0_MIDCMD_DATA3_DEFAULT 0x00000000 6027 #define mmSDMA3_RLC0_MIDCMD_DATA4_DEFAULT 0x00000000 6028 #define mmSDMA3_RLC0_MIDCMD_DATA5_DEFAULT 0x00000000 6029 #define mmSDMA3_RLC0_MIDCMD_DATA6_DEFAULT 0x00000000 6030 #define mmSDMA3_RLC0_MIDCMD_DATA7_DEFAULT 0x00000000 6031 #define mmSDMA3_RLC0_MIDCMD_DATA8_DEFAULT 0x00000000 6032 #define mmSDMA3_RLC0_MIDCMD_DATA9_DEFAULT 0x00000000 6033 #define mmSDMA3_RLC0_MIDCMD_DATA10_DEFAULT 0x00000000 6034 #define mmSDMA3_RLC0_MIDCMD_CNTL_DEFAULT 0x00000000 6035 #define mmSDMA3_RLC1_RB_CNTL_DEFAULT 0x80040000 6036 #define mmSDMA3_RLC1_RB_BASE_DEFAULT 0x00000000 6037 #define mmSDMA3_RLC1_RB_BASE_HI_DEFAULT 0x00000000 6038 #define mmSDMA3_RLC1_RB_RPTR_DEFAULT 0x00000000 6039 #define mmSDMA3_RLC1_RB_RPTR_HI_DEFAULT 0x00000000 6040 #define mmSDMA3_RLC1_RB_WPTR_DEFAULT 0x00000000 6041 #define mmSDMA3_RLC1_RB_WPTR_HI_DEFAULT 0x00000000 6042 #define mmSDMA3_RLC1_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 6043 #define mmSDMA3_RLC1_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 6044 #define mmSDMA3_RLC1_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 6045 #define mmSDMA3_RLC1_IB_CNTL_DEFAULT 0x00000100 6046 #define mmSDMA3_RLC1_IB_RPTR_DEFAULT 0x00000000 6047 #define mmSDMA3_RLC1_IB_OFFSET_DEFAULT 0x00000000 6048 #define mmSDMA3_RLC1_IB_BASE_LO_DEFAULT 0x00000000 6049 #define mmSDMA3_RLC1_IB_BASE_HI_DEFAULT 0x00000000 6050 #define mmSDMA3_RLC1_IB_SIZE_DEFAULT 0x00000000 6051 #define mmSDMA3_RLC1_SKIP_CNTL_DEFAULT 0x00000000 6052 #define mmSDMA3_RLC1_CONTEXT_STATUS_DEFAULT 0x00000004 6053 #define mmSDMA3_RLC1_DOORBELL_DEFAULT 0x00000000 6054 #define mmSDMA3_RLC1_STATUS_DEFAULT 0x00000000 6055 #define mmSDMA3_RLC1_DOORBELL_LOG_DEFAULT 0x00000000 6056 #define mmSDMA3_RLC1_WATERMARK_DEFAULT 0x00000000 6057 #define mmSDMA3_RLC1_DOORBELL_OFFSET_DEFAULT 0x00000000 6058 #define mmSDMA3_RLC1_CSA_ADDR_LO_DEFAULT 0x00000000 6059 #define mmSDMA3_RLC1_CSA_ADDR_HI_DEFAULT 0x00000000 6060 #define mmSDMA3_RLC1_IB_SUB_REMAIN_DEFAULT 0x00000000 6061 #define mmSDMA3_RLC1_PREEMPT_DEFAULT 0x00000000 6062 #define mmSDMA3_RLC1_DUMMY_REG_DEFAULT 0x0000000f 6063 #define mmSDMA3_RLC1_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 6064 #define mmSDMA3_RLC1_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 6065 #define mmSDMA3_RLC1_RB_AQL_CNTL_DEFAULT 0x00004000 6066 #define mmSDMA3_RLC1_MINOR_PTR_UPDATE_DEFAULT 0x00000000 6067 #define mmSDMA3_RLC1_MIDCMD_DATA0_DEFAULT 0x00000000 6068 #define mmSDMA3_RLC1_MIDCMD_DATA1_DEFAULT 0x00000000 6069 #define mmSDMA3_RLC1_MIDCMD_DATA2_DEFAULT 0x00000000 6070 #define mmSDMA3_RLC1_MIDCMD_DATA3_DEFAULT 0x00000000 6071 #define mmSDMA3_RLC1_MIDCMD_DATA4_DEFAULT 0x00000000 6072 #define mmSDMA3_RLC1_MIDCMD_DATA5_DEFAULT 0x00000000 6073 #define mmSDMA3_RLC1_MIDCMD_DATA6_DEFAULT 0x00000000 6074 #define mmSDMA3_RLC1_MIDCMD_DATA7_DEFAULT 0x00000000 6075 #define mmSDMA3_RLC1_MIDCMD_DATA8_DEFAULT 0x00000000 6076 #define mmSDMA3_RLC1_MIDCMD_DATA9_DEFAULT 0x00000000 6077 #define mmSDMA3_RLC1_MIDCMD_DATA10_DEFAULT 0x00000000 6078 #define mmSDMA3_RLC1_MIDCMD_CNTL_DEFAULT 0x00000000 6079 #define mmSDMA3_RLC2_RB_CNTL_DEFAULT 0x80040000 6080 #define mmSDMA3_RLC2_RB_BASE_DEFAULT 0x00000000 6081 #define mmSDMA3_RLC2_RB_BASE_HI_DEFAULT 0x00000000 6082 #define mmSDMA3_RLC2_RB_RPTR_DEFAULT 0x00000000 6083 #define mmSDMA3_RLC2_RB_RPTR_HI_DEFAULT 0x00000000 6084 #define mmSDMA3_RLC2_RB_WPTR_DEFAULT 0x00000000 6085 #define mmSDMA3_RLC2_RB_WPTR_HI_DEFAULT 0x00000000 6086 #define mmSDMA3_RLC2_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 6087 #define mmSDMA3_RLC2_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 6088 #define mmSDMA3_RLC2_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 6089 #define mmSDMA3_RLC2_IB_CNTL_DEFAULT 0x00000100 6090 #define mmSDMA3_RLC2_IB_RPTR_DEFAULT 0x00000000 6091 #define mmSDMA3_RLC2_IB_OFFSET_DEFAULT 0x00000000 6092 #define mmSDMA3_RLC2_IB_BASE_LO_DEFAULT 0x00000000 6093 #define mmSDMA3_RLC2_IB_BASE_HI_DEFAULT 0x00000000 6094 #define mmSDMA3_RLC2_IB_SIZE_DEFAULT 0x00000000 6095 #define mmSDMA3_RLC2_SKIP_CNTL_DEFAULT 0x00000000 6096 #define mmSDMA3_RLC2_CONTEXT_STATUS_DEFAULT 0x00000004 6097 #define mmSDMA3_RLC2_DOORBELL_DEFAULT 0x00000000 6098 #define mmSDMA3_RLC2_STATUS_DEFAULT 0x00000000 6099 #define mmSDMA3_RLC2_DOORBELL_LOG_DEFAULT 0x00000000 6100 #define mmSDMA3_RLC2_WATERMARK_DEFAULT 0x00000000 6101 #define mmSDMA3_RLC2_DOORBELL_OFFSET_DEFAULT 0x00000000 6102 #define mmSDMA3_RLC2_CSA_ADDR_LO_DEFAULT 0x00000000 6103 #define mmSDMA3_RLC2_CSA_ADDR_HI_DEFAULT 0x00000000 6104 #define mmSDMA3_RLC2_IB_SUB_REMAIN_DEFAULT 0x00000000 6105 #define mmSDMA3_RLC2_PREEMPT_DEFAULT 0x00000000 6106 #define mmSDMA3_RLC2_DUMMY_REG_DEFAULT 0x0000000f 6107 #define mmSDMA3_RLC2_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 6108 #define mmSDMA3_RLC2_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 6109 #define mmSDMA3_RLC2_RB_AQL_CNTL_DEFAULT 0x00004000 6110 #define mmSDMA3_RLC2_MINOR_PTR_UPDATE_DEFAULT 0x00000000 6111 #define mmSDMA3_RLC2_MIDCMD_DATA0_DEFAULT 0x00000000 6112 #define mmSDMA3_RLC2_MIDCMD_DATA1_DEFAULT 0x00000000 6113 #define mmSDMA3_RLC2_MIDCMD_DATA2_DEFAULT 0x00000000 6114 #define mmSDMA3_RLC2_MIDCMD_DATA3_DEFAULT 0x00000000 6115 #define mmSDMA3_RLC2_MIDCMD_DATA4_DEFAULT 0x00000000 6116 #define mmSDMA3_RLC2_MIDCMD_DATA5_DEFAULT 0x00000000 6117 #define mmSDMA3_RLC2_MIDCMD_DATA6_DEFAULT 0x00000000 6118 #define mmSDMA3_RLC2_MIDCMD_DATA7_DEFAULT 0x00000000 6119 #define mmSDMA3_RLC2_MIDCMD_DATA8_DEFAULT 0x00000000 6120 #define mmSDMA3_RLC2_MIDCMD_DATA9_DEFAULT 0x00000000 6121 #define mmSDMA3_RLC2_MIDCMD_DATA10_DEFAULT 0x00000000 6122 #define mmSDMA3_RLC2_MIDCMD_CNTL_DEFAULT 0x00000000 6123 #define mmSDMA3_RLC3_RB_CNTL_DEFAULT 0x80040000 6124 #define mmSDMA3_RLC3_RB_BASE_DEFAULT 0x00000000 6125 #define mmSDMA3_RLC3_RB_BASE_HI_DEFAULT 0x00000000 6126 #define mmSDMA3_RLC3_RB_RPTR_DEFAULT 0x00000000 6127 #define mmSDMA3_RLC3_RB_RPTR_HI_DEFAULT 0x00000000 6128 #define mmSDMA3_RLC3_RB_WPTR_DEFAULT 0x00000000 6129 #define mmSDMA3_RLC3_RB_WPTR_HI_DEFAULT 0x00000000 6130 #define mmSDMA3_RLC3_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 6131 #define mmSDMA3_RLC3_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 6132 #define mmSDMA3_RLC3_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 6133 #define mmSDMA3_RLC3_IB_CNTL_DEFAULT 0x00000100 6134 #define mmSDMA3_RLC3_IB_RPTR_DEFAULT 0x00000000 6135 #define mmSDMA3_RLC3_IB_OFFSET_DEFAULT 0x00000000 6136 #define mmSDMA3_RLC3_IB_BASE_LO_DEFAULT 0x00000000 6137 #define mmSDMA3_RLC3_IB_BASE_HI_DEFAULT 0x00000000 6138 #define mmSDMA3_RLC3_IB_SIZE_DEFAULT 0x00000000 6139 #define mmSDMA3_RLC3_SKIP_CNTL_DEFAULT 0x00000000 6140 #define mmSDMA3_RLC3_CONTEXT_STATUS_DEFAULT 0x00000004 6141 #define mmSDMA3_RLC3_DOORBELL_DEFAULT 0x00000000 6142 #define mmSDMA3_RLC3_STATUS_DEFAULT 0x00000000 6143 #define mmSDMA3_RLC3_DOORBELL_LOG_DEFAULT 0x00000000 6144 #define mmSDMA3_RLC3_WATERMARK_DEFAULT 0x00000000 6145 #define mmSDMA3_RLC3_DOORBELL_OFFSET_DEFAULT 0x00000000 6146 #define mmSDMA3_RLC3_CSA_ADDR_LO_DEFAULT 0x00000000 6147 #define mmSDMA3_RLC3_CSA_ADDR_HI_DEFAULT 0x00000000 6148 #define mmSDMA3_RLC3_IB_SUB_REMAIN_DEFAULT 0x00000000 6149 #define mmSDMA3_RLC3_PREEMPT_DEFAULT 0x00000000 6150 #define mmSDMA3_RLC3_DUMMY_REG_DEFAULT 0x0000000f 6151 #define mmSDMA3_RLC3_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 6152 #define mmSDMA3_RLC3_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 6153 #define mmSDMA3_RLC3_RB_AQL_CNTL_DEFAULT 0x00004000 6154 #define mmSDMA3_RLC3_MINOR_PTR_UPDATE_DEFAULT 0x00000000 6155 #define mmSDMA3_RLC3_MIDCMD_DATA0_DEFAULT 0x00000000 6156 #define mmSDMA3_RLC3_MIDCMD_DATA1_DEFAULT 0x00000000 6157 #define mmSDMA3_RLC3_MIDCMD_DATA2_DEFAULT 0x00000000 6158 #define mmSDMA3_RLC3_MIDCMD_DATA3_DEFAULT 0x00000000 6159 #define mmSDMA3_RLC3_MIDCMD_DATA4_DEFAULT 0x00000000 6160 #define mmSDMA3_RLC3_MIDCMD_DATA5_DEFAULT 0x00000000 6161 #define mmSDMA3_RLC3_MIDCMD_DATA6_DEFAULT 0x00000000 6162 #define mmSDMA3_RLC3_MIDCMD_DATA7_DEFAULT 0x00000000 6163 #define mmSDMA3_RLC3_MIDCMD_DATA8_DEFAULT 0x00000000 6164 #define mmSDMA3_RLC3_MIDCMD_DATA9_DEFAULT 0x00000000 6165 #define mmSDMA3_RLC3_MIDCMD_DATA10_DEFAULT 0x00000000 6166 #define mmSDMA3_RLC3_MIDCMD_CNTL_DEFAULT 0x00000000 6167 #define mmSDMA3_RLC4_RB_CNTL_DEFAULT 0x80040000 6168 #define mmSDMA3_RLC4_RB_BASE_DEFAULT 0x00000000 6169 #define mmSDMA3_RLC4_RB_BASE_HI_DEFAULT 0x00000000 6170 #define mmSDMA3_RLC4_RB_RPTR_DEFAULT 0x00000000 6171 #define mmSDMA3_RLC4_RB_RPTR_HI_DEFAULT 0x00000000 6172 #define mmSDMA3_RLC4_RB_WPTR_DEFAULT 0x00000000 6173 #define mmSDMA3_RLC4_RB_WPTR_HI_DEFAULT 0x00000000 6174 #define mmSDMA3_RLC4_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 6175 #define mmSDMA3_RLC4_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 6176 #define mmSDMA3_RLC4_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 6177 #define mmSDMA3_RLC4_IB_CNTL_DEFAULT 0x00000100 6178 #define mmSDMA3_RLC4_IB_RPTR_DEFAULT 0x00000000 6179 #define mmSDMA3_RLC4_IB_OFFSET_DEFAULT 0x00000000 6180 #define mmSDMA3_RLC4_IB_BASE_LO_DEFAULT 0x00000000 6181 #define mmSDMA3_RLC4_IB_BASE_HI_DEFAULT 0x00000000 6182 #define mmSDMA3_RLC4_IB_SIZE_DEFAULT 0x00000000 6183 #define mmSDMA3_RLC4_SKIP_CNTL_DEFAULT 0x00000000 6184 #define mmSDMA3_RLC4_CONTEXT_STATUS_DEFAULT 0x00000004 6185 #define mmSDMA3_RLC4_DOORBELL_DEFAULT 0x00000000 6186 #define mmSDMA3_RLC4_STATUS_DEFAULT 0x00000000 6187 #define mmSDMA3_RLC4_DOORBELL_LOG_DEFAULT 0x00000000 6188 #define mmSDMA3_RLC4_WATERMARK_DEFAULT 0x00000000 6189 #define mmSDMA3_RLC4_DOORBELL_OFFSET_DEFAULT 0x00000000 6190 #define mmSDMA3_RLC4_CSA_ADDR_LO_DEFAULT 0x00000000 6191 #define mmSDMA3_RLC4_CSA_ADDR_HI_DEFAULT 0x00000000 6192 #define mmSDMA3_RLC4_IB_SUB_REMAIN_DEFAULT 0x00000000 6193 #define mmSDMA3_RLC4_PREEMPT_DEFAULT 0x00000000 6194 #define mmSDMA3_RLC4_DUMMY_REG_DEFAULT 0x0000000f 6195 #define mmSDMA3_RLC4_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 6196 #define mmSDMA3_RLC4_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 6197 #define mmSDMA3_RLC4_RB_AQL_CNTL_DEFAULT 0x00004000 6198 #define mmSDMA3_RLC4_MINOR_PTR_UPDATE_DEFAULT 0x00000000 6199 #define mmSDMA3_RLC4_MIDCMD_DATA0_DEFAULT 0x00000000 6200 #define mmSDMA3_RLC4_MIDCMD_DATA1_DEFAULT 0x00000000 6201 #define mmSDMA3_RLC4_MIDCMD_DATA2_DEFAULT 0x00000000 6202 #define mmSDMA3_RLC4_MIDCMD_DATA3_DEFAULT 0x00000000 6203 #define mmSDMA3_RLC4_MIDCMD_DATA4_DEFAULT 0x00000000 6204 #define mmSDMA3_RLC4_MIDCMD_DATA5_DEFAULT 0x00000000 6205 #define mmSDMA3_RLC4_MIDCMD_DATA6_DEFAULT 0x00000000 6206 #define mmSDMA3_RLC4_MIDCMD_DATA7_DEFAULT 0x00000000 6207 #define mmSDMA3_RLC4_MIDCMD_DATA8_DEFAULT 0x00000000 6208 #define mmSDMA3_RLC4_MIDCMD_DATA9_DEFAULT 0x00000000 6209 #define mmSDMA3_RLC4_MIDCMD_DATA10_DEFAULT 0x00000000 6210 #define mmSDMA3_RLC4_MIDCMD_CNTL_DEFAULT 0x00000000 6211 #define mmSDMA3_RLC5_RB_CNTL_DEFAULT 0x80040000 6212 #define mmSDMA3_RLC5_RB_BASE_DEFAULT 0x00000000 6213 #define mmSDMA3_RLC5_RB_BASE_HI_DEFAULT 0x00000000 6214 #define mmSDMA3_RLC5_RB_RPTR_DEFAULT 0x00000000 6215 #define mmSDMA3_RLC5_RB_RPTR_HI_DEFAULT 0x00000000 6216 #define mmSDMA3_RLC5_RB_WPTR_DEFAULT 0x00000000 6217 #define mmSDMA3_RLC5_RB_WPTR_HI_DEFAULT 0x00000000 6218 #define mmSDMA3_RLC5_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 6219 #define mmSDMA3_RLC5_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 6220 #define mmSDMA3_RLC5_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 6221 #define mmSDMA3_RLC5_IB_CNTL_DEFAULT 0x00000100 6222 #define mmSDMA3_RLC5_IB_RPTR_DEFAULT 0x00000000 6223 #define mmSDMA3_RLC5_IB_OFFSET_DEFAULT 0x00000000 6224 #define mmSDMA3_RLC5_IB_BASE_LO_DEFAULT 0x00000000 6225 #define mmSDMA3_RLC5_IB_BASE_HI_DEFAULT 0x00000000 6226 #define mmSDMA3_RLC5_IB_SIZE_DEFAULT 0x00000000 6227 #define mmSDMA3_RLC5_SKIP_CNTL_DEFAULT 0x00000000 6228 #define mmSDMA3_RLC5_CONTEXT_STATUS_DEFAULT 0x00000004 6229 #define mmSDMA3_RLC5_DOORBELL_DEFAULT 0x00000000 6230 #define mmSDMA3_RLC5_STATUS_DEFAULT 0x00000000 6231 #define mmSDMA3_RLC5_DOORBELL_LOG_DEFAULT 0x00000000 6232 #define mmSDMA3_RLC5_WATERMARK_DEFAULT 0x00000000 6233 #define mmSDMA3_RLC5_DOORBELL_OFFSET_DEFAULT 0x00000000 6234 #define mmSDMA3_RLC5_CSA_ADDR_LO_DEFAULT 0x00000000 6235 #define mmSDMA3_RLC5_CSA_ADDR_HI_DEFAULT 0x00000000 6236 #define mmSDMA3_RLC5_IB_SUB_REMAIN_DEFAULT 0x00000000 6237 #define mmSDMA3_RLC5_PREEMPT_DEFAULT 0x00000000 6238 #define mmSDMA3_RLC5_DUMMY_REG_DEFAULT 0x0000000f 6239 #define mmSDMA3_RLC5_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 6240 #define mmSDMA3_RLC5_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 6241 #define mmSDMA3_RLC5_RB_AQL_CNTL_DEFAULT 0x00004000 6242 #define mmSDMA3_RLC5_MINOR_PTR_UPDATE_DEFAULT 0x00000000 6243 #define mmSDMA3_RLC5_MIDCMD_DATA0_DEFAULT 0x00000000 6244 #define mmSDMA3_RLC5_MIDCMD_DATA1_DEFAULT 0x00000000 6245 #define mmSDMA3_RLC5_MIDCMD_DATA2_DEFAULT 0x00000000 6246 #define mmSDMA3_RLC5_MIDCMD_DATA3_DEFAULT 0x00000000 6247 #define mmSDMA3_RLC5_MIDCMD_DATA4_DEFAULT 0x00000000 6248 #define mmSDMA3_RLC5_MIDCMD_DATA5_DEFAULT 0x00000000 6249 #define mmSDMA3_RLC5_MIDCMD_DATA6_DEFAULT 0x00000000 6250 #define mmSDMA3_RLC5_MIDCMD_DATA7_DEFAULT 0x00000000 6251 #define mmSDMA3_RLC5_MIDCMD_DATA8_DEFAULT 0x00000000 6252 #define mmSDMA3_RLC5_MIDCMD_DATA9_DEFAULT 0x00000000 6253 #define mmSDMA3_RLC5_MIDCMD_DATA10_DEFAULT 0x00000000 6254 #define mmSDMA3_RLC5_MIDCMD_CNTL_DEFAULT 0x00000000 6255 #define mmSDMA3_RLC6_RB_CNTL_DEFAULT 0x80040000 6256 #define mmSDMA3_RLC6_RB_BASE_DEFAULT 0x00000000 6257 #define mmSDMA3_RLC6_RB_BASE_HI_DEFAULT 0x00000000 6258 #define mmSDMA3_RLC6_RB_RPTR_DEFAULT 0x00000000 6259 #define mmSDMA3_RLC6_RB_RPTR_HI_DEFAULT 0x00000000 6260 #define mmSDMA3_RLC6_RB_WPTR_DEFAULT 0x00000000 6261 #define mmSDMA3_RLC6_RB_WPTR_HI_DEFAULT 0x00000000 6262 #define mmSDMA3_RLC6_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 6263 #define mmSDMA3_RLC6_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 6264 #define mmSDMA3_RLC6_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 6265 #define mmSDMA3_RLC6_IB_CNTL_DEFAULT 0x00000100 6266 #define mmSDMA3_RLC6_IB_RPTR_DEFAULT 0x00000000 6267 #define mmSDMA3_RLC6_IB_OFFSET_DEFAULT 0x00000000 6268 #define mmSDMA3_RLC6_IB_BASE_LO_DEFAULT 0x00000000 6269 #define mmSDMA3_RLC6_IB_BASE_HI_DEFAULT 0x00000000 6270 #define mmSDMA3_RLC6_IB_SIZE_DEFAULT 0x00000000 6271 #define mmSDMA3_RLC6_SKIP_CNTL_DEFAULT 0x00000000 6272 #define mmSDMA3_RLC6_CONTEXT_STATUS_DEFAULT 0x00000004 6273 #define mmSDMA3_RLC6_DOORBELL_DEFAULT 0x00000000 6274 #define mmSDMA3_RLC6_STATUS_DEFAULT 0x00000000 6275 #define mmSDMA3_RLC6_DOORBELL_LOG_DEFAULT 0x00000000 6276 #define mmSDMA3_RLC6_WATERMARK_DEFAULT 0x00000000 6277 #define mmSDMA3_RLC6_DOORBELL_OFFSET_DEFAULT 0x00000000 6278 #define mmSDMA3_RLC6_CSA_ADDR_LO_DEFAULT 0x00000000 6279 #define mmSDMA3_RLC6_CSA_ADDR_HI_DEFAULT 0x00000000 6280 #define mmSDMA3_RLC6_IB_SUB_REMAIN_DEFAULT 0x00000000 6281 #define mmSDMA3_RLC6_PREEMPT_DEFAULT 0x00000000 6282 #define mmSDMA3_RLC6_DUMMY_REG_DEFAULT 0x0000000f 6283 #define mmSDMA3_RLC6_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 6284 #define mmSDMA3_RLC6_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 6285 #define mmSDMA3_RLC6_RB_AQL_CNTL_DEFAULT 0x00004000 6286 #define mmSDMA3_RLC6_MINOR_PTR_UPDATE_DEFAULT 0x00000000 6287 #define mmSDMA3_RLC6_MIDCMD_DATA0_DEFAULT 0x00000000 6288 #define mmSDMA3_RLC6_MIDCMD_DATA1_DEFAULT 0x00000000 6289 #define mmSDMA3_RLC6_MIDCMD_DATA2_DEFAULT 0x00000000 6290 #define mmSDMA3_RLC6_MIDCMD_DATA3_DEFAULT 0x00000000 6291 #define mmSDMA3_RLC6_MIDCMD_DATA4_DEFAULT 0x00000000 6292 #define mmSDMA3_RLC6_MIDCMD_DATA5_DEFAULT 0x00000000 6293 #define mmSDMA3_RLC6_MIDCMD_DATA6_DEFAULT 0x00000000 6294 #define mmSDMA3_RLC6_MIDCMD_DATA7_DEFAULT 0x00000000 6295 #define mmSDMA3_RLC6_MIDCMD_DATA8_DEFAULT 0x00000000 6296 #define mmSDMA3_RLC6_MIDCMD_DATA9_DEFAULT 0x00000000 6297 #define mmSDMA3_RLC6_MIDCMD_DATA10_DEFAULT 0x00000000 6298 #define mmSDMA3_RLC6_MIDCMD_CNTL_DEFAULT 0x00000000 6299 #define mmSDMA3_RLC7_RB_CNTL_DEFAULT 0x80040000 6300 #define mmSDMA3_RLC7_RB_BASE_DEFAULT 0x00000000 6301 #define mmSDMA3_RLC7_RB_BASE_HI_DEFAULT 0x00000000 6302 #define mmSDMA3_RLC7_RB_RPTR_DEFAULT 0x00000000 6303 #define mmSDMA3_RLC7_RB_RPTR_HI_DEFAULT 0x00000000 6304 #define mmSDMA3_RLC7_RB_WPTR_DEFAULT 0x00000000 6305 #define mmSDMA3_RLC7_RB_WPTR_HI_DEFAULT 0x00000000 6306 #define mmSDMA3_RLC7_RB_WPTR_POLL_CNTL_DEFAULT 0x00403000 6307 #define mmSDMA3_RLC7_RB_RPTR_ADDR_HI_DEFAULT 0x00000000 6308 #define mmSDMA3_RLC7_RB_RPTR_ADDR_LO_DEFAULT 0x00000000 6309 #define mmSDMA3_RLC7_IB_CNTL_DEFAULT 0x00000100 6310 #define mmSDMA3_RLC7_IB_RPTR_DEFAULT 0x00000000 6311 #define mmSDMA3_RLC7_IB_OFFSET_DEFAULT 0x00000000 6312 #define mmSDMA3_RLC7_IB_BASE_LO_DEFAULT 0x00000000 6313 #define mmSDMA3_RLC7_IB_BASE_HI_DEFAULT 0x00000000 6314 #define mmSDMA3_RLC7_IB_SIZE_DEFAULT 0x00000000 6315 #define mmSDMA3_RLC7_SKIP_CNTL_DEFAULT 0x00000000 6316 #define mmSDMA3_RLC7_CONTEXT_STATUS_DEFAULT 0x00000004 6317 #define mmSDMA3_RLC7_DOORBELL_DEFAULT 0x00000000 6318 #define mmSDMA3_RLC7_STATUS_DEFAULT 0x00000000 6319 #define mmSDMA3_RLC7_DOORBELL_LOG_DEFAULT 0x00000000 6320 #define mmSDMA3_RLC7_WATERMARK_DEFAULT 0x00000000 6321 #define mmSDMA3_RLC7_DOORBELL_OFFSET_DEFAULT 0x00000000 6322 #define mmSDMA3_RLC7_CSA_ADDR_LO_DEFAULT 0x00000000 6323 #define mmSDMA3_RLC7_CSA_ADDR_HI_DEFAULT 0x00000000 6324 #define mmSDMA3_RLC7_IB_SUB_REMAIN_DEFAULT 0x00000000 6325 #define mmSDMA3_RLC7_PREEMPT_DEFAULT 0x00000000 6326 #define mmSDMA3_RLC7_DUMMY_REG_DEFAULT 0x0000000f 6327 #define mmSDMA3_RLC7_RB_WPTR_POLL_ADDR_HI_DEFAULT 0x00000000 6328 #define mmSDMA3_RLC7_RB_WPTR_POLL_ADDR_LO_DEFAULT 0x00000000 6329 #define mmSDMA3_RLC7_RB_AQL_CNTL_DEFAULT 0x00004000 6330 #define mmSDMA3_RLC7_MINOR_PTR_UPDATE_DEFAULT 0x00000000 6331 #define mmSDMA3_RLC7_MIDCMD_DATA0_DEFAULT 0x00000000 6332 #define mmSDMA3_RLC7_MIDCMD_DATA1_DEFAULT 0x00000000 6333 #define mmSDMA3_RLC7_MIDCMD_DATA2_DEFAULT 0x00000000 6334 #define mmSDMA3_RLC7_MIDCMD_DATA3_DEFAULT 0x00000000 6335 #define mmSDMA3_RLC7_MIDCMD_DATA4_DEFAULT 0x00000000 6336 #define mmSDMA3_RLC7_MIDCMD_DATA5_DEFAULT 0x00000000 6337 #define mmSDMA3_RLC7_MIDCMD_DATA6_DEFAULT 0x00000000 6338 #define mmSDMA3_RLC7_MIDCMD_DATA7_DEFAULT 0x00000000 6339 #define mmSDMA3_RLC7_MIDCMD_DATA8_DEFAULT 0x00000000 6340 #define mmSDMA3_RLC7_MIDCMD_DATA9_DEFAULT 0x00000000 6341 #define mmSDMA3_RLC7_MIDCMD_DATA10_DEFAULT 0x00000000 6342 #define mmSDMA3_RLC7_MIDCMD_CNTL_DEFAULT 0x00000000 6343 6344 6345 // addressBlock: gccacind 6346 #define ixPCC_STALL_PATTERN_CTRL_DEFAULT 0x07fa0401 6347 #define ixPWRBRK_STALL_PATTERN_CTRL_DEFAULT 0x00fa0401 6348 #define ixPCC_STALL_PATTERN_1_2_DEFAULT 0x00000000 6349 #define ixPCC_STALL_PATTERN_3_4_DEFAULT 0x00000000 6350 #define ixPCC_STALL_PATTERN_5_6_DEFAULT 0x00000000 6351 #define ixPCC_STALL_PATTERN_7_DEFAULT 0x00000000 6352 #define ixPWRBRK_STALL_PATTERN_1_2_DEFAULT 0x00000000 6353 #define ixPWRBRK_STALL_PATTERN_3_4_DEFAULT 0x00000000 6354 #define ixPWRBRK_STALL_PATTERN_5_6_DEFAULT 0x00000000 6355 #define ixPWRBRK_STALL_PATTERN_7_DEFAULT 0x00000000 6356 #define ixPCC_PWRBRK_HYSTERESIS_CTRL_DEFAULT 0x00000000 6357 #define ixEDC_STRETCH_PERF_COUNTER_DEFAULT 0x00000000 6358 #define ixEDC_UNSTRETCH_PERF_COUNTER_DEFAULT 0x00000000 6359 #define ixEDC_STRETCH_NUM_PERF_COUNTER_DEFAULT 0x00000000 6360 #define ixGC_CAC_ID_DEFAULT 0x00000000 6361 #define ixGC_CAC_CNTL_DEFAULT 0x000001fe 6362 #define ixGC_CAC_OVR_SEL_DEFAULT 0x00000000 6363 #define ixGC_CAC_OVR_VAL_DEFAULT 0x00000000 6364 #define ixGC_CAC_WEIGHT_BCI_0_DEFAULT 0x00010001 6365 #define ixGC_CAC_WEIGHT_CB_0_DEFAULT 0x00010001 6366 #define ixGC_CAC_WEIGHT_CB_1_DEFAULT 0x00010001 6367 #define ixGC_CAC_WEIGHT_CB_2_DEFAULT 0x00010001 6368 #define ixGC_CAC_WEIGHT_CB_3_DEFAULT 0x00010001 6369 #define ixGC_CAC_WEIGHT_CB_4_DEFAULT 0x00010001 6370 #define ixGC_CAC_WEIGHT_CP_0_DEFAULT 0x00010001 6371 #define ixGC_CAC_WEIGHT_CP_1_DEFAULT 0x00000001 6372 #define ixGC_CAC_WEIGHT_DB_0_DEFAULT 0x00010001 6373 #define ixGC_CAC_WEIGHT_DB_1_DEFAULT 0x00010001 6374 #define ixGC_CAC_WEIGHT_DB_2_DEFAULT 0x00010001 6375 #define ixGC_CAC_WEIGHT_DB_3_DEFAULT 0x00010001 6376 #define ixGC_CAC_WEIGHT_DB_4_DEFAULT 0x00010001 6377 #define ixGC_CAC_WEIGHT_GDS_0_DEFAULT 0x00010001 6378 #define ixGC_CAC_WEIGHT_GDS_1_DEFAULT 0x00010001 6379 #define ixGC_CAC_WEIGHT_GDS_2_DEFAULT 0x00000001 6380 #define ixGC_CAC_WEIGHT_LDS_0_DEFAULT 0x00010001 6381 #define ixGC_CAC_WEIGHT_LDS_1_DEFAULT 0x00010001 6382 #define ixGC_CAC_WEIGHT_LDS_2_DEFAULT 0x00010001 6383 #define ixGC_CAC_WEIGHT_LDS_3_DEFAULT 0x00010001 6384 #define ixGC_CAC_WEIGHT_LDS_4_DEFAULT 0x00000001 6385 #define ixGC_CAC_WEIGHT_PA_0_DEFAULT 0x00010001 6386 #define ixGC_CAC_WEIGHT_PA_1_DEFAULT 0x00010001 6387 #define ixGC_CAC_WEIGHT_PA_2_DEFAULT 0x00010001 6388 #define ixGC_CAC_WEIGHT_PA_3_DEFAULT 0x00010001 6389 #define ixGC_CAC_WEIGHT_PC_0_DEFAULT 0x00000001 6390 #define ixGC_CAC_WEIGHT_SC_0_DEFAULT 0x00010001 6391 #define ixGC_CAC_WEIGHT_SC_1_DEFAULT 0x00010001 6392 #define ixGC_CAC_WEIGHT_SC_2_DEFAULT 0x00010001 6393 #define ixGC_CAC_WEIGHT_SC_3_DEFAULT 0x00010001 6394 #define ixGC_CAC_WEIGHT_SPI_0_DEFAULT 0x00010001 6395 #define ixGC_CAC_WEIGHT_SPI_1_DEFAULT 0x00010001 6396 #define ixGC_CAC_WEIGHT_SPI_2_DEFAULT 0x00010001 6397 #define ixGC_CAC_WEIGHT_SQ_0_DEFAULT 0x00010001 6398 #define ixGC_CAC_WEIGHT_SQ_1_DEFAULT 0x00010001 6399 #define ixGC_CAC_WEIGHT_SQ_2_DEFAULT 0x00010001 6400 #define ixGC_CAC_WEIGHT_SQ_3_DEFAULT 0x00010001 6401 #define ixGC_CAC_WEIGHT_SX_0_DEFAULT 0x00000001 6402 #define ixGC_CAC_WEIGHT_SXRB_0_DEFAULT 0x00010001 6403 #define ixGC_CAC_WEIGHT_TA_0_DEFAULT 0x00000001 6404 #define ixGC_CAC_WEIGHT_TCP_0_DEFAULT 0x00010001 6405 #define ixGC_CAC_WEIGHT_TCP_1_DEFAULT 0x00010001 6406 #define ixGC_CAC_WEIGHT_TCP_2_DEFAULT 0x00010001 6407 #define ixGC_CAC_WEIGHT_TCP_3_DEFAULT 0x00010001 6408 #define ixGC_CAC_WEIGHT_TD_0_DEFAULT 0x00010001 6409 #define ixGC_CAC_WEIGHT_TD_1_DEFAULT 0x00010001 6410 #define ixGC_CAC_WEIGHT_TD_2_DEFAULT 0x00010001 6411 #define ixGC_CAC_WEIGHT_TD_3_DEFAULT 0x00010001 6412 #define ixGC_CAC_WEIGHT_TD_4_DEFAULT 0x00010001 6413 #define ixGC_CAC_WEIGHT_TD_5_DEFAULT 0x00000001 6414 #define ixGC_CAC_WEIGHT_RMI_0_DEFAULT 0x00010001 6415 #define ixGC_CAC_WEIGHT_RMI_1_DEFAULT 0x00010001 6416 #define ixGC_CAC_WEIGHT_EA_0_DEFAULT 0x00010001 6417 #define ixGC_CAC_WEIGHT_EA_1_DEFAULT 0x00010001 6418 #define ixGC_CAC_WEIGHT_EA_2_DEFAULT 0x00010001 6419 #define ixGC_CAC_WEIGHT_UTCL2_ATCL2_0_DEFAULT 0x00010001 6420 #define ixGC_CAC_WEIGHT_UTCL2_ATCL2_1_DEFAULT 0x00010001 6421 #define ixGC_CAC_WEIGHT_UTCL2_ATCL2_2_DEFAULT 0x00010001 6422 #define ixGC_CAC_WEIGHT_UTCL2_ROUTER_0_DEFAULT 0x00010001 6423 #define ixGC_CAC_WEIGHT_UTCL2_ROUTER_1_DEFAULT 0x00010001 6424 #define ixGC_CAC_WEIGHT_UTCL2_ROUTER_2_DEFAULT 0x00010001 6425 #define ixGC_CAC_WEIGHT_UTCL2_ROUTER_3_DEFAULT 0x00010001 6426 #define ixGC_CAC_WEIGHT_UTCL2_ROUTER_4_DEFAULT 0x00010001 6427 #define ixGC_CAC_WEIGHT_UTCL2_VML2_0_DEFAULT 0x00010001 6428 #define ixGC_CAC_WEIGHT_UTCL2_VML2_1_DEFAULT 0x00010001 6429 #define ixGC_CAC_WEIGHT_UTCL2_VML2_2_DEFAULT 0x00010001 6430 #define ixGC_CAC_WEIGHT_UTCL2_WALKER_0_DEFAULT 0x00010001 6431 #define ixGC_CAC_WEIGHT_UTCL2_WALKER_1_DEFAULT 0x00010001 6432 #define ixGC_CAC_WEIGHT_UTCL2_WALKER_2_DEFAULT 0x00010001 6433 #define ixGC_CAC_WEIGHT_CU_0_DEFAULT 0x00010001 6434 #define ixGC_CAC_WEIGHT_UTCL1_0_DEFAULT 0x00000001 6435 #define ixGC_CAC_WEIGHT_GE_0_DEFAULT 0x00010001 6436 #define ixGC_CAC_WEIGHT_GE_1_DEFAULT 0x00010001 6437 #define ixGC_CAC_WEIGHT_GE_2_DEFAULT 0x00010001 6438 #define ixGC_CAC_WEIGHT_GE_3_DEFAULT 0x00010001 6439 #define ixGC_CAC_WEIGHT_GE_4_DEFAULT 0x00010001 6440 #define ixGC_CAC_WEIGHT_GE_5_DEFAULT 0x00010001 6441 #define ixGC_CAC_WEIGHT_GE_6_DEFAULT 0x00010001 6442 #define ixGC_CAC_WEIGHT_GE_7_DEFAULT 0x00010001 6443 #define ixGC_CAC_WEIGHT_GE_8_DEFAULT 0x00010001 6444 #define ixGC_CAC_WEIGHT_GE_9_DEFAULT 0x00010001 6445 #define ixGC_CAC_WEIGHT_GE_10_DEFAULT 0x00000001 6446 #define ixGC_CAC_WEIGHT_PMM_0_DEFAULT 0x00000001 6447 #define ixGC_CAC_WEIGHT_GL2C_0_DEFAULT 0x00010001 6448 #define ixGC_CAC_WEIGHT_GL2C_1_DEFAULT 0x00010001 6449 #define ixGC_CAC_WEIGHT_GL2C_2_DEFAULT 0x00000001 6450 #define ixGC_CAC_WEIGHT_GUS_0_DEFAULT 0x00010001 6451 #define ixGC_CAC_WEIGHT_GUS_1_DEFAULT 0x00000001 6452 #define ixGC_CAC_WEIGHT_PH_0_DEFAULT 0x00010001 6453 #define ixGC_CAC_WEIGHT_PH_1_DEFAULT 0x00010001 6454 #define ixGC_CAC_WEIGHT_PH_2_DEFAULT 0x00010001 6455 #define ixGC_CAC_WEIGHT_PH_3_DEFAULT 0x00010001 6456 #define ixGC_CAC_WEIGHT_SDMA_0_DEFAULT 0x00010001 6457 #define ixGC_CAC_WEIGHT_SDMA_1_DEFAULT 0x00010001 6458 #define ixGC_CAC_WEIGHT_SDMA_2_DEFAULT 0x00010001 6459 #define ixGC_CAC_WEIGHT_SDMA_3_DEFAULT 0x00010001 6460 #define ixGC_CAC_WEIGHT_SDMA_4_DEFAULT 0x00010001 6461 #define ixGC_CAC_WEIGHT_SDMA_5_DEFAULT 0x00010001 6462 #define ixGC_CAC_WEIGHT_SP_0_DEFAULT 0x00010001 6463 #define ixGC_CAC_WEIGHT_SP_1_DEFAULT 0x00000001 6464 #define ixGC_CAC_WEIGHT_GL1C_0_DEFAULT 0x00010001 6465 #define ixGC_CAC_WEIGHT_GL1C_1_DEFAULT 0x00010001 6466 #define ixGC_CAC_WEIGHT_GL1C_2_DEFAULT 0x00000001 6467 #define ixGC_CAC_WEIGHT_CHC_0_DEFAULT 0x00010001 6468 #define ixGC_CAC_WEIGHT_CHC_1_DEFAULT 0x00000001 6469 #define ixGC_CAC_WEIGHT_SQC_0_DEFAULT 0x00010001 6470 #define ixGC_CAC_WEIGHT_SQC_1_DEFAULT 0x00000001 6471 #define ixGC_CAC_WEIGHT_RLC_0_DEFAULT 0x00000001 6472 #define ixGC_CAC_ACC_LDS0_DEFAULT 0x00000000 6473 #define ixGC_CAC_ACC_LDS1_DEFAULT 0x00000000 6474 #define ixGC_CAC_ACC_LDS2_DEFAULT 0x00000000 6475 #define ixGC_CAC_ACC_LDS3_DEFAULT 0x00000000 6476 #define ixGC_CAC_ACC_LDS4_DEFAULT 0x00000000 6477 #define ixGC_CAC_ACC_LDS5_DEFAULT 0x00000000 6478 #define ixGC_CAC_ACC_LDS6_DEFAULT 0x00000000 6479 #define ixGC_CAC_ACC_LDS7_DEFAULT 0x00000000 6480 #define ixGC_CAC_ACC_LDS8_DEFAULT 0x00000000 6481 #define ixGC_CAC_ACC_BCI0_DEFAULT 0x00000000 6482 #define ixGC_CAC_ACC_BCI1_DEFAULT 0x00000000 6483 #define ixGC_CAC_ACC_CB0_DEFAULT 0x00000000 6484 #define ixGC_CAC_ACC_CB1_DEFAULT 0x00000000 6485 #define ixGC_CAC_ACC_CB2_DEFAULT 0x00000000 6486 #define ixGC_CAC_ACC_CB3_DEFAULT 0x00000000 6487 #define ixGC_CAC_ACC_CB4_DEFAULT 0x00000000 6488 #define ixGC_CAC_ACC_CB5_DEFAULT 0x00000000 6489 #define ixGC_CAC_ACC_CB6_DEFAULT 0x00000000 6490 #define ixGC_CAC_ACC_CB7_DEFAULT 0x00000000 6491 #define ixGC_CAC_ACC_CB8_DEFAULT 0x00000000 6492 #define ixGC_CAC_ACC_CB9_DEFAULT 0x00000000 6493 #define ixGC_CAC_ACC_CP0_DEFAULT 0x00000000 6494 #define ixGC_CAC_ACC_CP1_DEFAULT 0x00000000 6495 #define ixGC_CAC_ACC_CP2_DEFAULT 0x00000000 6496 #define ixGC_CAC_ACC_DB0_DEFAULT 0x00000000 6497 #define ixGC_CAC_ACC_DB1_DEFAULT 0x00000000 6498 #define ixGC_CAC_ACC_DB2_DEFAULT 0x00000000 6499 #define ixGC_CAC_ACC_DB3_DEFAULT 0x00000000 6500 #define ixGC_CAC_ACC_DB4_DEFAULT 0x00000000 6501 #define ixGC_CAC_ACC_DB5_DEFAULT 0x00000000 6502 #define ixGC_CAC_ACC_DB6_DEFAULT 0x00000000 6503 #define ixGC_CAC_ACC_DB7_DEFAULT 0x00000000 6504 #define ixGC_CAC_ACC_DB8_DEFAULT 0x00000000 6505 #define ixGC_CAC_ACC_DB9_DEFAULT 0x00000000 6506 #define ixGC_CAC_ACC_GDS0_DEFAULT 0x00000000 6507 #define ixGC_CAC_ACC_GDS1_DEFAULT 0x00000000 6508 #define ixGC_CAC_ACC_GDS2_DEFAULT 0x00000000 6509 #define ixGC_CAC_ACC_GDS3_DEFAULT 0x00000000 6510 #define ixGC_CAC_ACC_GDS4_DEFAULT 0x00000000 6511 #define ixGC_CAC_ACC_GDS5_DEFAULT 0x00000000 6512 #define ixGC_CAC_ACC_GDS6_DEFAULT 0x00000000 6513 #define ixGC_CAC_ACC_PA0_DEFAULT 0x00000000 6514 #define ixGC_CAC_ACC_PA1_DEFAULT 0x00000000 6515 #define ixGC_CAC_ACC_PA2_DEFAULT 0x00000000 6516 #define ixGC_CAC_ACC_PA3_DEFAULT 0x00000000 6517 #define ixGC_CAC_ACC_PA4_DEFAULT 0x00000000 6518 #define ixGC_CAC_ACC_PA5_DEFAULT 0x00000000 6519 #define ixGC_CAC_ACC_PA6_DEFAULT 0x00000000 6520 #define ixGC_CAC_ACC_PA7_DEFAULT 0x00000000 6521 #define ixGC_CAC_ACC_PC0_DEFAULT 0x00000000 6522 #define ixGC_CAC_ACC_SC0_DEFAULT 0x00000000 6523 #define ixGC_CAC_ACC_SC1_DEFAULT 0x00000000 6524 #define ixGC_CAC_ACC_SC2_DEFAULT 0x00000000 6525 #define ixGC_CAC_ACC_SC3_DEFAULT 0x00000000 6526 #define ixGC_CAC_ACC_SC4_DEFAULT 0x00000000 6527 #define ixGC_CAC_ACC_SC5_DEFAULT 0x00000000 6528 #define ixGC_CAC_ACC_SC6_DEFAULT 0x00000000 6529 #define ixGC_CAC_ACC_SC7_DEFAULT 0x00000000 6530 #define ixGC_CAC_ACC_SPI0_DEFAULT 0x00000000 6531 #define ixGC_CAC_ACC_SPI1_DEFAULT 0x00000000 6532 #define ixGC_CAC_ACC_SPI2_DEFAULT 0x00000000 6533 #define ixGC_CAC_ACC_SPI3_DEFAULT 0x00000000 6534 #define ixGC_CAC_ACC_SPI4_DEFAULT 0x00000000 6535 #define ixGC_CAC_ACC_SPI5_DEFAULT 0x00000000 6536 #define ixGC_CAC_ACC_SQ0_LOWER_DEFAULT 0x00000000 6537 #define ixGC_CAC_ACC_SQ0_UPPER_DEFAULT 0x00000000 6538 #define ixGC_CAC_ACC_SQ1_LOWER_DEFAULT 0x00000000 6539 #define ixGC_CAC_ACC_SQ1_UPPER_DEFAULT 0x00000000 6540 #define ixGC_CAC_ACC_SQ2_LOWER_DEFAULT 0x00000000 6541 #define ixGC_CAC_ACC_SQ2_UPPER_DEFAULT 0x00000000 6542 #define ixGC_CAC_ACC_SQ3_LOWER_DEFAULT 0x00000000 6543 #define ixGC_CAC_ACC_SQ3_UPPER_DEFAULT 0x00000000 6544 #define ixGC_CAC_ACC_SQ4_LOWER_DEFAULT 0x00000000 6545 #define ixGC_CAC_ACC_SQ4_UPPER_DEFAULT 0x00000000 6546 #define ixGC_CAC_ACC_SQ5_LOWER_DEFAULT 0x00000000 6547 #define ixGC_CAC_ACC_SQ5_UPPER_DEFAULT 0x00000000 6548 #define ixGC_CAC_ACC_SQ6_LOWER_DEFAULT 0x00000000 6549 #define ixGC_CAC_ACC_SQ6_UPPER_DEFAULT 0x00000000 6550 #define ixGC_CAC_ACC_SQ7_LOWER_DEFAULT 0x00000000 6551 #define ixGC_CAC_ACC_SQ7_UPPER_DEFAULT 0x00000000 6552 #define ixGC_CAC_ACC_SQ8_LOWER_DEFAULT 0x00000000 6553 #define ixGC_CAC_ACC_SQ8_UPPER_DEFAULT 0x00000000 6554 #define ixGC_CAC_ACC_SX0_DEFAULT 0x00000000 6555 #define ixGC_CAC_ACC_SXRB0_DEFAULT 0x00000000 6556 #define ixGC_CAC_ACC_TA0_DEFAULT 0x00000000 6557 #define ixGC_CAC_ACC_TCP0_DEFAULT 0x00000000 6558 #define ixGC_CAC_ACC_TCP1_DEFAULT 0x00000000 6559 #define ixGC_CAC_ACC_TCP2_DEFAULT 0x00000000 6560 #define ixGC_CAC_ACC_TCP3_DEFAULT 0x00000000 6561 #define ixGC_CAC_ACC_TCP4_DEFAULT 0x00000000 6562 #define ixGC_CAC_ACC_TCP5_DEFAULT 0x00000000 6563 #define ixGC_CAC_ACC_TCP6_DEFAULT 0x00000000 6564 #define ixGC_CAC_ACC_TCP7_DEFAULT 0x00000000 6565 #define ixGC_CAC_ACC_TD0_DEFAULT 0x00000000 6566 #define ixGC_CAC_ACC_TD1_DEFAULT 0x00000000 6567 #define ixGC_CAC_ACC_TD2_DEFAULT 0x00000000 6568 #define ixGC_CAC_ACC_TD3_DEFAULT 0x00000000 6569 #define ixGC_CAC_ACC_TD4_DEFAULT 0x00000000 6570 #define ixGC_CAC_ACC_TD5_DEFAULT 0x00000000 6571 #define ixGC_CAC_ACC_TD6_DEFAULT 0x00000000 6572 #define ixGC_CAC_ACC_TD7_DEFAULT 0x00000000 6573 #define ixGC_CAC_ACC_TD8_DEFAULT 0x00000000 6574 #define ixGC_CAC_ACC_TD9_DEFAULT 0x00000000 6575 #define ixGC_CAC_ACC_TD10_DEFAULT 0x00000000 6576 #define ixGC_CAC_ACC_RMI0_DEFAULT 0x00000000 6577 #define ixGC_CAC_ACC_RMI1_DEFAULT 0x00000000 6578 #define ixGC_CAC_ACC_RMI2_DEFAULT 0x00000000 6579 #define ixGC_CAC_ACC_RMI3_DEFAULT 0x00000000 6580 #define ixGC_CAC_ACC_EA0_DEFAULT 0x00000000 6581 #define ixGC_CAC_ACC_EA1_DEFAULT 0x00000000 6582 #define ixGC_CAC_ACC_EA2_DEFAULT 0x00000000 6583 #define ixGC_CAC_ACC_EA3_DEFAULT 0x00000000 6584 #define ixGC_CAC_ACC_EA4_DEFAULT 0x00000000 6585 #define ixGC_CAC_ACC_EA5_DEFAULT 0x00000000 6586 #define ixGC_CAC_ACC_UTCL2_ATCL20_DEFAULT 0x00000000 6587 #define ixGC_CAC_ACC_UTCL2_ATCL21_DEFAULT 0x00000000 6588 #define ixGC_CAC_ACC_UTCL2_ATCL22_DEFAULT 0x00000000 6589 #define ixGC_CAC_ACC_UTCL2_ATCL23_DEFAULT 0x00000000 6590 #define ixGC_CAC_ACC_UTCL2_ATCL24_DEFAULT 0x00000000 6591 #define ixGC_CAC_ACC_UTCL2_ROUTER0_DEFAULT 0x00000000 6592 #define ixGC_CAC_ACC_UTCL2_ROUTER1_DEFAULT 0x00000000 6593 #define ixGC_CAC_ACC_UTCL2_ROUTER2_DEFAULT 0x00000000 6594 #define ixGC_CAC_ACC_UTCL2_ROUTER3_DEFAULT 0x00000000 6595 #define ixGC_CAC_ACC_UTCL2_ROUTER4_DEFAULT 0x00000000 6596 #define ixGC_CAC_ACC_UTCL2_ROUTER5_DEFAULT 0x00000000 6597 #define ixGC_CAC_ACC_UTCL2_ROUTER6_DEFAULT 0x00000000 6598 #define ixGC_CAC_ACC_UTCL2_ROUTER7_DEFAULT 0x00000000 6599 #define ixGC_CAC_ACC_UTCL2_ROUTER8_DEFAULT 0x00000000 6600 #define ixGC_CAC_ACC_UTCL2_ROUTER9_DEFAULT 0x00000000 6601 #define ixGC_CAC_ACC_UTCL2_VML20_DEFAULT 0x00000000 6602 #define ixGC_CAC_ACC_UTCL2_VML21_DEFAULT 0x00000000 6603 #define ixGC_CAC_ACC_UTCL2_VML22_DEFAULT 0x00000000 6604 #define ixGC_CAC_ACC_UTCL2_VML23_DEFAULT 0x00000000 6605 #define ixGC_CAC_ACC_UTCL2_VML24_DEFAULT 0x00000000 6606 #define ixGC_CAC_ACC_UTCL2_WALKER0_DEFAULT 0x00000000 6607 #define ixGC_CAC_ACC_UTCL2_WALKER1_DEFAULT 0x00000000 6608 #define ixGC_CAC_ACC_UTCL2_WALKER2_DEFAULT 0x00000000 6609 #define ixGC_CAC_ACC_UTCL2_WALKER3_DEFAULT 0x00000000 6610 #define ixGC_CAC_ACC_UTCL2_WALKER4_DEFAULT 0x00000000 6611 #define ixGC_CAC_ACC_CU0_DEFAULT 0x00000000 6612 #define ixGC_CAC_ACC_UTCL10_DEFAULT 0x00000000 6613 #define ixGC_CAC_ACC_CHC0_DEFAULT 0x00000000 6614 #define ixGC_CAC_ACC_CHC1_DEFAULT 0x00000000 6615 #define ixGC_CAC_ACC_CHC2_DEFAULT 0x00000000 6616 #define ixGC_CAC_ACC_GE0_DEFAULT 0x00000000 6617 #define ixGC_CAC_ACC_GE1_DEFAULT 0x00000000 6618 #define ixGC_CAC_ACC_GE2_DEFAULT 0x00000000 6619 #define ixGC_CAC_ACC_GE3_DEFAULT 0x00000000 6620 #define ixGC_CAC_ACC_GE4_DEFAULT 0x00000000 6621 #define ixGC_CAC_ACC_GE5_DEFAULT 0x00000000 6622 #define ixGC_CAC_ACC_GE6_DEFAULT 0x00000000 6623 #define ixGC_CAC_ACC_GE7_DEFAULT 0x00000000 6624 #define ixGC_CAC_ACC_GE8_DEFAULT 0x00000000 6625 #define ixGC_CAC_ACC_GE9_DEFAULT 0x00000000 6626 #define ixGC_CAC_ACC_GE10_DEFAULT 0x00000000 6627 #define ixGC_CAC_ACC_GE11_DEFAULT 0x00000000 6628 #define ixGC_CAC_ACC_GE12_DEFAULT 0x00000000 6629 #define ixGC_CAC_ACC_GE13_DEFAULT 0x00000000 6630 #define ixGC_CAC_ACC_GE14_DEFAULT 0x00000000 6631 #define ixGC_CAC_ACC_GE15_DEFAULT 0x00000000 6632 #define ixGC_CAC_ACC_GE16_DEFAULT 0x00000000 6633 #define ixGC_CAC_ACC_GE17_DEFAULT 0x00000000 6634 #define ixGC_CAC_ACC_GE18_DEFAULT 0x00000000 6635 #define ixGC_CAC_ACC_GE19_DEFAULT 0x00000000 6636 #define ixGC_CAC_ACC_GE20_DEFAULT 0x00000000 6637 #define ixGC_CAC_ACC_PMM0_DEFAULT 0x00000000 6638 #define ixGC_CAC_ACC_GL2C0_DEFAULT 0x00000000 6639 #define ixGC_CAC_ACC_GL2C1_DEFAULT 0x00000000 6640 #define ixGC_CAC_ACC_GL2C2_DEFAULT 0x00000000 6641 #define ixGC_CAC_ACC_GL2C3_DEFAULT 0x00000000 6642 #define ixGC_CAC_ACC_GL2C4_DEFAULT 0x00000000 6643 #define ixGC_CAC_ACC_GUS0_DEFAULT 0x00000000 6644 #define ixGC_CAC_ACC_GUS1_DEFAULT 0x00000000 6645 #define ixGC_CAC_ACC_GUS2_DEFAULT 0x00000000 6646 #define ixGC_CAC_ACC_PH0_DEFAULT 0x00000000 6647 #define ixGC_CAC_ACC_PH1_DEFAULT 0x00000000 6648 #define ixGC_CAC_ACC_PH2_DEFAULT 0x00000000 6649 #define ixGC_CAC_ACC_PH3_DEFAULT 0x00000000 6650 #define ixGC_CAC_ACC_PH4_DEFAULT 0x00000000 6651 #define ixGC_CAC_ACC_PH5_DEFAULT 0x00000000 6652 #define ixGC_CAC_ACC_PH6_DEFAULT 0x00000000 6653 #define ixGC_CAC_ACC_PH7_DEFAULT 0x00000000 6654 #define ixGC_CAC_ACC_SDMA0_DEFAULT 0x00000000 6655 #define ixGC_CAC_ACC_SDMA1_DEFAULT 0x00000000 6656 #define ixGC_CAC_ACC_SDMA2_DEFAULT 0x00000000 6657 #define ixGC_CAC_ACC_SDMA3_DEFAULT 0x00000000 6658 #define ixGC_CAC_ACC_SDMA4_DEFAULT 0x00000000 6659 #define ixGC_CAC_ACC_SDMA5_DEFAULT 0x00000000 6660 #define ixGC_CAC_ACC_SDMA6_DEFAULT 0x00000000 6661 #define ixGC_CAC_ACC_SDMA7_DEFAULT 0x00000000 6662 #define ixGC_CAC_ACC_SDMA8_DEFAULT 0x00000000 6663 #define ixGC_CAC_ACC_SDMA9_DEFAULT 0x00000000 6664 #define ixGC_CAC_ACC_SDMA10_DEFAULT 0x00000000 6665 #define ixGC_CAC_ACC_SDMA11_DEFAULT 0x00000000 6666 #define ixGC_CAC_ACC_SP0_LOWER_DEFAULT 0x00000000 6667 #define ixGC_CAC_ACC_SP0_UPPER_DEFAULT 0x00000000 6668 #define ixGC_CAC_ACC_SP1_LOWER_DEFAULT 0x00000000 6669 #define ixGC_CAC_ACC_SP1_UPPER_DEFAULT 0x00000000 6670 #define ixGC_CAC_ACC_SP2_LOWER_DEFAULT 0x00000000 6671 #define ixGC_CAC_ACC_SP2_UPPER_DEFAULT 0x00000000 6672 #define ixGC_CAC_ACC_GL1C0_DEFAULT 0x00000000 6673 #define ixGC_CAC_ACC_GL1C1_DEFAULT 0x00000000 6674 #define ixGC_CAC_ACC_GL1C2_DEFAULT 0x00000000 6675 #define ixGC_CAC_ACC_GL1C3_DEFAULT 0x00000000 6676 #define ixGC_CAC_ACC_GL1C4_DEFAULT 0x00000000 6677 #define ixGC_CAC_ACC_SQC0_DEFAULT 0x00000000 6678 #define ixGC_CAC_ACC_SQC1_DEFAULT 0x00000000 6679 #define ixGC_CAC_ACC_SQC2_DEFAULT 0x00000000 6680 #define ixGC_CAC_ACC_RLC0_DEFAULT 0x00000000 6681 #define ixGC_CAC_OVRD_BCI_DEFAULT 0x00000000 6682 #define ixGC_CAC_OVRD_CB_DEFAULT 0x00000000 6683 #define ixGC_CAC_OVRD_CP_DEFAULT 0x00000000 6684 #define ixGC_CAC_OVRD_DB_DEFAULT 0x00000000 6685 #define ixGC_CAC_OVRD_GDS_DEFAULT 0x00000000 6686 #define ixGC_CAC_OVRD_LDS_DEFAULT 0x00000000 6687 #define ixGC_CAC_OVRD_PA_DEFAULT 0x00000000 6688 #define ixGC_CAC_OVRD_PC_DEFAULT 0x00000000 6689 #define ixGC_CAC_OVRD_SC_DEFAULT 0x00000000 6690 #define ixGC_CAC_OVRD_SPI_DEFAULT 0x00000000 6691 #define ixGC_CAC_OVRD_CU_DEFAULT 0x00000000 6692 #define ixGC_CAC_OVRD_SQ_DEFAULT 0x00000000 6693 #define ixGC_CAC_OVRD_SX_DEFAULT 0x00000000 6694 #define ixGC_CAC_OVRD_SXRB_DEFAULT 0x00000000 6695 #define ixGC_CAC_OVRD_TA_DEFAULT 0x00000000 6696 #define ixGC_CAC_OVRD_TCP_DEFAULT 0x00000000 6697 #define ixGC_CAC_OVRD_TD_DEFAULT 0x00000000 6698 #define ixGC_CAC_OVRD_RMI_DEFAULT 0x00000000 6699 #define ixGC_CAC_OVRD_EA_DEFAULT 0x00000000 6700 #define ixGC_CAC_OVRD_UTCL2_ATCL2_DEFAULT 0x00000000 6701 #define ixGC_CAC_OVRD_UTCL2_ROUTER_DEFAULT 0x00000000 6702 #define ixGC_CAC_OVRD_UTCL2_VML2_DEFAULT 0x00000000 6703 #define ixGC_CAC_OVRD_UTCL2_WALKER_DEFAULT 0x00000000 6704 #define ixGC_CAC_OVRD_SP_DEFAULT 0x00000000 6705 #define ixGC_CAC_OVRD_UTCL1_DEFAULT 0x00000000 6706 #define ixGC_CAC_OVRD_CHC_DEFAULT 0x00000000 6707 #define ixGC_CAC_OVRD_GE_DEFAULT 0x00000000 6708 #define ixGC_CAC_OVRD_PMM_DEFAULT 0x00000000 6709 #define ixGC_CAC_OVRD_GL2C_DEFAULT 0x00000000 6710 #define ixGC_CAC_OVRD_GUS_DEFAULT 0x00000000 6711 #define ixGC_CAC_OVRD_PH_DEFAULT 0x00000000 6712 #define ixGC_CAC_OVRD_SDMA_DEFAULT 0x00000000 6713 #define ixGC_CAC_OVRD_GL1C_DEFAULT 0x00000000 6714 #define ixGC_CAC_OVRD_SQC_DEFAULT 0x00000000 6715 #define ixGC_CAC_OVRD_RLC_DEFAULT 0x00000000 6716 #define ixGC_CAC_OVRD_GE_HI_DEFAULT 0x00000000 6717 #define ixRELEASE_TO_STALL_LUT_1_8_DEFAULT 0x00000000 6718 #define ixRELEASE_TO_STALL_LUT_9_16_DEFAULT 0x00000000 6719 #define ixRELEASE_TO_STALL_LUT_17_20_DEFAULT 0x00000000 6720 #define ixSTALL_TO_RELEASE_LUT_1_4_DEFAULT 0x00000000 6721 #define ixSTALL_TO_RELEASE_LUT_5_7_DEFAULT 0x00000000 6722 #define ixSTALL_TO_PWRBRK_LUT_1_4_DEFAULT 0x00000000 6723 #define ixSTALL_TO_PWRBRK_LUT_5_7_DEFAULT 0x00000000 6724 #define ixPWRBRK_STALL_TO_RELEASE_LUT_1_4_DEFAULT 0x00000000 6725 #define ixPWRBRK_STALL_TO_RELEASE_LUT_5_7_DEFAULT 0x00000000 6726 #define ixPWRBRK_RELEASE_TO_STALL_LUT_1_8_DEFAULT 0x00000000 6727 #define ixPWRBRK_RELEASE_TO_STALL_LUT_9_16_DEFAULT 0x00000000 6728 #define ixPWRBRK_RELEASE_TO_STALL_LUT_17_20_DEFAULT 0x00000000 6729 #define ixFIXED_PATTERN_PERF_COUNTER_1_DEFAULT 0x00000000 6730 #define ixFIXED_PATTERN_PERF_COUNTER_2_DEFAULT 0x00000000 6731 #define ixFIXED_PATTERN_PERF_COUNTER_3_DEFAULT 0x00000000 6732 #define ixFIXED_PATTERN_PERF_COUNTER_4_DEFAULT 0x00000000 6733 #define ixFIXED_PATTERN_PERF_COUNTER_5_DEFAULT 0x00000000 6734 #define ixFIXED_PATTERN_PERF_COUNTER_6_DEFAULT 0x00000000 6735 #define ixFIXED_PATTERN_PERF_COUNTER_7_DEFAULT 0x00000000 6736 #define ixFIXED_PATTERN_PERF_COUNTER_8_DEFAULT 0x00000000 6737 #define ixFIXED_PATTERN_PERF_COUNTER_9_DEFAULT 0x00000000 6738 #define ixFIXED_PATTERN_PERF_COUNTER_10_DEFAULT 0x00000000 6739 #define ixHW_LUT_UPDATE_STATUS_DEFAULT 0x00000000 6740 6741 6742 // addressBlock: secacind 6743 #define ixSE_CAC_ID_DEFAULT 0x00000000 6744 #define ixSE_CAC_CNTL_DEFAULT 0x000001fe 6745 #define ixSE_CAC_OVR_SEL_DEFAULT 0x00000000 6746 #define ixSE_CAC_OVR_VAL_DEFAULT 0x00000000 6747 6748 6749 // addressBlock: spmglbind 6750 #define ixGLB_CPG_SAMPLEDELAY_DEFAULT 0x00000000 6751 #define ixGLB_CPC_SAMPLEDELAY_DEFAULT 0x00000000 6752 #define ixGLB_CPF_SAMPLEDELAY_DEFAULT 0x00000000 6753 #define ixGLB_GDS_SAMPLEDELAY_DEFAULT 0x00000000 6754 #define ixGLB_GCR_SAMPLEDELAY_DEFAULT 0x00000000 6755 #define ixGLB_PH_SAMPLEDELAY_DEFAULT 0x00000000 6756 #define ixGLB_GE1_SAMPLEDELAY_DEFAULT 0x00000000 6757 #define ixGLB_GE2DIST_SAMPLEDELAY_DEFAULT 0x00000000 6758 #define ixGLB_GUS_SAMPLEDELAY_DEFAULT 0x00000000 6759 #define ixGLB_CHA_SAMPLEDELAY_DEFAULT 0x00000000 6760 #define ixGLB_CHCG_SAMPLEDELAY_DEFAULT 0x00000000 6761 #define ixGLB_ATCL2_SAMPLEDELAY_DEFAULT 0x00000000 6762 #define ixGLB_VML2_SAMPLEDELAY_DEFAULT 0x00000000 6763 #define ixGLB_SDMA0_SAMPLEDELAY_DEFAULT 0x00000000 6764 #define ixGLB_SDMA1_SAMPLEDELAY_DEFAULT 0x00000000 6765 #define ixGLB_SDMA2_SAMPLEDELAY_DEFAULT 0x00000000 6766 #define ixGLB_SDMA3_SAMPLEDELAY_DEFAULT 0x00000000 6767 #define ixGLB_GL2A0_SAMPLEDELAY_DEFAULT 0x00000000 6768 #define ixGLB_GL2A1_SAMPLEDELAY_DEFAULT 0x00000000 6769 #define ixGLB_GL2A2_SAMPLEDELAY_DEFAULT 0x00000000 6770 #define ixGLB_GL2A3_SAMPLEDELAY_DEFAULT 0x00000000 6771 #define ixGLB_GL2C0_SAMPLEDELAY_DEFAULT 0x00000000 6772 #define ixGLB_GL2C1_SAMPLEDELAY_DEFAULT 0x00000000 6773 #define ixGLB_GL2C2_SAMPLEDELAY_DEFAULT 0x00000000 6774 #define ixGLB_GL2C3_SAMPLEDELAY_DEFAULT 0x00000000 6775 #define ixGLB_GL2C4_SAMPLEDELAY_DEFAULT 0x00000000 6776 #define ixGLB_GL2C5_SAMPLEDELAY_DEFAULT 0x00000000 6777 #define ixGLB_GL2C6_SAMPLEDELAY_DEFAULT 0x00000000 6778 #define ixGLB_GL2C7_SAMPLEDELAY_DEFAULT 0x00000000 6779 #define ixGLB_GL2C8_SAMPLEDELAY_DEFAULT 0x00000000 6780 #define ixGLB_GL2C9_SAMPLEDELAY_DEFAULT 0x00000000 6781 #define ixGLB_GL2C10_SAMPLEDELAY_DEFAULT 0x00000000 6782 #define ixGLB_GL2C11_SAMPLEDELAY_DEFAULT 0x00000000 6783 #define ixGLB_GL2C12_SAMPLEDELAY_DEFAULT 0x00000000 6784 #define ixGLB_GL2C13_SAMPLEDELAY_DEFAULT 0x00000000 6785 #define ixGLB_GL2C14_SAMPLEDELAY_DEFAULT 0x00000000 6786 #define ixGLB_GL2C15_SAMPLEDELAY_DEFAULT 0x00000000 6787 #define ixGLB_EA0_SAMPLEDELAY_DEFAULT 0x00000000 6788 #define ixGLB_EA1_SAMPLEDELAY_DEFAULT 0x00000000 6789 #define ixGLB_EA2_SAMPLEDELAY_DEFAULT 0x00000000 6790 #define ixGLB_EA3_SAMPLEDELAY_DEFAULT 0x00000000 6791 #define ixGLB_EA4_SAMPLEDELAY_DEFAULT 0x00000000 6792 #define ixGLB_EA5_SAMPLEDELAY_DEFAULT 0x00000000 6793 #define ixGLB_EA6_SAMPLEDELAY_DEFAULT 0x00000000 6794 #define ixGLB_EA7_SAMPLEDELAY_DEFAULT 0x00000000 6795 #define ixGLB_EA8_SAMPLEDELAY_DEFAULT 0x00000000 6796 #define ixGLB_EA9_SAMPLEDELAY_DEFAULT 0x00000000 6797 #define ixGLB_EA10_SAMPLEDELAY_DEFAULT 0x00000000 6798 #define ixGLB_EA11_SAMPLEDELAY_DEFAULT 0x00000000 6799 #define ixGLB_EA12_SAMPLEDELAY_DEFAULT 0x00000000 6800 #define ixGLB_EA13_SAMPLEDELAY_DEFAULT 0x00000000 6801 #define ixGLB_EA14_SAMPLEDELAY_DEFAULT 0x00000000 6802 #define ixGLB_EA15_SAMPLEDELAY_DEFAULT 0x00000000 6803 #define ixGLB_CHC0_SAMPLEDELAY_DEFAULT 0x00000000 6804 #define ixGLB_CHC1_SAMPLEDELAY_DEFAULT 0x00000000 6805 #define ixGLB_CHC2_SAMPLEDELAY_DEFAULT 0x00000000 6806 #define ixGLB_CHC3_SAMPLEDELAY_DEFAULT 0x00000000 6807 #define ixGLB_GE2SE0_SAMPLEDELAY_DEFAULT 0x00000000 6808 #define ixGLB_GE2SE1_SAMPLEDELAY_DEFAULT 0x00000000 6809 #define ixGLB_GE2SE2_SAMPLEDELAY_DEFAULT 0x00000000 6810 #define ixGLB_GE2SE3_SAMPLEDELAY_DEFAULT 0x00000000 6811 6812 6813 // addressBlock: spmind 6814 #define ixSE_SPI_SAMPLEDELAY_DEFAULT 0x00000000 6815 #define ixSE_SQG_SAMPLEDELAY_DEFAULT 0x00000000 6816 #define ixSE_CBR_SAMPLEDELAY_DEFAULT 0x00000000 6817 #define ixSE_DBR_SAMPLEDELAY_DEFAULT 0x00000000 6818 #define ixSE_PA_SAMPLEDELAY_DEFAULT 0x00000000 6819 #define ixSE_SA0SX_SAMPLEDELAY_DEFAULT 0x00000000 6820 #define ixSE_SA0GL1A_SAMPLEDELAY_DEFAULT 0x00000000 6821 #define ixSE_SA0GL1CG_SAMPLEDELAY_DEFAULT 0x00000000 6822 #define ixSE_SA0CB0_SAMPLEDELAY_DEFAULT 0x00000000 6823 #define ixSE_SA0CB1_SAMPLEDELAY_DEFAULT 0x00000000 6824 #define ixSE_SA0DB0_SAMPLEDELAY_DEFAULT 0x00000000 6825 #define ixSE_SA0DB1_SAMPLEDELAY_DEFAULT 0x00000000 6826 #define ixSE_SA0SC0_SAMPLEDELAY_DEFAULT 0x00000000 6827 #define ixSE_SA0SC1_SAMPLEDELAY_DEFAULT 0x00000000 6828 #define ixSE_SA0RMI0_SAMPLEDELAY_DEFAULT 0x00000000 6829 #define ixSE_SA0RMI1_SAMPLEDELAY_DEFAULT 0x00000000 6830 #define ixSE_SA0GL1C0_SAMPLEDELAY_DEFAULT 0x00000000 6831 #define ixSE_SA0GL1C1_SAMPLEDELAY_DEFAULT 0x00000000 6832 #define ixSE_SA0GL1C2_SAMPLEDELAY_DEFAULT 0x00000000 6833 #define ixSE_SA0GL1C3_SAMPLEDELAY_DEFAULT 0x00000000 6834 #define ixSE_SA0WGP00TA0_SAMPLEDELAY_DEFAULT 0x00000000 6835 #define ixSE_SA0WGP00TA1_SAMPLEDELAY_DEFAULT 0x00000000 6836 #define ixSE_SA0WGP00TD0_SAMPLEDELAY_DEFAULT 0x00000000 6837 #define ixSE_SA0WGP00TD1_SAMPLEDELAY_DEFAULT 0x00000000 6838 #define ixSE_SA0WGP00TCP0_SAMPLEDELAY_DEFAULT 0x00000000 6839 #define ixSE_SA0WGP00TCP1_SAMPLEDELAY_DEFAULT 0x00000000 6840 #define ixSE_SA0WGP01TA0_SAMPLEDELAY_DEFAULT 0x00000000 6841 #define ixSE_SA0WGP01TA1_SAMPLEDELAY_DEFAULT 0x00000000 6842 #define ixSE_SA0WGP01TD0_SAMPLEDELAY_DEFAULT 0x00000000 6843 #define ixSE_SA0WGP01TD1_SAMPLEDELAY_DEFAULT 0x00000000 6844 #define ixSE_SA0WGP01TCP0_SAMPLEDELAY_DEFAULT 0x00000000 6845 #define ixSE_SA0WGP01TCP1_SAMPLEDELAY_DEFAULT 0x00000000 6846 #define ixSE_SA0WGP02TA0_SAMPLEDELAY_DEFAULT 0x00000000 6847 #define ixSE_SA0WGP02TA1_SAMPLEDELAY_DEFAULT 0x00000000 6848 #define ixSE_SA0WGP02TD0_SAMPLEDELAY_DEFAULT 0x00000000 6849 #define ixSE_SA0WGP02TD1_SAMPLEDELAY_DEFAULT 0x00000000 6850 #define ixSE_SA0WGP02TCP0_SAMPLEDELAY_DEFAULT 0x00000000 6851 #define ixSE_SA0WGP02TCP1_SAMPLEDELAY_DEFAULT 0x00000000 6852 #define ixSE_SA0WGP03TA0_SAMPLEDELAY_DEFAULT 0x00000000 6853 #define ixSE_SA0WGP03TA1_SAMPLEDELAY_DEFAULT 0x00000000 6854 #define ixSE_SA0WGP03TD0_SAMPLEDELAY_DEFAULT 0x00000000 6855 #define ixSE_SA0WGP03TD1_SAMPLEDELAY_DEFAULT 0x00000000 6856 #define ixSE_SA0WGP03TCP0_SAMPLEDELAY_DEFAULT 0x00000000 6857 #define ixSE_SA0WGP03TCP1_SAMPLEDELAY_DEFAULT 0x00000000 6858 #define ixSE_SA0WGP04TA0_SAMPLEDELAY_DEFAULT 0x00000000 6859 #define ixSE_SA0WGP04TA1_SAMPLEDELAY_DEFAULT 0x00000000 6860 #define ixSE_SA0WGP04TD0_SAMPLEDELAY_DEFAULT 0x00000000 6861 #define ixSE_SA0WGP04TD1_SAMPLEDELAY_DEFAULT 0x00000000 6862 #define ixSE_SA0WGP04TCP0_SAMPLEDELAY_DEFAULT 0x00000000 6863 #define ixSE_SA0WGP04TCP1_SAMPLEDELAY_DEFAULT 0x00000000 6864 #define ixSE_SA1SX_SAMPLEDELAY_DEFAULT 0x00000000 6865 #define ixSE_SA1GL1A_SAMPLEDELAY_DEFAULT 0x00000000 6866 #define ixSE_SA1GL1CG_SAMPLEDELAY_DEFAULT 0x00000000 6867 #define ixSE_SA1CB0_SAMPLEDELAY_DEFAULT 0x00000000 6868 #define ixSE_SA1CB1_SAMPLEDELAY_DEFAULT 0x00000000 6869 #define ixSE_SA1DB0_SAMPLEDELAY_DEFAULT 0x00000000 6870 #define ixSE_SA1DB1_SAMPLEDELAY_DEFAULT 0x00000000 6871 #define ixSE_SA1SC0_SAMPLEDELAY_DEFAULT 0x00000000 6872 #define ixSE_SA1SC1_SAMPLEDELAY_DEFAULT 0x00000000 6873 #define ixSE_SA1RMI0_SAMPLEDELAY_DEFAULT 0x00000000 6874 #define ixSE_SA1RMI1_SAMPLEDELAY_DEFAULT 0x00000000 6875 #define ixSE_SA1GL1C0_SAMPLEDELAY_DEFAULT 0x00000000 6876 #define ixSE_SA1GL1C1_SAMPLEDELAY_DEFAULT 0x00000000 6877 #define ixSE_SA1GL1C2_SAMPLEDELAY_DEFAULT 0x00000000 6878 #define ixSE_SA1GL1C3_SAMPLEDELAY_DEFAULT 0x00000000 6879 #define ixSE_SA1WGP00TA0_SAMPLEDELAY_DEFAULT 0x00000000 6880 #define ixSE_SA1WGP00TA1_SAMPLEDELAY_DEFAULT 0x00000000 6881 #define ixSE_SA1WGP00TD0_SAMPLEDELAY_DEFAULT 0x00000000 6882 #define ixSE_SA1WGP00TD1_SAMPLEDELAY_DEFAULT 0x00000000 6883 #define ixSE_SA1WGP00TCP0_SAMPLEDELAY_DEFAULT 0x00000000 6884 #define ixSE_SA1WGP00TCP1_SAMPLEDELAY_DEFAULT 0x00000000 6885 #define ixSE_SA1WGP01TA0_SAMPLEDELAY_DEFAULT 0x00000000 6886 #define ixSE_SA1WGP01TA1_SAMPLEDELAY_DEFAULT 0x00000000 6887 #define ixSE_SA1WGP01TD0_SAMPLEDELAY_DEFAULT 0x00000000 6888 #define ixSE_SA1WGP01TD1_SAMPLEDELAY_DEFAULT 0x00000000 6889 #define ixSE_SA1WGP01TCP0_SAMPLEDELAY_DEFAULT 0x00000000 6890 #define ixSE_SA1WGP01TCP1_SAMPLEDELAY_DEFAULT 0x00000000 6891 #define ixSE_SA1WGP02TA0_SAMPLEDELAY_DEFAULT 0x00000000 6892 #define ixSE_SA1WGP02TA1_SAMPLEDELAY_DEFAULT 0x00000000 6893 #define ixSE_SA1WGP02TD0_SAMPLEDELAY_DEFAULT 0x00000000 6894 #define ixSE_SA1WGP02TD1_SAMPLEDELAY_DEFAULT 0x00000000 6895 #define ixSE_SA1WGP02TCP0_SAMPLEDELAY_DEFAULT 0x00000000 6896 #define ixSE_SA1WGP02TCP1_SAMPLEDELAY_DEFAULT 0x00000000 6897 #define ixSE_SA1WGP03TA0_SAMPLEDELAY_DEFAULT 0x00000000 6898 #define ixSE_SA1WGP03TA1_SAMPLEDELAY_DEFAULT 0x00000000 6899 #define ixSE_SA1WGP03TD0_SAMPLEDELAY_DEFAULT 0x00000000 6900 #define ixSE_SA1WGP03TD1_SAMPLEDELAY_DEFAULT 0x00000000 6901 #define ixSE_SA1WGP03TCP0_SAMPLEDELAY_DEFAULT 0x00000000 6902 #define ixSE_SA1WGP03TCP1_SAMPLEDELAY_DEFAULT 0x00000000 6903 #define ixSE_SA1WGP04TA0_SAMPLEDELAY_DEFAULT 0x00000000 6904 #define ixSE_SA1WGP04TA1_SAMPLEDELAY_DEFAULT 0x00000000 6905 #define ixSE_SA1WGP04TD0_SAMPLEDELAY_DEFAULT 0x00000000 6906 #define ixSE_SA1WGP04TD1_SAMPLEDELAY_DEFAULT 0x00000000 6907 #define ixSE_SA1WGP04TCP0_SAMPLEDELAY_DEFAULT 0x00000000 6908 #define ixSE_SA1WGP04TCP1_SAMPLEDELAY_DEFAULT 0x00000000 6909 6910 6911 6912 6913 // addressBlock: grtavfsind 6914 #define ixRTAVFS_REG0_DEFAULT 0x01000000 6915 #define ixRTAVFS_REG1_DEFAULT 0x00000000 6916 #define ixRTAVFS_REG2_DEFAULT 0x01000000 6917 #define ixRTAVFS_REG3_DEFAULT 0x00000000 6918 #define ixRTAVFS_REG4_DEFAULT 0x01000000 6919 #define ixRTAVFS_REG5_DEFAULT 0x00000000 6920 #define ixRTAVFS_REG6_DEFAULT 0x01000000 6921 #define ixRTAVFS_REG7_DEFAULT 0x00000000 6922 #define ixRTAVFS_REG8_DEFAULT 0x01000000 6923 #define ixRTAVFS_REG9_DEFAULT 0x00000000 6924 #define ixRTAVFS_REG10_DEFAULT 0x01000000 6925 #define ixRTAVFS_REG11_DEFAULT 0x00000000 6926 #define ixRTAVFS_REG12_DEFAULT 0x01000000 6927 #define ixRTAVFS_REG13_DEFAULT 0x00000000 6928 #define ixRTAVFS_REG14_DEFAULT 0x01000000 6929 #define ixRTAVFS_REG15_DEFAULT 0x00000000 6930 #define ixRTAVFS_REG16_DEFAULT 0x01000000 6931 #define ixRTAVFS_REG17_DEFAULT 0x00000000 6932 #define ixRTAVFS_REG18_DEFAULT 0x01000000 6933 #define ixRTAVFS_REG19_DEFAULT 0x00000000 6934 #define ixRTAVFS_REG20_DEFAULT 0x01000000 6935 #define ixRTAVFS_REG21_DEFAULT 0x00000000 6936 #define ixRTAVFS_REG22_DEFAULT 0x01000000 6937 #define ixRTAVFS_REG23_DEFAULT 0x00000000 6938 #define ixRTAVFS_REG24_DEFAULT 0x01000000 6939 #define ixRTAVFS_REG25_DEFAULT 0x00000000 6940 #define ixRTAVFS_REG26_DEFAULT 0x01000000 6941 #define ixRTAVFS_REG27_DEFAULT 0x00000000 6942 #define ixRTAVFS_REG28_DEFAULT 0x01000000 6943 #define ixRTAVFS_REG29_DEFAULT 0x00000000 6944 #define ixRTAVFS_REG30_DEFAULT 0x01000000 6945 #define ixRTAVFS_REG31_DEFAULT 0x00000000 6946 #define ixRTAVFS_REG32_DEFAULT 0x01000000 6947 #define ixRTAVFS_REG33_DEFAULT 0x00000000 6948 #define ixRTAVFS_REG34_DEFAULT 0x01000000 6949 #define ixRTAVFS_REG35_DEFAULT 0x00000000 6950 #define ixRTAVFS_REG36_DEFAULT 0x01000000 6951 #define ixRTAVFS_REG37_DEFAULT 0x00000000 6952 #define ixRTAVFS_REG38_DEFAULT 0x01000000 6953 #define ixRTAVFS_REG39_DEFAULT 0x00000000 6954 #define ixRTAVFS_REG40_DEFAULT 0x01000000 6955 #define ixRTAVFS_REG41_DEFAULT 0x00000000 6956 #define ixRTAVFS_REG42_DEFAULT 0x01000000 6957 #define ixRTAVFS_REG43_DEFAULT 0x00000000 6958 #define ixRTAVFS_REG44_DEFAULT 0x01000000 6959 #define ixRTAVFS_REG45_DEFAULT 0x00000000 6960 #define ixRTAVFS_REG46_DEFAULT 0x01000000 6961 #define ixRTAVFS_REG47_DEFAULT 0x00000000 6962 #define ixRTAVFS_REG48_DEFAULT 0x01000000 6963 #define ixRTAVFS_REG49_DEFAULT 0x00000000 6964 #define ixRTAVFS_REG50_DEFAULT 0x01000000 6965 #define ixRTAVFS_REG51_DEFAULT 0x00000000 6966 #define ixRTAVFS_REG52_DEFAULT 0x01000000 6967 #define ixRTAVFS_REG53_DEFAULT 0x00000000 6968 #define ixRTAVFS_REG54_DEFAULT 0x01000000 6969 #define ixRTAVFS_REG55_DEFAULT 0x00000000 6970 #define ixRTAVFS_REG56_DEFAULT 0x01000000 6971 #define ixRTAVFS_REG57_DEFAULT 0x00000000 6972 #define ixRTAVFS_REG58_DEFAULT 0x01000000 6973 #define ixRTAVFS_REG59_DEFAULT 0x00000000 6974 #define ixRTAVFS_REG60_DEFAULT 0x01000000 6975 #define ixRTAVFS_REG61_DEFAULT 0x00000000 6976 #define ixRTAVFS_REG62_DEFAULT 0x01000000 6977 #define ixRTAVFS_REG63_DEFAULT 0x00000000 6978 #define ixRTAVFS_REG64_DEFAULT 0x01000000 6979 #define ixRTAVFS_REG65_DEFAULT 0x00000000 6980 #define ixRTAVFS_REG66_DEFAULT 0x01000000 6981 #define ixRTAVFS_REG67_DEFAULT 0x00000000 6982 #define ixRTAVFS_REG68_DEFAULT 0x01000000 6983 #define ixRTAVFS_REG69_DEFAULT 0x00000000 6984 #define ixRTAVFS_REG70_DEFAULT 0x01000000 6985 #define ixRTAVFS_REG71_DEFAULT 0x00000000 6986 #define ixRTAVFS_REG72_DEFAULT 0x01000000 6987 #define ixRTAVFS_REG73_DEFAULT 0x00000000 6988 #define ixRTAVFS_REG74_DEFAULT 0x01000000 6989 #define ixRTAVFS_REG75_DEFAULT 0x00000000 6990 #define ixRTAVFS_REG76_DEFAULT 0x01000000 6991 #define ixRTAVFS_REG77_DEFAULT 0x00000000 6992 #define ixRTAVFS_REG78_DEFAULT 0x01000000 6993 #define ixRTAVFS_REG79_DEFAULT 0x00000000 6994 #define ixRTAVFS_REG80_DEFAULT 0x01000000 6995 #define ixRTAVFS_REG81_DEFAULT 0x00000000 6996 #define ixRTAVFS_REG82_DEFAULT 0x01000000 6997 #define ixRTAVFS_REG83_DEFAULT 0x00000000 6998 #define ixRTAVFS_REG84_DEFAULT 0x01000000 6999 #define ixRTAVFS_REG85_DEFAULT 0x00000000 7000 #define ixRTAVFS_REG86_DEFAULT 0x01000000 7001 #define ixRTAVFS_REG87_DEFAULT 0x00000000 7002 #define ixRTAVFS_REG88_DEFAULT 0x01000000 7003 #define ixRTAVFS_REG89_DEFAULT 0x00000000 7004 #define ixRTAVFS_REG90_DEFAULT 0x01000000 7005 #define ixRTAVFS_REG91_DEFAULT 0x00000000 7006 #define ixRTAVFS_REG92_DEFAULT 0x01000000 7007 #define ixRTAVFS_REG93_DEFAULT 0x00000000 7008 #define ixRTAVFS_REG94_DEFAULT 0x01000000 7009 #define ixRTAVFS_REG95_DEFAULT 0x00000000 7010 #define ixRTAVFS_REG96_DEFAULT 0x01000000 7011 #define ixRTAVFS_REG97_DEFAULT 0x00000000 7012 #define ixRTAVFS_REG98_DEFAULT 0x01000000 7013 #define ixRTAVFS_REG99_DEFAULT 0x00000000 7014 #define ixRTAVFS_REG100_DEFAULT 0x01000000 7015 #define ixRTAVFS_REG101_DEFAULT 0x00000000 7016 #define ixRTAVFS_REG102_DEFAULT 0x01000000 7017 #define ixRTAVFS_REG103_DEFAULT 0x00000000 7018 #define ixRTAVFS_REG104_DEFAULT 0x01000000 7019 #define ixRTAVFS_REG105_DEFAULT 0x00000000 7020 #define ixRTAVFS_REG106_DEFAULT 0x01000000 7021 #define ixRTAVFS_REG107_DEFAULT 0x00000000 7022 #define ixRTAVFS_REG108_DEFAULT 0x01000000 7023 #define ixRTAVFS_REG109_DEFAULT 0x00000000 7024 #define ixRTAVFS_REG110_DEFAULT 0x01000000 7025 #define ixRTAVFS_REG111_DEFAULT 0x00000000 7026 #define ixRTAVFS_REG112_DEFAULT 0x01000000 7027 #define ixRTAVFS_REG113_DEFAULT 0x00000000 7028 #define ixRTAVFS_REG114_DEFAULT 0x01000000 7029 #define ixRTAVFS_REG115_DEFAULT 0x00000000 7030 #define ixRTAVFS_REG116_DEFAULT 0x01000000 7031 #define ixRTAVFS_REG117_DEFAULT 0x00000000 7032 #define ixRTAVFS_REG118_DEFAULT 0x01000000 7033 #define ixRTAVFS_REG119_DEFAULT 0x00000000 7034 #define ixRTAVFS_REG120_DEFAULT 0x01000000 7035 #define ixRTAVFS_REG121_DEFAULT 0x00000000 7036 #define ixRTAVFS_REG122_DEFAULT 0x01000000 7037 #define ixRTAVFS_REG123_DEFAULT 0x00000000 7038 #define ixRTAVFS_REG124_DEFAULT 0x01000000 7039 #define ixRTAVFS_REG125_DEFAULT 0x00000000 7040 #define ixRTAVFS_REG126_DEFAULT 0x01000000 7041 #define ixRTAVFS_REG127_DEFAULT 0x00000000 7042 #define ixRTAVFS_REG128_DEFAULT 0x00000000 7043 #define ixRTAVFS_REG129_DEFAULT 0x00000000 7044 #define ixRTAVFS_REG130_DEFAULT 0x00000000 7045 #define ixRTAVFS_REG131_DEFAULT 0x00000000 7046 #define ixRTAVFS_REG132_DEFAULT 0x00000000 7047 #define ixRTAVFS_REG133_DEFAULT 0x00000000 7048 #define ixRTAVFS_REG134_DEFAULT 0x000211cd 7049 #define ixRTAVFS_REG135_DEFAULT 0x000af12c 7050 #define ixRTAVFS_REG136_DEFAULT 0x00000010 7051 #define ixRTAVFS_REG137_DEFAULT 0x00000000 7052 #define ixRTAVFS_REG138_DEFAULT 0x00000008 7053 #define ixRTAVFS_REG139_DEFAULT 0x00000000 7054 #define ixRTAVFS_REG140_DEFAULT 0x00000000 7055 #define ixRTAVFS_REG141_DEFAULT 0x00000000 7056 #define ixRTAVFS_REG142_DEFAULT 0x00000000 7057 #define ixRTAVFS_REG143_DEFAULT 0x00000000 7058 #define ixRTAVFS_REG144_DEFAULT 0x0015c040 7059 #define ixRTAVFS_REG145_DEFAULT 0x00000000 7060 #define ixRTAVFS_REG146_DEFAULT 0x83c00260 7061 #define ixRTAVFS_REG147_DEFAULT 0x00000800 7062 #define ixRTAVFS_REG148_DEFAULT 0x00000000 7063 #define ixRTAVFS_REG149_DEFAULT 0x000000ff 7064 #define ixRTAVFS_REG150_DEFAULT 0x000000ff 7065 #define ixRTAVFS_REG151_DEFAULT 0x000000ff 7066 #define ixRTAVFS_REG152_DEFAULT 0x000000ff 7067 #define ixRTAVFS_REG153_DEFAULT 0x000000ff 7068 #define ixRTAVFS_REG154_DEFAULT 0x000000ff 7069 #define ixRTAVFS_REG155_DEFAULT 0x000000ff 7070 #define ixRTAVFS_REG156_DEFAULT 0x000000ff 7071 #define ixRTAVFS_REG157_DEFAULT 0x000000ff 7072 #define ixRTAVFS_REG158_DEFAULT 0x000000ff 7073 #define ixRTAVFS_REG159_DEFAULT 0x000000ff 7074 #define ixRTAVFS_REG160_DEFAULT 0x00000000 7075 #define ixRTAVFS_REG161_DEFAULT 0xcccdbcdd 7076 #define ixRTAVFS_REG162_DEFAULT 0x2587d190 7077 #define ixRTAVFS_REG163_DEFAULT 0x00000000 7078 #define ixRTAVFS_REG164_DEFAULT 0x00000000 7079 #define ixRTAVFS_REG165_DEFAULT 0x00000000 7080 7081 7082 // addressBlock: spiind 7083 #define ixSA_WGP_BLK_ID_DEFAULT 0x00000000 7084 7085 7086 // addressBlock: sqind 7087 #define ixSQ_WAVE_ACTIVE_DEFAULT 0x00000000 7088 #define ixSQ_WAVE_VALID_AND_IDLE_DEFAULT 0x00000000 7089 #define ixSQ_WAVE_MODE_DEFAULT 0x00000000 7090 #define ixSQ_WAVE_STATUS_DEFAULT 0x00000000 7091 #define ixSQ_WAVE_TRAPSTS_DEFAULT 0x00000000 7092 #define ixSQ_WAVE_HW_ID_LEGACY_DEFAULT 0x00000000 7093 #define ixSQ_WAVE_GPR_ALLOC_DEFAULT 0x00000000 7094 #define ixSQ_WAVE_LDS_ALLOC_DEFAULT 0x00000000 7095 #define ixSQ_WAVE_IB_STS_DEFAULT 0x00000000 7096 #define ixSQ_WAVE_PC_LO_DEFAULT 0x00000000 7097 #define ixSQ_WAVE_PC_HI_DEFAULT 0x00000000 7098 #define ixSQ_WAVE_INST_DW0_DEFAULT 0x00000000 7099 #define ixSQ_WAVE_IB_DBG1_DEFAULT 0x00000000 7100 #define ixSQ_WAVE_FLUSH_IB_DEFAULT 0x00000000 7101 #define ixSQ_WAVE_FLAT_SCRATCH_LO_DEFAULT 0x00000000 7102 #define ixSQ_WAVE_FLAT_SCRATCH_HI_DEFAULT 0x00000000 7103 #define ixSQ_WAVE_HW_ID1_DEFAULT 0x00000000 7104 #define ixSQ_WAVE_HW_ID2_DEFAULT 0x00000000 7105 #define ixSQ_WAVE_POPS_PACKER_DEFAULT 0x00000000 7106 #define ixSQ_WAVE_SCHED_MODE_DEFAULT 0x00000000 7107 #define ixSQ_WAVE_VGPR_OFFSET_DEFAULT 0x00000000 7108 #define ixSQ_WAVE_IB_STS2_DEFAULT 0x00000000 7109 #define ixSQ_WAVE_SHADER_CYCLES_DEFAULT 0x00000000 7110 #define ixSQ_WAVE_TTMP0_DEFAULT 0x00000000 7111 #define ixSQ_WAVE_TTMP1_DEFAULT 0x00000000 7112 #define ixSQ_WAVE_TTMP2_DEFAULT 0x00000000 7113 #define ixSQ_WAVE_TTMP3_DEFAULT 0x00000000 7114 #define ixSQ_WAVE_TTMP4_DEFAULT 0x00000000 7115 #define ixSQ_WAVE_TTMP5_DEFAULT 0x00000000 7116 #define ixSQ_WAVE_TTMP6_DEFAULT 0x00000000 7117 #define ixSQ_WAVE_TTMP7_DEFAULT 0x00000000 7118 #define ixSQ_WAVE_TTMP8_DEFAULT 0x00000000 7119 #define ixSQ_WAVE_TTMP9_DEFAULT 0x00000000 7120 #define ixSQ_WAVE_TTMP10_DEFAULT 0x00000000 7121 #define ixSQ_WAVE_TTMP11_DEFAULT 0x00000000 7122 #define ixSQ_WAVE_TTMP12_DEFAULT 0x00000000 7123 #define ixSQ_WAVE_TTMP13_DEFAULT 0x00000000 7124 #define ixSQ_WAVE_TTMP14_DEFAULT 0x00000000 7125 #define ixSQ_WAVE_TTMP15_DEFAULT 0x00000000 7126 #define ixSQ_WAVE_M0_DEFAULT 0x00000000 7127 #define ixSQ_WAVE_EXEC_LO_DEFAULT 0x00000000 7128 #define ixSQ_WAVE_EXEC_HI_DEFAULT 0x00000000 7129 #define ixSQ_INTERRUPT_WORD_AUTO_DEFAULT 0x00000000 7130 #define ixSQ_INTERRUPT_WORD_ERROR_DEFAULT 0x00000000 7131 #define ixSQ_INTERRUPT_WORD_WAVE_DEFAULT 0x00000000 7132 7133 7134 // addressBlock: didtind 7135 #define ixDIDT_SQ_CTRL0_DEFAULT 0x0000ff00 7136 #define ixDIDT_SQ_CTRL1_DEFAULT 0x00ff00ff 7137 #define ixDIDT_SQ_CTRL2_DEFAULT 0x18800004 7138 #define ixDIDT_SQ_CTRL_OCP_DEFAULT 0x000000ff 7139 #define ixDIDT_SQ_STALL_CTRL_DEFAULT 0x00fff000 7140 #define ixDIDT_SQ_TUNING_CTRL_DEFAULT 0x00010004 7141 #define ixDIDT_SQ_STALL_AUTO_RELEASE_CTRL_DEFAULT 0x00ffffff 7142 #define ixDIDT_SQ_CTRL3_DEFAULT 0x00038000 7143 #define ixDIDT_SQ_STALL_PATTERN_1_2_DEFAULT 0x01010001 7144 #define ixDIDT_SQ_STALL_PATTERN_3_4_DEFAULT 0x11110421 7145 #define ixDIDT_SQ_STALL_PATTERN_5_6_DEFAULT 0x25291249 7146 #define ixDIDT_SQ_STALL_PATTERN_7_DEFAULT 0x00002aaa 7147 #define ixDIDT_SQ_MPD_SCALE_FACTOR_DEFAULT 0x00000000 7148 #define ixDIDT_SQ_STALL_RELEASE_CNTL0_DEFAULT 0x00000000 7149 #define ixDIDT_SQ_STALL_RELEASE_CNTL1_DEFAULT 0x00000000 7150 #define ixDIDT_SQ_STALL_RELEASE_CNTL_STATUS_DEFAULT 0x00000000 7151 #define ixDIDT_SQ_WEIGHT0_3_DEFAULT 0x00000000 7152 #define ixDIDT_SQ_WEIGHT4_7_DEFAULT 0x00000000 7153 #define ixDIDT_SQ_WEIGHT8_11_DEFAULT 0x00000000 7154 #define ixDIDT_SQ_EDC_CTRL_DEFAULT 0x00001c00 7155 #define ixDIDT_SQ_EDC_THRESHOLD_DEFAULT 0x00000000 7156 #define ixDIDT_SQ_EDC_STALL_PATTERN_1_2_DEFAULT 0x01010001 7157 #define ixDIDT_SQ_EDC_STALL_PATTERN_3_4_DEFAULT 0x11110421 7158 #define ixDIDT_SQ_EDC_STALL_PATTERN_5_6_DEFAULT 0x25291249 7159 #define ixDIDT_SQ_EDC_STALL_PATTERN_7_DEFAULT 0x00002aaa 7160 #define ixDIDT_SQ_EDC_TIMER_PERIOD_DEFAULT 0x00003fff 7161 #define ixDIDT_SQ_THROTTLE_CTRL_DEFAULT 0x00000000 7162 #define ixDIDT_SQ_EDC_STALL_DELAY_1_DEFAULT 0x00000000 7163 #define ixDIDT_SQ_EDC_STALL_DELAY_2_DEFAULT 0x00000000 7164 #define ixDIDT_SQ_EDC_STALL_DELAY_3_DEFAULT 0x00000000 7165 #define ixDIDT_SQ_EDC_STATUS_DEFAULT 0x00000000 7166 #define ixDIDT_SQ_EDC_OVERFLOW_DEFAULT 0x00000000 7167 #define ixDIDT_SQ_EDC_ROLLING_POWER_DELTA_DEFAULT 0x00000000 7168 #define ixDIDT_SQ_EDC_PCC_PERF_COUNTER_DEFAULT 0x00000000 7169 #define ixDIDT_DB_CTRL0_DEFAULT 0x0000ff00 7170 #define ixDIDT_DB_CTRL1_DEFAULT 0x00ff00ff 7171 #define ixDIDT_DB_CTRL2_DEFAULT 0x18800004 7172 #define ixDIDT_DB_CTRL_OCP_DEFAULT 0x000000ff 7173 #define ixDIDT_DB_STALL_CTRL_DEFAULT 0x00fff000 7174 #define ixDIDT_DB_TUNING_CTRL_DEFAULT 0x00010004 7175 #define ixDIDT_DB_STALL_AUTO_RELEASE_CTRL_DEFAULT 0x00ffffff 7176 #define ixDIDT_DB_CTRL3_DEFAULT 0x00038000 7177 #define ixDIDT_DB_STALL_PATTERN_1_2_DEFAULT 0x01010001 7178 #define ixDIDT_DB_STALL_PATTERN_3_4_DEFAULT 0x11110421 7179 #define ixDIDT_DB_STALL_PATTERN_5_6_DEFAULT 0x25291249 7180 #define ixDIDT_DB_STALL_PATTERN_7_DEFAULT 0x00002aaa 7181 #define ixDIDT_DB_MPD_SCALE_FACTOR_DEFAULT 0x00000000 7182 #define ixDIDT_DB_STALL_RELEASE_CNTL0_DEFAULT 0x00000000 7183 #define ixDIDT_DB_STALL_RELEASE_CNTL1_DEFAULT 0x00000000 7184 #define ixDIDT_DB_STALL_RELEASE_CNTL_STATUS_DEFAULT 0x00000000 7185 #define ixDIDT_DB_WEIGHT0_3_DEFAULT 0x00000000 7186 #define ixDIDT_DB_WEIGHT4_7_DEFAULT 0x00000000 7187 #define ixDIDT_DB_WEIGHT8_11_DEFAULT 0x00000000 7188 #define ixDIDT_DB_EDC_CTRL_DEFAULT 0x00001c00 7189 #define ixDIDT_DB_EDC_THRESHOLD_DEFAULT 0x00000000 7190 #define ixDIDT_DB_EDC_STALL_PATTERN_1_2_DEFAULT 0x01010001 7191 #define ixDIDT_DB_EDC_STALL_PATTERN_3_4_DEFAULT 0x11110421 7192 #define ixDIDT_DB_EDC_STALL_PATTERN_5_6_DEFAULT 0x25291249 7193 #define ixDIDT_DB_EDC_STALL_PATTERN_7_DEFAULT 0x00002aaa 7194 #define ixDIDT_DB_EDC_TIMER_PERIOD_DEFAULT 0x00003fff 7195 #define ixDIDT_DB_THROTTLE_CTRL_DEFAULT 0x00000000 7196 #define ixDIDT_DB_EDC_STALL_DELAY_1_DEFAULT 0x00000000 7197 #define ixDIDT_DB_EDC_STATUS_DEFAULT 0x00000000 7198 #define ixDIDT_DB_EDC_OVERFLOW_DEFAULT 0x00000000 7199 #define ixDIDT_DB_EDC_ROLLING_POWER_DELTA_DEFAULT 0x00000000 7200 #define ixDIDT_DB_EDC_PCC_PERF_COUNTER_DEFAULT 0x00000000 7201 #define ixDIDT_TD_CTRL0_DEFAULT 0x0000ff00 7202 #define ixDIDT_TD_CTRL1_DEFAULT 0x00ff00ff 7203 #define ixDIDT_TD_CTRL2_DEFAULT 0x18800004 7204 #define ixDIDT_TD_CTRL_OCP_DEFAULT 0x000000ff 7205 #define ixDIDT_TD_STALL_CTRL_DEFAULT 0x00fff000 7206 #define ixDIDT_TD_TUNING_CTRL_DEFAULT 0x00010004 7207 #define ixDIDT_TD_STALL_AUTO_RELEASE_CTRL_DEFAULT 0x00ffffff 7208 #define ixDIDT_TD_CTRL3_DEFAULT 0x00038000 7209 #define ixDIDT_TD_STALL_PATTERN_1_2_DEFAULT 0x01010001 7210 #define ixDIDT_TD_STALL_PATTERN_3_4_DEFAULT 0x11110421 7211 #define ixDIDT_TD_STALL_PATTERN_5_6_DEFAULT 0x25291249 7212 #define ixDIDT_TD_STALL_PATTERN_7_DEFAULT 0x00002aaa 7213 #define ixDIDT_TD_MPD_SCALE_FACTOR_DEFAULT 0x00000000 7214 #define ixDIDT_TD_STALL_RELEASE_CNTL0_DEFAULT 0x00000000 7215 #define ixDIDT_TD_STALL_RELEASE_CNTL1_DEFAULT 0x00000000 7216 #define ixDIDT_TD_STALL_RELEASE_CNTL_STATUS_DEFAULT 0x00000000 7217 #define ixDIDT_TD_WEIGHT0_3_DEFAULT 0x00000000 7218 #define ixDIDT_TD_WEIGHT4_7_DEFAULT 0x00000000 7219 #define ixDIDT_TD_WEIGHT8_11_DEFAULT 0x00000000 7220 #define ixDIDT_TD_EDC_CTRL_DEFAULT 0x00001c00 7221 #define ixDIDT_TD_EDC_THRESHOLD_DEFAULT 0x00000000 7222 #define ixDIDT_TD_EDC_STALL_PATTERN_1_2_DEFAULT 0x01010001 7223 #define ixDIDT_TD_EDC_STALL_PATTERN_3_4_DEFAULT 0x11110421 7224 #define ixDIDT_TD_EDC_STALL_PATTERN_5_6_DEFAULT 0x25291249 7225 #define ixDIDT_TD_EDC_STALL_PATTERN_7_DEFAULT 0x00002aaa 7226 #define ixDIDT_TD_EDC_TIMER_PERIOD_DEFAULT 0x00003fff 7227 #define ixDIDT_TD_THROTTLE_CTRL_DEFAULT 0x00000000 7228 #define ixDIDT_TD_EDC_STALL_DELAY_1_DEFAULT 0x00000000 7229 #define ixDIDT_TD_EDC_STALL_DELAY_2_DEFAULT 0x00000000 7230 #define ixDIDT_TD_EDC_STALL_DELAY_3_DEFAULT 0x00000000 7231 #define ixDIDT_TD_EDC_STATUS_DEFAULT 0x00000000 7232 #define ixDIDT_TD_EDC_OVERFLOW_DEFAULT 0x00000000 7233 #define ixDIDT_TD_EDC_ROLLING_POWER_DELTA_DEFAULT 0x00000000 7234 #define ixDIDT_TD_EDC_PCC_PERF_COUNTER_DEFAULT 0x00000000 7235 #define ixDIDT_TCP_CTRL0_DEFAULT 0x0000ff00 7236 #define ixDIDT_TCP_CTRL1_DEFAULT 0x00ff00ff 7237 #define ixDIDT_TCP_CTRL2_DEFAULT 0x18800004 7238 #define ixDIDT_TCP_CTRL_OCP_DEFAULT 0x0000ffff 7239 #define ixDIDT_TCP_STALL_CTRL_DEFAULT 0x00fff000 7240 #define ixDIDT_TCP_TUNING_CTRL_DEFAULT 0x00010004 7241 #define ixDIDT_TCP_STALL_AUTO_RELEASE_CTRL_DEFAULT 0x00ffffff 7242 #define ixDIDT_TCP_CTRL3_DEFAULT 0x00038000 7243 #define ixDIDT_TCP_STALL_PATTERN_1_2_DEFAULT 0x01010001 7244 #define ixDIDT_TCP_STALL_PATTERN_3_4_DEFAULT 0x11110421 7245 #define ixDIDT_TCP_STALL_PATTERN_5_6_DEFAULT 0x25291249 7246 #define ixDIDT_TCP_STALL_PATTERN_7_DEFAULT 0x00002aaa 7247 #define ixDIDT_TCP_MPD_SCALE_FACTOR_DEFAULT 0x00000000 7248 #define ixDIDT_TCP_STALL_RELEASE_CNTL0_DEFAULT 0x00000000 7249 #define ixDIDT_TCP_STALL_RELEASE_CNTL1_DEFAULT 0x00000000 7250 #define ixDIDT_TCP_STALL_RELEASE_CNTL_STATUS_DEFAULT 0x00000000 7251 #define ixDIDT_TCP_WEIGHT0_3_DEFAULT 0x00000000 7252 #define ixDIDT_TCP_WEIGHT4_7_DEFAULT 0x00000000 7253 #define ixDIDT_TCP_WEIGHT8_11_DEFAULT 0x00000000 7254 #define ixDIDT_TCP_EDC_CTRL_DEFAULT 0x00001c00 7255 #define ixDIDT_TCP_EDC_THRESHOLD_DEFAULT 0x00000000 7256 #define ixDIDT_TCP_EDC_STALL_PATTERN_1_2_DEFAULT 0x01010001 7257 #define ixDIDT_TCP_EDC_STALL_PATTERN_3_4_DEFAULT 0x11110421 7258 #define ixDIDT_TCP_EDC_STALL_PATTERN_5_6_DEFAULT 0x25291249 7259 #define ixDIDT_TCP_EDC_STALL_PATTERN_7_DEFAULT 0x00002aaa 7260 #define ixDIDT_TCP_EDC_TIMER_PERIOD_DEFAULT 0x00003fff 7261 #define ixDIDT_TCP_THROTTLE_CTRL_DEFAULT 0x00000000 7262 #define ixDIDT_TCP_EDC_STALL_DELAY_1_DEFAULT 0x00000000 7263 #define ixDIDT_TCP_EDC_STALL_DELAY_2_DEFAULT 0x00000000 7264 #define ixDIDT_TCP_EDC_STALL_DELAY_3_DEFAULT 0x00000000 7265 #define ixDIDT_TCP_EDC_STATUS_DEFAULT 0x00000000 7266 #define ixDIDT_TCP_EDC_OVERFLOW_DEFAULT 0x00000000 7267 #define ixDIDT_TCP_EDC_ROLLING_POWER_DELTA_DEFAULT 0x00000000 7268 #define ixDIDT_TCP_EDC_PCC_PERF_COUNTER_DEFAULT 0x00000000 7269 #define ixDIDT_SQ_STALL_EVENT_COUNTER_DEFAULT 0x00000000 7270 #define ixDIDT_DB_STALL_EVENT_COUNTER_DEFAULT 0x00000000 7271 #define ixDIDT_TD_STALL_EVENT_COUNTER_DEFAULT 0x00000000 7272 #define ixDIDT_TCP_STALL_EVENT_COUNTER_DEFAULT 0x00000000 7273 7274 7275 #endif 7276