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Searched refs:mmSDMA1_RLC1_IB_CNTL (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmxgpu_vi.c114 mmSDMA1_RLC1_IB_CNTL, 0x800f0111, 0x00000100,
254 mmSDMA1_RLC1_IB_CNTL, 0x800f0111, 0x00000100,
H A Dsdma_v3_0.c91 mmSDMA1_RLC1_IB_CNTL, 0x800f0111, 0x00000100,
109 mmSDMA1_RLC1_IB_CNTL, 0x800f0111, 0x00000100,
129 mmSDMA1_RLC1_IB_CNTL, 0x800f0111, 0x00000100,
143 mmSDMA1_RLC1_IB_CNTL, 0x800f0111, 0x00000100,
159 mmSDMA1_RLC1_IB_CNTL, 0x00000100, 0x00000100,
H A Dsdma_v4_0.c111 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC1_IB_CNTL, 0x800f0100, 0x00000100),
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_d.h361 #define mmSDMA1_RLC1_IB_CNTL 0x378a macro
H A Doss_3_0_1_d.h472 #define mmSDMA1_RLC1_IB_CNTL 0x378a macro
H A Doss_3_0_d.h570 #define mmSDMA1_RLC1_IB_CNTL 0x378a macro
H A Doss_2_0_d.h392 #define mmSDMA1_RLC1_IB_CNTL 0x378a macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_offset.h474 #define mmSDMA1_RLC1_IB_CNTL 0x01aa macro
H A Dsdma1_4_2_2_offset.h474 #define mmSDMA1_RLC1_IB_CNTL … macro
H A Dsdma1_4_2_offset.h470 #define mmSDMA1_RLC1_IB_CNTL … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h1472 #define mmSDMA1_RLC1_IB_CNTL … macro
H A Dgc_10_3_0_offset.h1518 #define mmSDMA1_RLC1_IB_CNTL … macro