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Searched refs:mmSDMA1_RLC0_RB_WPTR_POLL_CNTL (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_d.h328 #define mmSDMA1_RLC0_RB_WPTR_POLL_CNTL 0x3705 macro
H A Doss_3_0_1_d.h429 #define mmSDMA1_RLC0_RB_WPTR_POLL_CNTL 0x3705 macro
H A Doss_3_0_d.h530 #define mmSDMA1_RLC0_RB_WPTR_POLL_CNTL 0x3705 macro
H A Doss_2_0_d.h364 #define mmSDMA1_RLC0_RB_WPTR_POLL_CNTL 0x3705 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_offset.h384 #define mmSDMA1_RLC0_RB_WPTR_POLL_CNTL 0x0147 macro
H A Dsdma1_4_2_2_offset.h384 #define mmSDMA1_RLC0_RB_WPTR_POLL_CNTL … macro
H A Dsdma1_4_2_offset.h380 #define mmSDMA1_RLC0_RB_WPTR_POLL_CNTL … macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v5_0.c83 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
107 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
156 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA1_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
H A Dsdma_v4_0.c110 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC0_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000),
197 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff0, 0x00403000),
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h1383 #define mmSDMA1_RLC0_RB_WPTR_POLL_CNTL … macro
H A Dgc_10_3_0_offset.h1424 #define mmSDMA1_RLC0_RB_WPTR_POLL_CNTL … macro