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Searched refs:mmSDMA0_RLC0_IB_CNTL (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v3_0.c85 mmSDMA0_RLC0_IB_CNTL, 0x800f0111, 0x00000100,
104 mmSDMA0_RLC0_IB_CNTL, 0x800f0111, 0x00000100,
123 mmSDMA0_RLC0_IB_CNTL, 0x800f0111, 0x00000100,
137 mmSDMA0_RLC0_IB_CNTL, 0x800f0111, 0x00000100,
152 mmSDMA0_RLC0_IB_CNTL, 0x00000100, 0x00000100,
172 mmSDMA0_RLC0_IB_CNTL, 0x00000100, 0x00000100,
H A Dmxgpu_vi.c109 mmSDMA0_RLC0_IB_CNTL, 0x800f0111, 0x00000100,
248 mmSDMA0_RLC0_IB_CNTL, 0x800f0111, 0x00000100,
H A Dsdma_v4_0.c97 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_RLC0_IB_CNTL, 0x800f0100, 0x00000100),
143 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_RLC0_IB_CNTL, 0x800f0111, 0x00000100),
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h310 #define mmSDMA0_RLC0_IB_CNTL … macro
H A Dsdma0_4_0_offset.h398 #define mmSDMA0_RLC0_IB_CNTL 0x014a macro
H A Dsdma0_4_2_offset.h394 #define mmSDMA0_RLC0_IB_CNTL … macro
H A Dsdma0_4_2_2_offset.h398 #define mmSDMA0_RLC0_IB_CNTL … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_d.h224 #define mmSDMA0_RLC0_IB_CNTL 0x350a macro
H A Doss_3_0_1_d.h263 #define mmSDMA0_RLC0_IB_CNTL 0x350a macro
H A Doss_3_0_d.h385 #define mmSDMA0_RLC0_IB_CNTL 0x350a macro
H A Doss_2_0_d.h278 #define mmSDMA0_RLC0_IB_CNTL 0x350a macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h390 #define mmSDMA0_RLC0_IB_CNTL … macro
H A Dgc_10_3_0_offset.h388 #define mmSDMA0_RLC0_IB_CNTL … macro