Home
last modified time | relevance | path

Searched refs:mmSDMA0_PHASE2_QUANTUM_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_0_offset.h173 #define mmSDMA0_PHASE2_QUANTUM_BASE_IDX 0 macro
H A Dsdma0_4_2_offset.h173 #define mmSDMA0_PHASE2_QUANTUM_BASE_IDX … macro
H A Dsdma0_4_2_2_offset.h173 #define mmSDMA0_PHASE2_QUANTUM_BASE_IDX … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h148 #define mmSDMA0_PHASE2_QUANTUM_BASE_IDX … macro
H A Dgc_10_3_0_offset.h145 #define mmSDMA0_PHASE2_QUANTUM_BASE_IDX … macro