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Searched refs:mmSDMA0_PAGE_RB_WPTR_POLL_CNTL (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_0_offset.h308 #define mmSDMA0_PAGE_RB_WPTR_POLL_CNTL 0x00e7 macro
H A Dsdma0_4_2_offset.h304 #define mmSDMA0_PAGE_RB_WPTR_POLL_CNTL macro
H A Dsdma0_4_2_2_offset.h308 #define mmSDMA0_PAGE_RB_WPTR_POLL_CNTL macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v4_0.c95 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_PAGE_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000),
164 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_PAGE_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
1186 wptr_poll_cntl = RREG32_SDMA(i, mmSDMA0_PAGE_RB_WPTR_POLL_CNTL); in sdma_v4_0_page_resume()
1190 WREG32_SDMA(i, mmSDMA0_PAGE_RB_WPTR_POLL_CNTL, wptr_poll_cntl); in sdma_v4_0_page_resume()
H A Dsdma_v5_0.c70 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_PAGE_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
96 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_PAGE_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
141 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_PAGE_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h301 #define mmSDMA0_PAGE_RB_WPTR_POLL_CNTL macro
H A Dgc_10_3_0_offset.h294 #define mmSDMA0_PAGE_RB_WPTR_POLL_CNTL macro