Searched refs:mmSDMA0_GFX_RB_RPTR_ADDR_HI (Results 1 – 16 of 16) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/ |
| H A D | sdma0_4_1_offset.h | 220 #define mmSDMA0_GFX_RB_RPTR_ADDR_HI … macro
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| H A D | sdma0_4_0_offset.h | 224 #define mmSDMA0_GFX_RB_RPTR_ADDR_HI 0x0088 macro
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| H A D | sdma0_4_2_offset.h | 220 #define mmSDMA0_GFX_RB_RPTR_ADDR_HI … macro
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| H A D | sdma0_4_2_2_offset.h | 224 #define mmSDMA0_GFX_RB_RPTR_ADDR_HI … macro
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| /openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/ |
| H A D | oss_2_4_d.h | 195 #define mmSDMA0_GFX_RB_RPTR_ADDR_HI 0x3488 macro
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| H A D | oss_3_0_1_d.h | 222 #define mmSDMA0_GFX_RB_RPTR_ADDR_HI 0x3488 macro
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| H A D | oss_3_0_d.h | 347 #define mmSDMA0_GFX_RB_RPTR_ADDR_HI 0x3488 macro
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| H A D | oss_2_0_d.h | 254 #define mmSDMA0_GFX_RB_RPTR_ADDR_HI 0x3488 macro
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| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | sdma_v2_4.c | 445 WREG32(mmSDMA0_GFX_RB_RPTR_ADDR_HI + sdma_offsets[i], in sdma_v2_4_gfx_resume()
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| H A D | cik_sdma.c | 469 WREG32(mmSDMA0_GFX_RB_RPTR_ADDR_HI + sdma_offsets[i], in cik_sdma_gfx_resume()
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| H A D | sdma_v3_0.c | 684 WREG32(mmSDMA0_GFX_RB_RPTR_ADDR_HI + sdma_offsets[i], in sdma_v3_0_gfx_resume()
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| H A D | sdma_v5_2.c | 545 WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR_ADDR_HI), in sdma_v5_2_gfx_resume()
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| H A D | sdma_v5_0.c | 730 WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR_ADDR_HI), in sdma_v5_0_gfx_resume()
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| H A D | sdma_v4_0.c | 1062 WREG32_SDMA(i, mmSDMA0_GFX_RB_RPTR_ADDR_HI, in sdma_v4_0_gfx_resume()
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| /openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_10_1_0_offset.h | 218 #define mmSDMA0_GFX_RB_RPTR_ADDR_HI … macro
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| H A D | gc_10_3_0_offset.h | 206 #define mmSDMA0_GFX_RB_RPTR_ADDR_HI … macro
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