Home
last modified time | relevance | path

Searched refs:mmRLC_SPP_STALL_STATE_UPDATE_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h9706 #define mmRLC_SPP_STALL_STATE_UPDATE_BASE_IDX … macro
H A Dgc_10_3_0_offset.h9570 #define mmRLC_SPP_STALL_STATE_UPDATE_BASE_IDX … macro