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Searched refs:mmRLC_LB_INIT_CU_MASK (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1151 #define mmRLC_LB_INIT_CU_MASK 0x3107 macro
H A Dgfx_7_2_d.h1300 #define mmRLC_LB_INIT_CU_MASK 0x310f macro
H A Dgfx_7_0_d.h1287 #define mmRLC_LB_INIT_CU_MASK 0x310f macro
H A Dgfx_8_1_d.h1400 #define mmRLC_LB_INIT_CU_MASK 0xec4f macro
H A Dgfx_8_0_d.h1400 #define mmRLC_LB_INIT_CU_MASK 0xec4f macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c1545 WREG32_SOC15(GC, 0, mmRLC_LB_INIT_CU_MASK, 0xffffffff); in gfx_v9_0_init_lbpw()
1594 WREG32_SOC15(GC, 0, mmRLC_LB_INIT_CU_MASK, 0xffffffff); in gfx_v9_4_init_lbpw()
H A Dgfx_v6_0.c2502 WREG32(mmRLC_LB_INIT_CU_MASK, 0xffffffff); in gfx_v6_0_rlc_resume()
H A Dgfx_v7_0.c3476 WREG32(mmRLC_LB_INIT_CU_MASK, 0xffffffff); in gfx_v7_0_rlc_resume()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6057 #define mmRLC_LB_INIT_CU_MASK … macro
H A Dgc_9_1_offset.h6279 #define mmRLC_LB_INIT_CU_MASK … macro
H A Dgc_9_2_1_offset.h6255 #define mmRLC_LB_INIT_CU_MASK … macro