Home
last modified time | relevance | path

Searched refs:mmRLC_LB_CNTR_INIT (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1149 #define mmRLC_LB_CNTR_INIT 0x30C6 macro
H A Dgfx_7_2_d.h1271 #define mmRLC_LB_CNTR_INIT 0x30db macro
H A Dgfx_7_0_d.h1258 #define mmRLC_LB_CNTR_INIT 0x30db macro
H A Dgfx_8_0_d.h1365 #define mmRLC_LB_CNTR_INIT 0xec1b macro
H A Dgfx_8_1_d.h1368 #define mmRLC_LB_CNTR_INIT 0xec1b macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c1533 WREG32_SOC15(GC, 0, mmRLC_LB_CNTR_INIT, 0x00000000); in gfx_v9_0_init_lbpw()
1582 WREG32_SOC15(GC, 0, mmRLC_LB_CNTR_INIT, 0x00000000); in gfx_v9_4_init_lbpw()
H A Dgfx_v6_0.c2501 WREG32(mmRLC_LB_CNTR_INIT, 0); in gfx_v6_0_rlc_resume()
H A Dgfx_v7_0.c3471 WREG32(mmRLC_LB_CNTR_INIT, 0); in gfx_v7_0_rlc_resume()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6007 #define mmRLC_LB_CNTR_INIT … macro
H A Dgc_9_2_1_offset.h6193 #define mmRLC_LB_CNTR_INIT … macro
H A Dgc_9_1_offset.h6229 #define mmRLC_LB_CNTR_INIT … macro