Home
last modified time | relevance | path

Searched refs:mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_5_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_1_offset.h774 #define mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_5_BASE_IDX … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_6_1_offset.h2307 #define mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_5_BASE_IDX … macro
H A Dnbio_7_4_offset.h2627 #define mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_5_BASE_IDX … macro
H A Dnbio_7_0_offset.h4189 #define mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_5_BASE_IDX … macro
H A Dnbio_2_3_offset.h279 #define mmPCIE_F0_DPA_SUBSTATE_PWR_ALLOC_5_BASE_IDX … macro