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Searched refs:mmPA_SC_ENHANCE (Results 1 – 16 of 16) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmxgpu_vi.c105 mmPA_SC_ENHANCE, 0xffffffff, 0x20000001,
241 mmPA_SC_ENHANCE, 0xffffffff, 0x20000001,
H A Dgfx_v8_0.c203 mmPA_SC_ENHANCE, 0xffffffff, 0x20000001,
314 mmPA_SC_ENHANCE, 0xffffffff, 0x20000001,
345 mmPA_SC_ENHANCE, 0xffffffff, 0x20000001,
377 mmPA_SC_ENHANCE, 0xffffffff, 0x20000001,
421 mmPA_SC_ENHANCE, 0xffffffff, 0x20000001,
477 mmPA_SC_ENHANCE, 0xffffffff, 0x20000001,
576 mmPA_SC_ENHANCE, 0xffffffff, 0x00000001,
682 mmPA_SC_ENHANCE, 0xffffffff, 0x20000001,
H A Dsoc15.c470 reg == SOC15_REG_OFFSET(GC, 0, mmPA_SC_ENHANCE) || in soc15_program_register_sequence()
H A Dgfx_v9_0.c525 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE, 0x3fffffff, 0x00000001),
590 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE, 0x3fffffff, 0x00000001),
649 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE, 0x3fffffff, 0x00000001),
670 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE, 0x3fffffff, 0x00000001),
H A Dgfx_v10_0.c302 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE, 0x3fffffff, 0x08000009),
1403 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE, 0x3fffffff, 0x08000009),
1448 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE, 0x3fffffff, 0x08000009),
3399 SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE, 0x08000009, 0x08000009),
H A Dgfx_v7_0.c2003 WREG32(mmPA_SC_ENHANCE, PA_SC_ENHANCE__ENABLE_PA_SC_OUT_OF_ORDER_MASK); in gfx_v7_0_constants_init()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h967 #define mmPA_SC_ENHANCE 0x22FC macro
H A Dgfx_7_2_d.h1106 #define mmPA_SC_ENHANCE 0x22fc macro
H A Dgfx_7_0_d.h1093 #define mmPA_SC_ENHANCE 0x22fc macro
H A Dgfx_8_0_d.h1188 #define mmPA_SC_ENHANCE 0x22fc macro
H A Dgfx_8_1_d.h1189 #define mmPA_SC_ENHANCE 0x22fc macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h381 #define mmPA_SC_ENHANCE macro
H A Dgc_9_2_1_offset.h371 #define mmPA_SC_ENHANCE macro
H A Dgc_9_1_offset.h375 #define mmPA_SC_ENHANCE macro
H A Dgc_10_1_0_offset.h2415 #define mmPA_SC_ENHANCE macro
H A Dgc_10_3_0_offset.h2504 #define mmPA_SC_ENHANCE macro