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Searched refs:mmOTG4_OTG_RANGE_TIMING_INT_STATUS_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h7352 #define mmOTG4_OTG_RANGE_TIMING_INT_STATUS_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h8990 #define mmOTG4_OTG_RANGE_TIMING_INT_STATUS_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h10021 #define mmOTG4_OTG_RANGE_TIMING_INT_STATUS_BASE_IDX … macro