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Searched refs:mmOTG1_OTG_VERTICAL_INTERRUPT1_CONTROL (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5017 #define mmOTG1_OTG_VERTICAL_INTERRUPT1_CONTROL … macro
H A Ddcn_3_0_3_offset.h4395 #define mmOTG1_OTG_VERTICAL_INTERRUPT1_CONTROL … macro
H A Ddcn_3_0_1_offset.h6808 #define mmOTG1_OTG_VERTICAL_INTERRUPT1_CONTROL … macro
H A Ddcn_1_0_offset.h6613 #define mmOTG1_OTG_VERTICAL_INTERRUPT1_CONTROL … macro
H A Ddcn_2_1_0_offset.h8261 #define mmOTG1_OTG_VERTICAL_INTERRUPT1_CONTROL … macro
H A Ddcn_3_0_2_offset.h8137 #define mmOTG1_OTG_VERTICAL_INTERRUPT1_CONTROL … macro
H A Ddcn_2_0_0_offset.h9292 #define mmOTG1_OTG_VERTICAL_INTERRUPT1_CONTROL … macro
H A Ddcn_3_0_0_offset.h8985 #define mmOTG1_OTG_VERTICAL_INTERRUPT1_CONTROL … macro