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Searched refs:mmOTG1_OTG_TRIGA_CNTL_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h4940 #define mmOTG1_OTG_TRIGA_CNTL_BASE_IDX macro
H A Ddcn_3_0_3_offset.h4322 #define mmOTG1_OTG_TRIGA_CNTL_BASE_IDX macro
H A Ddcn_3_0_1_offset.h6735 #define mmOTG1_OTG_TRIGA_CNTL_BASE_IDX macro
H A Ddcn_1_0_offset.h6522 #define mmOTG1_OTG_TRIGA_CNTL_BASE_IDX macro
H A Ddcn_2_1_0_offset.h8180 #define mmOTG1_OTG_TRIGA_CNTL_BASE_IDX macro
H A Ddcn_3_0_2_offset.h8064 #define mmOTG1_OTG_TRIGA_CNTL_BASE_IDX macro
H A Ddcn_2_0_0_offset.h9211 #define mmOTG1_OTG_TRIGA_CNTL_BASE_IDX macro
H A Ddcn_3_0_0_offset.h8910 #define mmOTG1_OTG_TRIGA_CNTL_BASE_IDX macro