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Searched refs:mmOTG0_OTG_VERT_SYNC_CONTROL_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h4791 #define mmOTG0_OTG_VERT_SYNC_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_3_offset.h4146 #define mmOTG0_OTG_VERT_SYNC_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h6559 #define mmOTG0_OTG_VERT_SYNC_CONTROL_BASE_IDX … macro
H A Ddcn_1_0_offset.h6354 #define mmOTG0_OTG_VERT_SYNC_CONTROL_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h8012 #define mmOTG0_OTG_VERT_SYNC_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h7888 #define mmOTG0_OTG_VERT_SYNC_CONTROL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h9043 #define mmOTG0_OTG_VERT_SYNC_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h8734 #define mmOTG0_OTG_VERT_SYNC_CONTROL_BASE_IDX … macro