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Searched refs:mmOTG0_OTG_H_SYNC_A_CNTL_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h4725 #define mmOTG0_OTG_H_SYNC_A_CNTL_BASE_IDX … macro
H A Ddcn_3_0_3_offset.h4080 #define mmOTG0_OTG_H_SYNC_A_CNTL_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h6493 #define mmOTG0_OTG_H_SYNC_A_CNTL_BASE_IDX … macro
H A Ddcn_1_0_offset.h6280 #define mmOTG0_OTG_H_SYNC_A_CNTL_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h7942 #define mmOTG0_OTG_H_SYNC_A_CNTL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h7822 #define mmOTG0_OTG_H_SYNC_A_CNTL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h8973 #define mmOTG0_OTG_H_SYNC_A_CNTL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h8666 #define mmOTG0_OTG_H_SYNC_A_CNTL_BASE_IDX … macro