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Searched refs:mmOPP_TOP_CLK_CONTROL_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h4682 #define mmOPP_TOP_CLK_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_3_offset.h3992 #define mmOPP_TOP_CLK_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h6359 #define mmOPP_TOP_CLK_CONTROL_BASE_IDX … macro
H A Ddcn_1_0_offset.h6174 #define mmOPP_TOP_CLK_CONTROL_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h7752 #define mmOPP_TOP_CLK_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h7656 #define mmOPP_TOP_CLK_CONTROL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h8783 #define mmOPP_TOP_CLK_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h8474 #define mmOPP_TOP_CLK_CONTROL_BASE_IDX … macro