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Searched refs:mmOPP_TOP_CLK_CONTROL (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h4681 #define mmOPP_TOP_CLK_CONTROL macro
H A Ddcn_3_0_3_offset.h3991 #define mmOPP_TOP_CLK_CONTROL macro
H A Ddcn_3_0_1_offset.h6358 #define mmOPP_TOP_CLK_CONTROL macro
H A Ddcn_1_0_offset.h6173 #define mmOPP_TOP_CLK_CONTROL macro
H A Ddcn_2_1_0_offset.h7751 #define mmOPP_TOP_CLK_CONTROL macro
H A Ddcn_3_0_2_offset.h7655 #define mmOPP_TOP_CLK_CONTROL macro
H A Ddcn_2_0_0_offset.h8782 #define mmOPP_TOP_CLK_CONTROL macro
H A Ddcn_3_0_0_offset.h8473 #define mmOPP_TOP_CLK_CONTROL macro