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Searched refs:mmOPP_PIPE1_OPP_PIPE_CONTROL_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h4663 #define mmOPP_PIPE1_OPP_PIPE_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_3_offset.h3972 #define mmOPP_PIPE1_OPP_PIPE_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h6175 #define mmOPP_PIPE1_OPP_PIPE_CONTROL_BASE_IDX … macro
H A Ddcn_1_0_offset.h5922 #define mmOPP_PIPE1_OPP_PIPE_CONTROL_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h7404 #define mmOPP_PIPE1_OPP_PIPE_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h7391 #define mmOPP_PIPE1_OPP_PIPE_CONTROL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h8435 #define mmOPP_PIPE1_OPP_PIPE_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h8126 #define mmOPP_PIPE1_OPP_PIPE_CONTROL_BASE_IDX … macro