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Searched refs:mmODM0_OPTC_WIDTH_CONTROL_BASE_IDX (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h4696 #define mmODM0_OPTC_WIDTH_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_3_offset.h4042 #define mmODM0_OPTC_WIDTH_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h6415 #define mmODM0_OPTC_WIDTH_CONTROL_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h7824 #define mmODM0_OPTC_WIDTH_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h7724 #define mmODM0_OPTC_WIDTH_CONTROL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h8855 #define mmODM0_OPTC_WIDTH_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h8548 #define mmODM0_OPTC_WIDTH_CONTROL_BASE_IDX … macro