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Searched refs:mmMPLL_SS2 (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_6_0_d.h1215 #define mmMPLL_SS2 0x0AF4 macro
H A Dgmc_7_1_d.h867 #define mmMPLL_SS2 0xaf4 macro
H A Dgmc_8_1_d.h971 #define mmMPLL_SS2 0xaf4 macro
/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu7_hwmgr.c4820 cgs_read_register(hwmgr->device, mmMPLL_SS2); in smu7_read_clock_registers()