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Searched refs:mmMPCC_OGAM0_MPCC_OGAM_RAMA_START_BASE_CNTL_R (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h6182 #define mmMPCC_OGAM0_MPCC_OGAM_RAMA_START_BASE_CNTL_R … macro
H A Ddcn_3_0_1_offset.h10396 #define mmMPCC_OGAM0_MPCC_OGAM_RAMA_START_BASE_CNTL_R … macro
H A Ddcn_3_0_2_offset.h12652 #define mmMPCC_OGAM0_MPCC_OGAM_RAMA_START_BASE_CNTL_R … macro
H A Ddcn_3_0_0_offset.h13969 #define mmMPCC_OGAM0_MPCC_OGAM_RAMA_START_BASE_CNTL_R … macro