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Searched refs:mmMPCC5_MPCC_UPDATE_LOCK_SEL (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_offset.h5778 #define mmMPCC5_MPCC_UPDATE_LOCK_SEL … macro
H A Ddcn_2_0_0_offset.h6716 #define mmMPCC5_MPCC_UPDATE_LOCK_SEL … macro
H A Ddcn_3_0_0_offset.h13923 #define mmMPCC5_MPCC_UPDATE_LOCK_SEL … macro