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Searched refs:mmMPCC1_MPCC_BG_G_Y (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h3625 #define mmMPCC1_MPCC_BG_G_Y macro
H A Ddcn_3_0_3_offset.h6146 #define mmMPCC1_MPCC_BG_G_Y macro
H A Ddcn_3_0_1_offset.h10296 #define mmMPCC1_MPCC_BG_G_Y macro
H A Ddcn_1_0_offset.h5413 #define mmMPCC1_MPCC_BG_G_Y macro
H A Ddcn_2_1_0_offset.h5652 #define mmMPCC1_MPCC_BG_G_Y macro
H A Ddcn_3_0_2_offset.h12520 #define mmMPCC1_MPCC_BG_G_Y macro
H A Ddcn_2_0_0_offset.h6590 #define mmMPCC1_MPCC_BG_G_Y macro
H A Ddcn_3_0_0_offset.h13805 #define mmMPCC1_MPCC_BG_G_Y macro