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Searched refs:mmMPCC1_MPCC_BG_B_CB_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h3628 #define mmMPCC1_MPCC_BG_B_CB_BASE_IDX macro
H A Ddcn_3_0_3_offset.h6149 #define mmMPCC1_MPCC_BG_B_CB_BASE_IDX macro
H A Ddcn_3_0_1_offset.h10299 #define mmMPCC1_MPCC_BG_B_CB_BASE_IDX macro
H A Ddcn_1_0_offset.h5416 #define mmMPCC1_MPCC_BG_B_CB_BASE_IDX macro
H A Ddcn_2_1_0_offset.h5655 #define mmMPCC1_MPCC_BG_B_CB_BASE_IDX macro
H A Ddcn_3_0_2_offset.h12523 #define mmMPCC1_MPCC_BG_B_CB_BASE_IDX macro
H A Ddcn_2_0_0_offset.h6593 #define mmMPCC1_MPCC_BG_B_CB_BASE_IDX macro
H A Ddcn_3_0_0_offset.h13808 #define mmMPCC1_MPCC_BG_B_CB_BASE_IDX macro