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Searched refs:mmMPCC0_MPCC_MEM_PWR_CTRL (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h3595 #define mmMPCC0_MPCC_MEM_PWR_CTRL … macro
H A Ddcn_3_0_3_offset.h6118 #define mmMPCC0_MPCC_MEM_PWR_CTRL … macro
H A Ddcn_3_0_1_offset.h10268 #define mmMPCC0_MPCC_MEM_PWR_CTRL … macro
H A Ddcn_2_1_0_offset.h5622 #define mmMPCC0_MPCC_MEM_PWR_CTRL … macro
H A Ddcn_3_0_2_offset.h12492 #define mmMPCC0_MPCC_MEM_PWR_CTRL … macro
H A Ddcn_2_0_0_offset.h6560 #define mmMPCC0_MPCC_MEM_PWR_CTRL … macro
H A Ddcn_3_0_0_offset.h13777 #define mmMPCC0_MPCC_MEM_PWR_CTRL … macro