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Searched refs:mmMP1_SMN_C2PMSG_75_BASE_IDX (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/mp/
H A Dmp_12_0_0_offset.h269 #define mmMP1_SMN_C2PMSG_75_BASE_IDX macro
H A Dmp_10_0_offset.h269 #define mmMP1_SMN_C2PMSG_75_BASE_IDX macro
H A Dmp_9_0_offset.h281 #define mmMP1_SMN_C2PMSG_75_BASE_IDX 0 macro
H A Dmp_11_0_8_offset.h269 #define mmMP1_SMN_C2PMSG_75_BASE_IDX macro
H A Dmp_11_0_offset.h271 #define mmMP1_SMN_C2PMSG_75_BASE_IDX macro
H A Dmp_11_5_0_offset.h269 #define mmMP1_SMN_C2PMSG_75_BASE_IDX macro
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_0_ppt.c83 #define mmMP1_SMN_C2PMSG_75_BASE_IDX macro